tests/qtest/cmsdk-apb-dualtimer-test.c

   1 /*
   2  * QTest testcase for the CMSDK APB dualtimer device
   3  *
   4  * Copyright (c) 2021 Linaro Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14  * for more details.
  15  */
  16
  17 #include "qemu/osdep.h"
  18 #include "libqtest-single.h"
  19
  20 /* IoTKit/ARMSSE dualtimer; driven at 25MHz in mps2-an385, so 40ns per tick */
  21 #define TIMER_BASE 0x40002000
  22
  23 #define TIMER1LOAD 0
  24 #define TIMER1VALUE 4
  25 #define TIMER1CONTROL 8
  26 #define TIMER1INTCLR 0xc
  27 #define TIMER1RIS 0x10
  28 #define TIMER1MIS 0x14
  29 #define TIMER1BGLOAD 0x18
  30
  31 #define TIMER2LOAD 0x20
  32 #define TIMER2VALUE 0x24
  33 #define TIMER2CONTROL 0x28
  34 #define TIMER2INTCLR 0x2c
  35 #define TIMER2RIS 0x30
  36 #define TIMER2MIS 0x34
  37 #define TIMER2BGLOAD 0x38
  38
  39 #define CTRL_ENABLE (1 << 7)
  40 #define CTRL_PERIODIC (1 << 6)
  41 #define CTRL_INTEN (1 << 5)
  42 #define CTRL_PRESCALE_1 (0 << 2)
  43 #define CTRL_PRESCALE_16 (1 << 2)
  44 #define CTRL_PRESCALE_256 (2 << 2)
  45 #define CTRL_32BIT (1 << 1)
  46 #define CTRL_ONESHOT (1 << 0)
  47
  48 static void test_dualtimer(void)
  49 {
  50     g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0);
  51
  52     /* Start timer: will fire after 40000 ns */
  53     writel(TIMER_BASE + TIMER1LOAD, 1000);
  54     /* enable in free-running, wrapping, interrupt mode */
  55     writel(TIMER_BASE + TIMER1CONTROL, CTRL_ENABLE | CTRL_INTEN);
  56
  57     /* Step to just past the 500th tick and check VALUE */
  58     clock_step(500 * 40 + 1);
  59     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
  60     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 500);
  61
  62     /* Just past the 1000th tick: timer should have fired */
  63     clock_step(500 * 40);
  64     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 1);
  65     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0);
  66
  67     /*
  68      * We are in free-running wrapping 16-bit mode, so on the following
  69      * tick VALUE should have wrapped round to 0xffff.
  70      */
  71     clock_step(40);
  72     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0xffff);
  73
  74     /* Check that any write to INTCLR clears interrupt */
  75     writel(TIMER_BASE + TIMER1INTCLR, 1);
  76     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
  77
  78     /* Turn off the timer */
  79     writel(TIMER_BASE + TIMER1CONTROL, 0);
  80 }
  81
  82 static void test_prescale(void)
  83 {
  84     g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0);
  85
  86     /* Start timer: will fire after 40 * 256 * 1000 == 1024000 ns */
  87     writel(TIMER_BASE + TIMER2LOAD, 1000);
  88     /* enable in periodic, wrapping, interrupt mode, prescale 256 */
  89     writel(TIMER_BASE + TIMER2CONTROL,
  90            CTRL_ENABLE | CTRL_INTEN | CTRL_PERIODIC | CTRL_PRESCALE_256);
  91
  92     /* Step to just past the 500th tick and check VALUE */
  93     clock_step(40 * 256 * 501);
  94     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
  95     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 500);
  96
  97     /* Just past the 1000th tick: timer should have fired */
  98     clock_step(40 * 256 * 500);
  99     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 1);
 100     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 0);
 101
 102     /* In periodic mode the tick VALUE now reloads */
 103     clock_step(40 * 256);
 104     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 1000);
 105
 106     /* Check that any write to INTCLR clears interrupt */
 107     writel(TIMER_BASE + TIMER2INTCLR, 1);
 108     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
 109
 110     /* Turn off the timer */
 111     writel(TIMER_BASE + TIMER2CONTROL, 0);
 112 }
 113
 114 int main(int argc, char **argv)
 115 {
 116     int r;
 117
 118     g_test_init(&argc, &argv, NULL);
 119
 120     qtest_start("-machine mps2-an385");
 121
 122     qtest_add_func("/cmsdk-apb-dualtimer/dualtimer", test_dualtimer);
 123     qtest_add_func("/cmsdk-apb-dualtimer/prescale", test_prescale);
 124
 125     r = g_test_run();
 126
 127     qtest_end();
 128
 129     return r;
 130 }