s390x/sic: realize SIC handling
[qemu.git] / hw / s390x / css.c
blob7b82176bc2c11a5e73ae107f1db9ecd7d0af3709
1 /*
2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
9 * directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qapi/visitor.h"
15 #include "hw/qdev.h"
16 #include "qemu/error-report.h"
17 #include "qemu/bitops.h"
18 #include "qemu/error-report.h"
19 #include "exec/address-spaces.h"
20 #include "cpu.h"
21 #include "hw/s390x/ioinst.h"
22 #include "hw/s390x/css.h"
23 #include "trace.h"
24 #include "hw/s390x/s390_flic.h"
25 #include "hw/s390x/s390-virtio-ccw.h"
27 typedef struct CrwContainer {
28 CRW crw;
29 QTAILQ_ENTRY(CrwContainer) sibling;
30 } CrwContainer;
32 typedef struct ChpInfo {
33 uint8_t in_use;
34 uint8_t type;
35 uint8_t is_virtual;
36 } ChpInfo;
38 typedef struct SubchSet {
39 SubchDev *sch[MAX_SCHID + 1];
40 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
41 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
42 } SubchSet;
44 static const VMStateDescription vmstate_scsw = {
45 .name = "s390_scsw",
46 .version_id = 1,
47 .minimum_version_id = 1,
48 .fields = (VMStateField[]) {
49 VMSTATE_UINT16(flags, SCSW),
50 VMSTATE_UINT16(ctrl, SCSW),
51 VMSTATE_UINT32(cpa, SCSW),
52 VMSTATE_UINT8(dstat, SCSW),
53 VMSTATE_UINT8(cstat, SCSW),
54 VMSTATE_UINT16(count, SCSW),
55 VMSTATE_END_OF_LIST()
59 static const VMStateDescription vmstate_pmcw = {
60 .name = "s390_pmcw",
61 .version_id = 1,
62 .minimum_version_id = 1,
63 .fields = (VMStateField[]) {
64 VMSTATE_UINT32(intparm, PMCW),
65 VMSTATE_UINT16(flags, PMCW),
66 VMSTATE_UINT16(devno, PMCW),
67 VMSTATE_UINT8(lpm, PMCW),
68 VMSTATE_UINT8(pnom, PMCW),
69 VMSTATE_UINT8(lpum, PMCW),
70 VMSTATE_UINT8(pim, PMCW),
71 VMSTATE_UINT16(mbi, PMCW),
72 VMSTATE_UINT8(pom, PMCW),
73 VMSTATE_UINT8(pam, PMCW),
74 VMSTATE_UINT8_ARRAY(chpid, PMCW, 8),
75 VMSTATE_UINT32(chars, PMCW),
76 VMSTATE_END_OF_LIST()
80 static const VMStateDescription vmstate_schib = {
81 .name = "s390_schib",
82 .version_id = 1,
83 .minimum_version_id = 1,
84 .fields = (VMStateField[]) {
85 VMSTATE_STRUCT(pmcw, SCHIB, 0, vmstate_pmcw, PMCW),
86 VMSTATE_STRUCT(scsw, SCHIB, 0, vmstate_scsw, SCSW),
87 VMSTATE_UINT64(mba, SCHIB),
88 VMSTATE_UINT8_ARRAY(mda, SCHIB, 4),
89 VMSTATE_END_OF_LIST()
94 static const VMStateDescription vmstate_ccw1 = {
95 .name = "s390_ccw1",
96 .version_id = 1,
97 .minimum_version_id = 1,
98 .fields = (VMStateField[]) {
99 VMSTATE_UINT8(cmd_code, CCW1),
100 VMSTATE_UINT8(flags, CCW1),
101 VMSTATE_UINT16(count, CCW1),
102 VMSTATE_UINT32(cda, CCW1),
103 VMSTATE_END_OF_LIST()
107 static const VMStateDescription vmstate_ciw = {
108 .name = "s390_ciw",
109 .version_id = 1,
110 .minimum_version_id = 1,
111 .fields = (VMStateField[]) {
112 VMSTATE_UINT8(type, CIW),
113 VMSTATE_UINT8(command, CIW),
114 VMSTATE_UINT16(count, CIW),
115 VMSTATE_END_OF_LIST()
119 static const VMStateDescription vmstate_sense_id = {
120 .name = "s390_sense_id",
121 .version_id = 1,
122 .minimum_version_id = 1,
123 .fields = (VMStateField[]) {
124 VMSTATE_UINT8(reserved, SenseId),
125 VMSTATE_UINT16(cu_type, SenseId),
126 VMSTATE_UINT8(cu_model, SenseId),
127 VMSTATE_UINT16(dev_type, SenseId),
128 VMSTATE_UINT8(dev_model, SenseId),
129 VMSTATE_UINT8(unused, SenseId),
130 VMSTATE_STRUCT_ARRAY(ciw, SenseId, MAX_CIWS, 0, vmstate_ciw, CIW),
131 VMSTATE_END_OF_LIST()
135 static int subch_dev_post_load(void *opaque, int version_id);
136 static void subch_dev_pre_save(void *opaque);
138 const char err_hint_devno[] = "Devno mismatch, tried to load wrong section!"
139 " Likely reason: some sequences of plug and unplug can break"
140 " migration for machine versions prior to 2.7 (known design flaw).";
142 const VMStateDescription vmstate_subch_dev = {
143 .name = "s390_subch_dev",
144 .version_id = 1,
145 .minimum_version_id = 1,
146 .post_load = subch_dev_post_load,
147 .pre_save = subch_dev_pre_save,
148 .fields = (VMStateField[]) {
149 VMSTATE_UINT8_EQUAL(cssid, SubchDev, "Bug!"),
150 VMSTATE_UINT8_EQUAL(ssid, SubchDev, "Bug!"),
151 VMSTATE_UINT16(migrated_schid, SubchDev),
152 VMSTATE_UINT16_EQUAL(devno, SubchDev, err_hint_devno),
153 VMSTATE_BOOL(thinint_active, SubchDev),
154 VMSTATE_STRUCT(curr_status, SubchDev, 0, vmstate_schib, SCHIB),
155 VMSTATE_UINT8_ARRAY(sense_data, SubchDev, 32),
156 VMSTATE_UINT64(channel_prog, SubchDev),
157 VMSTATE_STRUCT(last_cmd, SubchDev, 0, vmstate_ccw1, CCW1),
158 VMSTATE_BOOL(last_cmd_valid, SubchDev),
159 VMSTATE_STRUCT(id, SubchDev, 0, vmstate_sense_id, SenseId),
160 VMSTATE_BOOL(ccw_fmt_1, SubchDev),
161 VMSTATE_UINT8(ccw_no_data_cnt, SubchDev),
162 VMSTATE_END_OF_LIST()
166 typedef struct IndAddrPtrTmp {
167 IndAddr **parent;
168 uint64_t addr;
169 int32_t len;
170 } IndAddrPtrTmp;
172 static int post_load_ind_addr(void *opaque, int version_id)
174 IndAddrPtrTmp *ptmp = opaque;
175 IndAddr **ind_addr = ptmp->parent;
177 if (ptmp->len != 0) {
178 *ind_addr = get_indicator(ptmp->addr, ptmp->len);
179 } else {
180 *ind_addr = NULL;
182 return 0;
185 static void pre_save_ind_addr(void *opaque)
187 IndAddrPtrTmp *ptmp = opaque;
188 IndAddr *ind_addr = *(ptmp->parent);
190 if (ind_addr != NULL) {
191 ptmp->len = ind_addr->len;
192 ptmp->addr = ind_addr->addr;
193 } else {
194 ptmp->len = 0;
195 ptmp->addr = 0L;
199 const VMStateDescription vmstate_ind_addr_tmp = {
200 .name = "s390_ind_addr_tmp",
201 .pre_save = pre_save_ind_addr,
202 .post_load = post_load_ind_addr,
204 .fields = (VMStateField[]) {
205 VMSTATE_INT32(len, IndAddrPtrTmp),
206 VMSTATE_UINT64(addr, IndAddrPtrTmp),
207 VMSTATE_END_OF_LIST()
211 const VMStateDescription vmstate_ind_addr = {
212 .name = "s390_ind_addr_tmp",
213 .fields = (VMStateField[]) {
214 VMSTATE_WITH_TMP(IndAddr*, IndAddrPtrTmp, vmstate_ind_addr_tmp),
215 VMSTATE_END_OF_LIST()
219 typedef struct CssImage {
220 SubchSet *sch_set[MAX_SSID + 1];
221 ChpInfo chpids[MAX_CHPID + 1];
222 } CssImage;
224 typedef struct IoAdapter {
225 uint32_t id;
226 uint8_t type;
227 uint8_t isc;
228 uint8_t flags;
229 } IoAdapter;
231 typedef struct ChannelSubSys {
232 QTAILQ_HEAD(, CrwContainer) pending_crws;
233 bool sei_pending;
234 bool do_crw_mchk;
235 bool crws_lost;
236 uint8_t max_cssid;
237 uint8_t max_ssid;
238 bool chnmon_active;
239 uint64_t chnmon_area;
240 CssImage *css[MAX_CSSID + 1];
241 uint8_t default_cssid;
242 IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
243 QTAILQ_HEAD(, IndAddr) indicator_addresses;
244 } ChannelSubSys;
246 static ChannelSubSys channel_subsys = {
247 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
248 .do_crw_mchk = true,
249 .sei_pending = false,
250 .do_crw_mchk = true,
251 .crws_lost = false,
252 .chnmon_active = false,
253 .indicator_addresses =
254 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
257 static void subch_dev_pre_save(void *opaque)
259 SubchDev *s = opaque;
261 /* Prepare remote_schid for save */
262 s->migrated_schid = s->schid;
265 static int subch_dev_post_load(void *opaque, int version_id)
268 SubchDev *s = opaque;
270 /* Re-assign the subchannel to remote_schid if necessary */
271 if (s->migrated_schid != s->schid) {
272 if (css_find_subch(true, s->cssid, s->ssid, s->schid) == s) {
274 * Cleanup the slot before moving to s->migrated_schid provided
275 * it still belongs to us, i.e. it was not changed by previous
276 * invocation of this function.
278 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, NULL);
280 /* It's OK to re-assign without a prior de-assign. */
281 s->schid = s->migrated_schid;
282 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
286 * Hack alert. If we don't migrate the channel subsystem status
287 * we still need to find out if the guest enabled mss/mcss-e.
288 * If the subchannel is enabled, it certainly was able to access it,
289 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
290 * values. This is not watertight, but better than nothing.
292 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
293 if (s->ssid) {
294 channel_subsys.max_ssid = MAX_SSID;
296 if (s->cssid != channel_subsys.default_cssid) {
297 channel_subsys.max_cssid = MAX_CSSID;
300 return 0;
303 IndAddr *get_indicator(hwaddr ind_addr, int len)
305 IndAddr *indicator;
307 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
308 if (indicator->addr == ind_addr) {
309 indicator->refcnt++;
310 return indicator;
313 indicator = g_new0(IndAddr, 1);
314 indicator->addr = ind_addr;
315 indicator->len = len;
316 indicator->refcnt = 1;
317 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
318 indicator, sibling);
319 return indicator;
322 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
323 bool do_map)
325 S390FLICState *fs = s390_get_flic();
326 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
328 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
331 void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
333 assert(indicator->refcnt > 0);
334 indicator->refcnt--;
335 if (indicator->refcnt > 0) {
336 return;
338 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
339 if (indicator->map) {
340 s390_io_adapter_map(adapter, indicator->map, false);
342 g_free(indicator);
345 int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
347 int ret;
349 if (indicator->map) {
350 return 0; /* already mapped is not an error */
352 indicator->map = indicator->addr;
353 ret = s390_io_adapter_map(adapter, indicator->map, true);
354 if ((ret != 0) && (ret != -ENOSYS)) {
355 goto out_err;
357 return 0;
359 out_err:
360 indicator->map = 0;
361 return ret;
364 int css_create_css_image(uint8_t cssid, bool default_image)
366 trace_css_new_image(cssid, default_image ? "(default)" : "");
367 /* 255 is reserved */
368 if (cssid == 255) {
369 return -EINVAL;
371 if (channel_subsys.css[cssid]) {
372 return -EBUSY;
374 channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
375 if (default_image) {
376 channel_subsys.default_cssid = cssid;
378 return 0;
381 uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
383 if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
384 !channel_subsys.io_adapters[type][isc]) {
385 return -1;
388 return channel_subsys.io_adapters[type][isc]->id;
392 * css_register_io_adapters: Register I/O adapters per ISC during init
394 * @swap: an indication if byte swap is needed.
395 * @maskable: an indication if the adapter is subject to the mask operation.
396 * @flags: further characteristics of the adapter.
397 * e.g. suppressible, an indication if the adapter is subject to AIS.
398 * @errp: location to store error information.
400 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
401 uint8_t flags, Error **errp)
403 uint32_t id;
404 int ret, isc;
405 IoAdapter *adapter;
406 S390FLICState *fs = s390_get_flic();
407 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
410 * Disallow multiple registrations for the same device type.
411 * Report an error if registering for an already registered type.
413 if (channel_subsys.io_adapters[type][0]) {
414 error_setg(errp, "Adapters for type %d already registered", type);
417 for (isc = 0; isc <= MAX_ISC; isc++) {
418 id = (type << 3) | isc;
419 ret = fsc->register_io_adapter(fs, id, isc, swap, maskable, flags);
420 if (ret == 0) {
421 adapter = g_new0(IoAdapter, 1);
422 adapter->id = id;
423 adapter->isc = isc;
424 adapter->type = type;
425 adapter->flags = flags;
426 channel_subsys.io_adapters[type][isc] = adapter;
427 } else {
428 error_setg_errno(errp, -ret, "Unexpected error %d when "
429 "registering adapter %d", ret, id);
430 break;
435 * No need to free registered adapters in kvm: kvm will clean up
436 * when the machine goes away.
438 if (ret) {
439 for (isc--; isc >= 0; isc--) {
440 g_free(channel_subsys.io_adapters[type][isc]);
441 channel_subsys.io_adapters[type][isc] = NULL;
447 static void css_clear_io_interrupt(uint16_t subchannel_id,
448 uint16_t subchannel_nr)
450 Error *err = NULL;
451 static bool no_clear_irq;
452 S390FLICState *fs = s390_get_flic();
453 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
454 int r;
456 if (unlikely(no_clear_irq)) {
457 return;
459 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
460 switch (r) {
461 case 0:
462 break;
463 case -ENOSYS:
464 no_clear_irq = true;
466 * Ignore unavailability, as the user can't do anything
467 * about it anyway.
469 break;
470 default:
471 error_setg_errno(&err, -r, "unexpected error condition");
472 error_propagate(&error_abort, err);
476 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
478 if (channel_subsys.max_cssid > 0) {
479 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
481 return (ssid << 1) | 1;
484 uint16_t css_build_subchannel_id(SubchDev *sch)
486 return css_do_build_subchannel_id(sch->cssid, sch->ssid);
489 void css_inject_io_interrupt(SubchDev *sch)
491 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
493 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
494 sch->curr_status.pmcw.intparm, isc, "");
495 s390_io_interrupt(css_build_subchannel_id(sch),
496 sch->schid,
497 sch->curr_status.pmcw.intparm,
498 isc << 27);
501 void css_conditional_io_interrupt(SubchDev *sch)
504 * If the subchannel is not currently status pending, make it pending
505 * with alert status.
507 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
508 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
510 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
511 sch->curr_status.pmcw.intparm, isc,
512 "(unsolicited)");
513 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
514 sch->curr_status.scsw.ctrl |=
515 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
516 /* Inject an I/O interrupt. */
517 s390_io_interrupt(css_build_subchannel_id(sch),
518 sch->schid,
519 sch->curr_status.pmcw.intparm,
520 isc << 27);
524 int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode)
526 S390FLICState *fs = s390_get_flic();
527 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
528 int r;
530 if (env->psw.mask & PSW_MASK_PSTATE) {
531 r = -PGM_PRIVILEGED;
532 goto out;
535 trace_css_do_sic(mode, isc);
536 switch (mode) {
537 case SIC_IRQ_MODE_ALL:
538 case SIC_IRQ_MODE_SINGLE:
539 break;
540 default:
541 r = -PGM_OPERAND;
542 goto out;
545 r = fsc->modify_ais_mode(fs, isc, mode) ? -PGM_OPERATION : 0;
546 out:
547 return r;
550 void css_adapter_interrupt(uint8_t isc)
552 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
554 trace_css_adapter_interrupt(isc);
555 s390_io_interrupt(0, 0, 0, io_int_word);
558 static void sch_handle_clear_func(SubchDev *sch)
560 PMCW *p = &sch->curr_status.pmcw;
561 SCSW *s = &sch->curr_status.scsw;
562 int path;
564 /* Path management: In our simple css, we always choose the only path. */
565 path = 0x80;
567 /* Reset values prior to 'issuing the clear signal'. */
568 p->lpum = 0;
569 p->pom = 0xff;
570 s->flags &= ~SCSW_FLAGS_MASK_PNO;
572 /* We always 'attempt to issue the clear signal', and we always succeed. */
573 sch->channel_prog = 0x0;
574 sch->last_cmd_valid = false;
575 s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
576 s->ctrl |= SCSW_STCTL_STATUS_PEND;
578 s->dstat = 0;
579 s->cstat = 0;
580 p->lpum = path;
584 static void sch_handle_halt_func(SubchDev *sch)
587 PMCW *p = &sch->curr_status.pmcw;
588 SCSW *s = &sch->curr_status.scsw;
589 hwaddr curr_ccw = sch->channel_prog;
590 int path;
592 /* Path management: In our simple css, we always choose the only path. */
593 path = 0x80;
595 /* We always 'attempt to issue the halt signal', and we always succeed. */
596 sch->channel_prog = 0x0;
597 sch->last_cmd_valid = false;
598 s->ctrl &= ~SCSW_ACTL_HALT_PEND;
599 s->ctrl |= SCSW_STCTL_STATUS_PEND;
601 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
602 !((s->ctrl & SCSW_ACTL_START_PEND) ||
603 (s->ctrl & SCSW_ACTL_SUSP))) {
604 s->dstat = SCSW_DSTAT_DEVICE_END;
606 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
607 (s->ctrl & SCSW_ACTL_SUSP)) {
608 s->cpa = curr_ccw + 8;
610 s->cstat = 0;
611 p->lpum = path;
615 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
617 int i;
619 dest->reserved = src->reserved;
620 dest->cu_type = cpu_to_be16(src->cu_type);
621 dest->cu_model = src->cu_model;
622 dest->dev_type = cpu_to_be16(src->dev_type);
623 dest->dev_model = src->dev_model;
624 dest->unused = src->unused;
625 for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
626 dest->ciw[i].type = src->ciw[i].type;
627 dest->ciw[i].command = src->ciw[i].command;
628 dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
632 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
634 CCW0 tmp0;
635 CCW1 tmp1;
636 CCW1 ret;
638 if (fmt1) {
639 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
640 ret.cmd_code = tmp1.cmd_code;
641 ret.flags = tmp1.flags;
642 ret.count = be16_to_cpu(tmp1.count);
643 ret.cda = be32_to_cpu(tmp1.cda);
644 } else {
645 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
646 if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
647 ret.cmd_code = CCW_CMD_TIC;
648 ret.flags = 0;
649 ret.count = 0;
650 } else {
651 ret.cmd_code = tmp0.cmd_code;
652 ret.flags = tmp0.flags;
653 ret.count = be16_to_cpu(tmp0.count);
655 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
657 return ret;
660 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
661 bool suspend_allowed)
663 int ret;
664 bool check_len;
665 int len;
666 CCW1 ccw;
668 if (!ccw_addr) {
669 return -EIO;
672 /* Translate everything to format-1 ccws - the information is the same. */
673 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
675 /* Check for invalid command codes. */
676 if ((ccw.cmd_code & 0x0f) == 0) {
677 return -EINVAL;
679 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
680 ((ccw.cmd_code & 0xf0) != 0)) {
681 return -EINVAL;
683 if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
684 (ccw.cmd_code != CCW_CMD_TIC)) {
685 return -EINVAL;
688 /* We don't support MIDA. */
689 if (ccw.flags & CCW_FLAG_MIDA) {
690 return -EINVAL;
693 if (ccw.flags & CCW_FLAG_SUSPEND) {
694 return suspend_allowed ? -EINPROGRESS : -EINVAL;
697 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
699 if (!ccw.cda) {
700 if (sch->ccw_no_data_cnt == 255) {
701 return -EINVAL;
703 sch->ccw_no_data_cnt++;
706 /* Look at the command. */
707 switch (ccw.cmd_code) {
708 case CCW_CMD_NOOP:
709 /* Nothing to do. */
710 ret = 0;
711 break;
712 case CCW_CMD_BASIC_SENSE:
713 if (check_len) {
714 if (ccw.count != sizeof(sch->sense_data)) {
715 ret = -EINVAL;
716 break;
719 len = MIN(ccw.count, sizeof(sch->sense_data));
720 cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
721 sch->curr_status.scsw.count = ccw.count - len;
722 memset(sch->sense_data, 0, sizeof(sch->sense_data));
723 ret = 0;
724 break;
725 case CCW_CMD_SENSE_ID:
727 SenseId sense_id;
729 copy_sense_id_to_guest(&sense_id, &sch->id);
730 /* Sense ID information is device specific. */
731 if (check_len) {
732 if (ccw.count != sizeof(sense_id)) {
733 ret = -EINVAL;
734 break;
737 len = MIN(ccw.count, sizeof(sense_id));
739 * Only indicate 0xff in the first sense byte if we actually
740 * have enough place to store at least bytes 0-3.
742 if (len >= 4) {
743 sense_id.reserved = 0xff;
744 } else {
745 sense_id.reserved = 0;
747 cpu_physical_memory_write(ccw.cda, &sense_id, len);
748 sch->curr_status.scsw.count = ccw.count - len;
749 ret = 0;
750 break;
752 case CCW_CMD_TIC:
753 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
754 ret = -EINVAL;
755 break;
757 if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
758 ret = -EINVAL;
759 break;
761 sch->channel_prog = ccw.cda;
762 ret = -EAGAIN;
763 break;
764 default:
765 if (sch->ccw_cb) {
766 /* Handle device specific commands. */
767 ret = sch->ccw_cb(sch, ccw);
768 } else {
769 ret = -ENOSYS;
771 break;
773 sch->last_cmd = ccw;
774 sch->last_cmd_valid = true;
775 if (ret == 0) {
776 if (ccw.flags & CCW_FLAG_CC) {
777 sch->channel_prog += 8;
778 ret = -EAGAIN;
782 return ret;
785 static void sch_handle_start_func_virtual(SubchDev *sch, ORB *orb)
788 PMCW *p = &sch->curr_status.pmcw;
789 SCSW *s = &sch->curr_status.scsw;
790 int path;
791 int ret;
792 bool suspend_allowed;
794 /* Path management: In our simple css, we always choose the only path. */
795 path = 0x80;
797 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
798 /* Start Function triggered via ssch, i.e. we have an ORB */
799 s->cstat = 0;
800 s->dstat = 0;
801 /* Look at the orb and try to execute the channel program. */
802 assert(orb != NULL); /* resume does not pass an orb */
803 p->intparm = orb->intparm;
804 if (!(orb->lpm & path)) {
805 /* Generate a deferred cc 3 condition. */
806 s->flags |= SCSW_FLAGS_MASK_CC;
807 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
808 s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
809 return;
811 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
812 s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
813 sch->ccw_no_data_cnt = 0;
814 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
815 } else {
816 /* Start Function resumed via rsch, i.e. we don't have an
817 * ORB */
818 s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
819 /* The channel program had been suspended before. */
820 suspend_allowed = true;
822 sch->last_cmd_valid = false;
823 do {
824 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
825 switch (ret) {
826 case -EAGAIN:
827 /* ccw chain, continue processing */
828 break;
829 case 0:
830 /* success */
831 s->ctrl &= ~SCSW_ACTL_START_PEND;
832 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
833 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
834 SCSW_STCTL_STATUS_PEND;
835 s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
836 s->cpa = sch->channel_prog + 8;
837 break;
838 case -EIO:
839 /* I/O errors, status depends on specific devices */
840 break;
841 case -ENOSYS:
842 /* unsupported command, generate unit check (command reject) */
843 s->ctrl &= ~SCSW_ACTL_START_PEND;
844 s->dstat = SCSW_DSTAT_UNIT_CHECK;
845 /* Set sense bit 0 in ecw0. */
846 sch->sense_data[0] = 0x80;
847 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
848 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
849 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
850 s->cpa = sch->channel_prog + 8;
851 break;
852 case -EFAULT:
853 /* memory problem, generate channel data check */
854 s->ctrl &= ~SCSW_ACTL_START_PEND;
855 s->cstat = SCSW_CSTAT_DATA_CHECK;
856 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
857 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
858 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
859 s->cpa = sch->channel_prog + 8;
860 break;
861 case -EBUSY:
862 /* subchannel busy, generate deferred cc 1 */
863 s->flags &= ~SCSW_FLAGS_MASK_CC;
864 s->flags |= (1 << 8);
865 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
866 s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
867 break;
868 case -EINPROGRESS:
869 /* channel program has been suspended */
870 s->ctrl &= ~SCSW_ACTL_START_PEND;
871 s->ctrl |= SCSW_ACTL_SUSP;
872 break;
873 default:
874 /* error, generate channel program check */
875 s->ctrl &= ~SCSW_ACTL_START_PEND;
876 s->cstat = SCSW_CSTAT_PROG_CHECK;
877 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
878 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
879 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
880 s->cpa = sch->channel_prog + 8;
881 break;
883 } while (ret == -EAGAIN);
887 static int sch_handle_start_func_passthrough(SubchDev *sch, ORB *orb)
890 PMCW *p = &sch->curr_status.pmcw;
891 SCSW *s = &sch->curr_status.scsw;
892 int ret;
894 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
895 assert(orb != NULL);
896 p->intparm = orb->intparm;
900 * Only support prefetch enable mode.
901 * Only support 64bit addressing idal.
903 if (!(orb->ctrl0 & ORB_CTRL0_MASK_PFCH) ||
904 !(orb->ctrl0 & ORB_CTRL0_MASK_C64)) {
905 return -EINVAL;
908 ret = s390_ccw_cmd_request(orb, s, sch->driver_data);
909 switch (ret) {
910 /* Currently we don't update control block and just return the cc code. */
911 case 0:
912 break;
913 case -EBUSY:
914 break;
915 case -ENODEV:
916 break;
917 case -EACCES:
918 /* Let's reflect an inaccessible host device by cc 3. */
919 ret = -ENODEV;
920 break;
921 default:
923 * All other return codes will trigger a program check,
924 * or set cc to 1.
926 break;
929 return ret;
933 * On real machines, this would run asynchronously to the main vcpus.
934 * We might want to make some parts of the ssch handling (interpreting
935 * read/writes) asynchronous later on if we start supporting more than
936 * our current very simple devices.
938 int do_subchannel_work_virtual(SubchDev *sch, ORB *orb)
941 SCSW *s = &sch->curr_status.scsw;
943 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
944 sch_handle_clear_func(sch);
945 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
946 sch_handle_halt_func(sch);
947 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
948 /* Triggered by both ssch and rsch. */
949 sch_handle_start_func_virtual(sch, orb);
950 } else {
951 /* Cannot happen. */
952 return 0;
954 css_inject_io_interrupt(sch);
955 return 0;
958 int do_subchannel_work_passthrough(SubchDev *sch, ORB *orb)
960 int ret;
961 SCSW *s = &sch->curr_status.scsw;
963 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
964 /* TODO: Clear handling */
965 sch_handle_clear_func(sch);
966 ret = 0;
967 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
968 /* TODO: Halt handling */
969 sch_handle_halt_func(sch);
970 ret = 0;
971 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
972 ret = sch_handle_start_func_passthrough(sch, orb);
973 } else {
974 /* Cannot happen. */
975 return -ENODEV;
978 return ret;
981 static int do_subchannel_work(SubchDev *sch, ORB *orb)
983 if (sch->do_subchannel_work) {
984 return sch->do_subchannel_work(sch, orb);
985 } else {
986 return -EINVAL;
990 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
992 int i;
994 dest->intparm = cpu_to_be32(src->intparm);
995 dest->flags = cpu_to_be16(src->flags);
996 dest->devno = cpu_to_be16(src->devno);
997 dest->lpm = src->lpm;
998 dest->pnom = src->pnom;
999 dest->lpum = src->lpum;
1000 dest->pim = src->pim;
1001 dest->mbi = cpu_to_be16(src->mbi);
1002 dest->pom = src->pom;
1003 dest->pam = src->pam;
1004 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1005 dest->chpid[i] = src->chpid[i];
1007 dest->chars = cpu_to_be32(src->chars);
1010 void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
1012 dest->flags = cpu_to_be16(src->flags);
1013 dest->ctrl = cpu_to_be16(src->ctrl);
1014 dest->cpa = cpu_to_be32(src->cpa);
1015 dest->dstat = src->dstat;
1016 dest->cstat = src->cstat;
1017 dest->count = cpu_to_be16(src->count);
1020 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
1022 int i;
1024 copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
1025 copy_scsw_to_guest(&dest->scsw, &src->scsw);
1026 dest->mba = cpu_to_be64(src->mba);
1027 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1028 dest->mda[i] = src->mda[i];
1032 int css_do_stsch(SubchDev *sch, SCHIB *schib)
1034 /* Use current status. */
1035 copy_schib_to_guest(schib, &sch->curr_status);
1036 return 0;
1039 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
1041 int i;
1043 dest->intparm = be32_to_cpu(src->intparm);
1044 dest->flags = be16_to_cpu(src->flags);
1045 dest->devno = be16_to_cpu(src->devno);
1046 dest->lpm = src->lpm;
1047 dest->pnom = src->pnom;
1048 dest->lpum = src->lpum;
1049 dest->pim = src->pim;
1050 dest->mbi = be16_to_cpu(src->mbi);
1051 dest->pom = src->pom;
1052 dest->pam = src->pam;
1053 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1054 dest->chpid[i] = src->chpid[i];
1056 dest->chars = be32_to_cpu(src->chars);
1059 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
1061 dest->flags = be16_to_cpu(src->flags);
1062 dest->ctrl = be16_to_cpu(src->ctrl);
1063 dest->cpa = be32_to_cpu(src->cpa);
1064 dest->dstat = src->dstat;
1065 dest->cstat = src->cstat;
1066 dest->count = be16_to_cpu(src->count);
1069 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
1071 int i;
1073 copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
1074 copy_scsw_from_guest(&dest->scsw, &src->scsw);
1075 dest->mba = be64_to_cpu(src->mba);
1076 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1077 dest->mda[i] = src->mda[i];
1081 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
1083 SCSW *s = &sch->curr_status.scsw;
1084 PMCW *p = &sch->curr_status.pmcw;
1085 uint16_t oldflags;
1086 int ret;
1087 SCHIB schib;
1089 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
1090 ret = 0;
1091 goto out;
1094 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1095 ret = -EINPROGRESS;
1096 goto out;
1099 if (s->ctrl &
1100 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
1101 ret = -EBUSY;
1102 goto out;
1105 copy_schib_from_guest(&schib, orig_schib);
1106 /* Only update the program-modifiable fields. */
1107 p->intparm = schib.pmcw.intparm;
1108 oldflags = p->flags;
1109 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1110 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1111 PMCW_FLAGS_MASK_MP);
1112 p->flags |= schib.pmcw.flags &
1113 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1114 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1115 PMCW_FLAGS_MASK_MP);
1116 p->lpm = schib.pmcw.lpm;
1117 p->mbi = schib.pmcw.mbi;
1118 p->pom = schib.pmcw.pom;
1119 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1120 p->chars |= schib.pmcw.chars &
1121 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1122 sch->curr_status.mba = schib.mba;
1124 /* Has the channel been disabled? */
1125 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
1126 && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
1127 sch->disable_cb(sch);
1130 ret = 0;
1132 out:
1133 return ret;
1136 int css_do_xsch(SubchDev *sch)
1138 SCSW *s = &sch->curr_status.scsw;
1139 PMCW *p = &sch->curr_status.pmcw;
1140 int ret;
1142 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1143 ret = -ENODEV;
1144 goto out;
1147 if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
1148 ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1149 (!(s->ctrl &
1150 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
1151 (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
1152 ret = -EINPROGRESS;
1153 goto out;
1156 if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
1157 ret = -EBUSY;
1158 goto out;
1161 /* Cancel the current operation. */
1162 s->ctrl &= ~(SCSW_FCTL_START_FUNC |
1163 SCSW_ACTL_RESUME_PEND |
1164 SCSW_ACTL_START_PEND |
1165 SCSW_ACTL_SUSP);
1166 sch->channel_prog = 0x0;
1167 sch->last_cmd_valid = false;
1168 s->dstat = 0;
1169 s->cstat = 0;
1170 ret = 0;
1172 out:
1173 return ret;
1176 int css_do_csch(SubchDev *sch)
1178 SCSW *s = &sch->curr_status.scsw;
1179 PMCW *p = &sch->curr_status.pmcw;
1180 int ret;
1182 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1183 ret = -ENODEV;
1184 goto out;
1187 /* Trigger the clear function. */
1188 s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
1189 s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
1191 do_subchannel_work(sch, NULL);
1192 ret = 0;
1194 out:
1195 return ret;
1198 int css_do_hsch(SubchDev *sch)
1200 SCSW *s = &sch->curr_status.scsw;
1201 PMCW *p = &sch->curr_status.pmcw;
1202 int ret;
1204 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1205 ret = -ENODEV;
1206 goto out;
1209 if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
1210 (s->ctrl & (SCSW_STCTL_PRIMARY |
1211 SCSW_STCTL_SECONDARY |
1212 SCSW_STCTL_ALERT))) {
1213 ret = -EINPROGRESS;
1214 goto out;
1217 if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
1218 ret = -EBUSY;
1219 goto out;
1222 /* Trigger the halt function. */
1223 s->ctrl |= SCSW_FCTL_HALT_FUNC;
1224 s->ctrl &= ~SCSW_FCTL_START_FUNC;
1225 if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
1226 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
1227 ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
1228 s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
1230 s->ctrl |= SCSW_ACTL_HALT_PEND;
1232 do_subchannel_work(sch, NULL);
1233 ret = 0;
1235 out:
1236 return ret;
1239 static void css_update_chnmon(SubchDev *sch)
1241 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
1242 /* Not active. */
1243 return;
1245 /* The counter is conveniently located at the beginning of the struct. */
1246 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
1247 /* Format 1, per-subchannel area. */
1248 uint32_t count;
1250 count = address_space_ldl(&address_space_memory,
1251 sch->curr_status.mba,
1252 MEMTXATTRS_UNSPECIFIED,
1253 NULL);
1254 count++;
1255 address_space_stl(&address_space_memory, sch->curr_status.mba, count,
1256 MEMTXATTRS_UNSPECIFIED, NULL);
1257 } else {
1258 /* Format 0, global area. */
1259 uint32_t offset;
1260 uint16_t count;
1262 offset = sch->curr_status.pmcw.mbi << 5;
1263 count = address_space_lduw(&address_space_memory,
1264 channel_subsys.chnmon_area + offset,
1265 MEMTXATTRS_UNSPECIFIED,
1266 NULL);
1267 count++;
1268 address_space_stw(&address_space_memory,
1269 channel_subsys.chnmon_area + offset, count,
1270 MEMTXATTRS_UNSPECIFIED, NULL);
1274 int css_do_ssch(SubchDev *sch, ORB *orb)
1276 SCSW *s = &sch->curr_status.scsw;
1277 PMCW *p = &sch->curr_status.pmcw;
1278 int ret;
1280 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1281 ret = -ENODEV;
1282 goto out;
1285 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1286 ret = -EINPROGRESS;
1287 goto out;
1290 if (s->ctrl & (SCSW_FCTL_START_FUNC |
1291 SCSW_FCTL_HALT_FUNC |
1292 SCSW_FCTL_CLEAR_FUNC)) {
1293 ret = -EBUSY;
1294 goto out;
1297 /* If monitoring is active, update counter. */
1298 if (channel_subsys.chnmon_active) {
1299 css_update_chnmon(sch);
1301 sch->channel_prog = orb->cpa;
1302 /* Trigger the start function. */
1303 s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
1304 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1306 ret = do_subchannel_work(sch, orb);
1308 out:
1309 return ret;
1312 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
1313 int *irb_len)
1315 int i;
1316 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1317 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
1319 copy_scsw_to_guest(&dest->scsw, &src->scsw);
1321 for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
1322 dest->esw[i] = cpu_to_be32(src->esw[i]);
1324 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
1325 dest->ecw[i] = cpu_to_be32(src->ecw[i]);
1327 *irb_len = sizeof(*dest) - sizeof(dest->emw);
1329 /* extended measurements enabled? */
1330 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
1331 !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
1332 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
1333 return;
1335 /* extended measurements pending? */
1336 if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
1337 return;
1339 if ((stctl & SCSW_STCTL_PRIMARY) ||
1340 (stctl == SCSW_STCTL_SECONDARY) ||
1341 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
1342 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
1343 dest->emw[i] = cpu_to_be32(src->emw[i]);
1346 *irb_len = sizeof(*dest);
1349 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
1351 SCSW *s = &sch->curr_status.scsw;
1352 PMCW *p = &sch->curr_status.pmcw;
1353 uint16_t stctl;
1354 IRB irb;
1356 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1357 return 3;
1360 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1362 /* Prepare the irb for the guest. */
1363 memset(&irb, 0, sizeof(IRB));
1365 /* Copy scsw from current status. */
1366 memcpy(&irb.scsw, s, sizeof(SCSW));
1367 if (stctl & SCSW_STCTL_STATUS_PEND) {
1368 if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
1369 SCSW_CSTAT_CHN_CTRL_CHK |
1370 SCSW_CSTAT_INTF_CTRL_CHK)) {
1371 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1372 irb.esw[0] = 0x04804000;
1373 } else {
1374 irb.esw[0] = 0x00800000;
1376 /* If a unit check is pending, copy sense data. */
1377 if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
1378 (p->chars & PMCW_CHARS_MASK_CSENSE)) {
1379 int i;
1381 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1382 /* Attention: sense_data is already BE! */
1383 memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1384 for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1385 irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1387 irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1390 /* Store the irb to the guest. */
1391 copy_irb_to_guest(target_irb, &irb, p, irb_len);
1393 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1396 void css_do_tsch_update_subch(SubchDev *sch)
1398 SCSW *s = &sch->curr_status.scsw;
1399 PMCW *p = &sch->curr_status.pmcw;
1400 uint16_t stctl;
1401 uint16_t fctl;
1402 uint16_t actl;
1404 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1405 fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
1406 actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
1408 /* Clear conditions on subchannel, if applicable. */
1409 if (stctl & SCSW_STCTL_STATUS_PEND) {
1410 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1411 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1412 ((fctl & SCSW_FCTL_HALT_FUNC) &&
1413 (actl & SCSW_ACTL_SUSP))) {
1414 s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
1416 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1417 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1418 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1419 SCSW_ACTL_START_PEND |
1420 SCSW_ACTL_HALT_PEND |
1421 SCSW_ACTL_CLEAR_PEND |
1422 SCSW_ACTL_SUSP);
1423 } else {
1424 if ((actl & SCSW_ACTL_SUSP) &&
1425 (fctl & SCSW_FCTL_START_FUNC)) {
1426 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1427 if (fctl & SCSW_FCTL_HALT_FUNC) {
1428 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1429 SCSW_ACTL_START_PEND |
1430 SCSW_ACTL_HALT_PEND |
1431 SCSW_ACTL_CLEAR_PEND |
1432 SCSW_ACTL_SUSP);
1433 } else {
1434 s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
1438 /* Clear pending sense data. */
1439 if (p->chars & PMCW_CHARS_MASK_CSENSE) {
1440 memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1445 static void copy_crw_to_guest(CRW *dest, const CRW *src)
1447 dest->flags = cpu_to_be16(src->flags);
1448 dest->rsid = cpu_to_be16(src->rsid);
1451 int css_do_stcrw(CRW *crw)
1453 CrwContainer *crw_cont;
1454 int ret;
1456 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1457 if (crw_cont) {
1458 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1459 copy_crw_to_guest(crw, &crw_cont->crw);
1460 g_free(crw_cont);
1461 ret = 0;
1462 } else {
1463 /* List was empty, turn crw machine checks on again. */
1464 memset(crw, 0, sizeof(*crw));
1465 channel_subsys.do_crw_mchk = true;
1466 ret = 1;
1469 return ret;
1472 static void copy_crw_from_guest(CRW *dest, const CRW *src)
1474 dest->flags = be16_to_cpu(src->flags);
1475 dest->rsid = be16_to_cpu(src->rsid);
1478 void css_undo_stcrw(CRW *crw)
1480 CrwContainer *crw_cont;
1482 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1483 if (!crw_cont) {
1484 channel_subsys.crws_lost = true;
1485 return;
1487 copy_crw_from_guest(&crw_cont->crw, crw);
1489 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1492 int css_do_tpi(IOIntCode *int_code, int lowcore)
1494 /* No pending interrupts for !KVM. */
1495 return 0;
1498 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1499 int rfmt, void *buf)
1501 int i, desc_size;
1502 uint32_t words[8];
1503 uint32_t chpid_type_word;
1504 CssImage *css;
1506 if (!m && !cssid) {
1507 css = channel_subsys.css[channel_subsys.default_cssid];
1508 } else {
1509 css = channel_subsys.css[cssid];
1511 if (!css) {
1512 return 0;
1514 desc_size = 0;
1515 for (i = f_chpid; i <= l_chpid; i++) {
1516 if (css->chpids[i].in_use) {
1517 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1518 if (rfmt == 0) {
1519 words[0] = cpu_to_be32(chpid_type_word);
1520 words[1] = 0;
1521 memcpy(buf + desc_size, words, 8);
1522 desc_size += 8;
1523 } else if (rfmt == 1) {
1524 words[0] = cpu_to_be32(chpid_type_word);
1525 words[1] = 0;
1526 words[2] = 0;
1527 words[3] = 0;
1528 words[4] = 0;
1529 words[5] = 0;
1530 words[6] = 0;
1531 words[7] = 0;
1532 memcpy(buf + desc_size, words, 32);
1533 desc_size += 32;
1537 return desc_size;
1540 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1542 /* dct is currently ignored (not really meaningful for our devices) */
1543 /* TODO: Don't ignore mbk. */
1544 if (update && !channel_subsys.chnmon_active) {
1545 /* Enable measuring. */
1546 channel_subsys.chnmon_area = mbo;
1547 channel_subsys.chnmon_active = true;
1549 if (!update && channel_subsys.chnmon_active) {
1550 /* Disable measuring. */
1551 channel_subsys.chnmon_area = 0;
1552 channel_subsys.chnmon_active = false;
1556 int css_do_rsch(SubchDev *sch)
1558 SCSW *s = &sch->curr_status.scsw;
1559 PMCW *p = &sch->curr_status.pmcw;
1560 int ret;
1562 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1563 ret = -ENODEV;
1564 goto out;
1567 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1568 ret = -EINPROGRESS;
1569 goto out;
1572 if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1573 (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1574 (!(s->ctrl & SCSW_ACTL_SUSP))) {
1575 ret = -EINVAL;
1576 goto out;
1579 /* If monitoring is active, update counter. */
1580 if (channel_subsys.chnmon_active) {
1581 css_update_chnmon(sch);
1584 s->ctrl |= SCSW_ACTL_RESUME_PEND;
1585 do_subchannel_work(sch, NULL);
1586 ret = 0;
1588 out:
1589 return ret;
1592 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1594 uint8_t real_cssid;
1596 if (cssid > channel_subsys.max_cssid) {
1597 return -EINVAL;
1599 if (channel_subsys.max_cssid == 0) {
1600 real_cssid = channel_subsys.default_cssid;
1601 } else {
1602 real_cssid = cssid;
1604 if (!channel_subsys.css[real_cssid]) {
1605 return -EINVAL;
1608 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1609 return -ENODEV;
1612 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1613 fprintf(stderr,
1614 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1615 real_cssid, chpid);
1616 return -ENODEV;
1619 /* We don't really use a channel path, so we're done here. */
1620 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1621 channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1622 if (channel_subsys.max_cssid > 0) {
1623 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1625 return 0;
1628 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1630 SubchSet *set;
1631 uint8_t real_cssid;
1633 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1634 if (ssid > MAX_SSID ||
1635 !channel_subsys.css[real_cssid] ||
1636 !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1637 return true;
1639 set = channel_subsys.css[real_cssid]->sch_set[ssid];
1640 return schid > find_last_bit(set->schids_used,
1641 (MAX_SCHID + 1) / sizeof(unsigned long));
1644 unsigned int css_find_free_chpid(uint8_t cssid)
1646 CssImage *css = channel_subsys.css[cssid];
1647 unsigned int chpid;
1649 if (!css) {
1650 return MAX_CHPID + 1;
1653 for (chpid = 0; chpid <= MAX_CHPID; chpid++) {
1654 /* skip reserved chpid */
1655 if (chpid == VIRTIO_CCW_CHPID) {
1656 continue;
1658 if (!css->chpids[chpid].in_use) {
1659 return chpid;
1662 return MAX_CHPID + 1;
1665 static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type,
1666 bool is_virt)
1668 CssImage *css;
1670 trace_css_chpid_add(cssid, chpid, type);
1671 css = channel_subsys.css[cssid];
1672 if (!css) {
1673 return -EINVAL;
1675 if (css->chpids[chpid].in_use) {
1676 return -EEXIST;
1678 css->chpids[chpid].in_use = 1;
1679 css->chpids[chpid].type = type;
1680 css->chpids[chpid].is_virtual = is_virt;
1682 css_generate_chp_crws(cssid, chpid);
1684 return 0;
1687 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1689 PMCW *p = &sch->curr_status.pmcw;
1690 SCSW *s = &sch->curr_status.scsw;
1691 int i;
1692 CssImage *css = channel_subsys.css[sch->cssid];
1694 assert(css != NULL);
1695 memset(p, 0, sizeof(PMCW));
1696 p->flags |= PMCW_FLAGS_MASK_DNV;
1697 p->devno = sch->devno;
1698 /* single path */
1699 p->pim = 0x80;
1700 p->pom = 0xff;
1701 p->pam = 0x80;
1702 p->chpid[0] = chpid;
1703 if (!css->chpids[chpid].in_use) {
1704 css_add_chpid(sch->cssid, chpid, type, true);
1707 memset(s, 0, sizeof(SCSW));
1708 sch->curr_status.mba = 0;
1709 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1710 sch->curr_status.mda[i] = 0;
1714 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1716 uint8_t real_cssid;
1718 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1720 if (!channel_subsys.css[real_cssid]) {
1721 return NULL;
1724 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1725 return NULL;
1728 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1732 * Return free device number in subchannel set.
1734 * Return index of the first free device number in the subchannel set
1735 * identified by @p cssid and @p ssid, beginning the search at @p
1736 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1737 * MAX_SCHID if there are no free device numbers in the subchannel
1738 * set.
1740 static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
1741 uint16_t start)
1743 uint32_t round;
1745 for (round = 0; round <= MAX_DEVNO; round++) {
1746 uint16_t devno = (start + round) % MAX_DEVNO;
1748 if (!css_devno_used(cssid, ssid, devno)) {
1749 return devno;
1752 return MAX_DEVNO + 1;
1756 * Return first free subchannel (id) in subchannel set.
1758 * Return index of the first free subchannel in the subchannel set
1759 * identified by @p cssid and @p ssid, if there is any. Return a value
1760 * exceeding MAX_SCHID if there are no free subchannels in the
1761 * subchannel set.
1763 static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
1765 uint32_t schid;
1767 for (schid = 0; schid <= MAX_SCHID; schid++) {
1768 if (!css_find_subch(1, cssid, ssid, schid)) {
1769 return schid;
1772 return MAX_SCHID + 1;
1776 * Return first free subchannel (id) in subchannel set for a device number
1778 * Verify the device number @p devno is not used yet in the subchannel
1779 * set identified by @p cssid and @p ssid. Set @p schid to the index
1780 * of the first free subchannel in the subchannel set, if there is
1781 * any. Return true if everything succeeded and false otherwise.
1783 static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
1784 uint16_t devno, uint16_t *schid,
1785 Error **errp)
1787 uint32_t free_schid;
1789 assert(schid);
1790 if (css_devno_used(cssid, ssid, devno)) {
1791 error_setg(errp, "Device %x.%x.%04x already exists",
1792 cssid, ssid, devno);
1793 return false;
1795 free_schid = css_find_free_subch(cssid, ssid);
1796 if (free_schid > MAX_SCHID) {
1797 error_setg(errp, "No free subchannel found for %x.%x.%04x",
1798 cssid, ssid, devno);
1799 return false;
1801 *schid = free_schid;
1802 return true;
1806 * Return first free subchannel (id) and device number
1808 * Locate the first free subchannel and first free device number in
1809 * any of the subchannel sets of the channel subsystem identified by
1810 * @p cssid. Return false if no free subchannel / device number could
1811 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
1812 * the available subchannel and device number and return true.
1814 * May modify @p ssid, @p devno and / or @p schid even if no free
1815 * subchannel / device number could be found.
1817 static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
1818 uint16_t *devno, uint16_t *schid,
1819 Error **errp)
1821 uint32_t free_schid, free_devno;
1823 assert(ssid && devno && schid);
1824 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
1825 free_schid = css_find_free_subch(cssid, *ssid);
1826 if (free_schid > MAX_SCHID) {
1827 continue;
1829 free_devno = css_find_free_devno(cssid, *ssid, free_schid);
1830 if (free_devno > MAX_DEVNO) {
1831 continue;
1833 *schid = free_schid;
1834 *devno = free_devno;
1835 return true;
1837 error_setg(errp, "Virtual channel subsystem is full!");
1838 return false;
1841 bool css_subch_visible(SubchDev *sch)
1843 if (sch->ssid > channel_subsys.max_ssid) {
1844 return false;
1847 if (sch->cssid != channel_subsys.default_cssid) {
1848 return (channel_subsys.max_cssid > 0);
1851 return true;
1854 bool css_present(uint8_t cssid)
1856 return (channel_subsys.css[cssid] != NULL);
1859 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1861 if (!channel_subsys.css[cssid]) {
1862 return false;
1864 if (!channel_subsys.css[cssid]->sch_set[ssid]) {
1865 return false;
1868 return !!test_bit(devno,
1869 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
1872 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
1873 uint16_t devno, SubchDev *sch)
1875 CssImage *css;
1876 SubchSet *s_set;
1878 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
1879 devno);
1880 if (!channel_subsys.css[cssid]) {
1881 fprintf(stderr,
1882 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1883 __func__, cssid, ssid, schid);
1884 return;
1886 css = channel_subsys.css[cssid];
1888 if (!css->sch_set[ssid]) {
1889 css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
1891 s_set = css->sch_set[ssid];
1893 s_set->sch[schid] = sch;
1894 if (sch) {
1895 set_bit(schid, s_set->schids_used);
1896 set_bit(devno, s_set->devnos_used);
1897 } else {
1898 clear_bit(schid, s_set->schids_used);
1899 clear_bit(devno, s_set->devnos_used);
1903 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
1905 CrwContainer *crw_cont;
1907 trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
1908 /* TODO: Maybe use a static crw pool? */
1909 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1910 if (!crw_cont) {
1911 channel_subsys.crws_lost = true;
1912 return;
1914 crw_cont->crw.flags = (rsc << 8) | erc;
1915 if (chain) {
1916 crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
1918 crw_cont->crw.rsid = rsid;
1919 if (channel_subsys.crws_lost) {
1920 crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
1921 channel_subsys.crws_lost = false;
1924 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
1926 if (channel_subsys.do_crw_mchk) {
1927 channel_subsys.do_crw_mchk = false;
1928 /* Inject crw pending machine check. */
1929 s390_crw_mchk();
1933 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
1934 int hotplugged, int add)
1936 uint8_t guest_cssid;
1937 bool chain_crw;
1939 if (add && !hotplugged) {
1940 return;
1942 if (channel_subsys.max_cssid == 0) {
1943 /* Default cssid shows up as 0. */
1944 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
1945 } else {
1946 /* Show real cssid to the guest. */
1947 guest_cssid = cssid;
1950 * Only notify for higher subchannel sets/channel subsystems if the
1951 * guest has enabled it.
1953 if ((ssid > channel_subsys.max_ssid) ||
1954 (guest_cssid > channel_subsys.max_cssid) ||
1955 ((channel_subsys.max_cssid == 0) &&
1956 (cssid != channel_subsys.default_cssid))) {
1957 return;
1959 chain_crw = (channel_subsys.max_ssid > 0) ||
1960 (channel_subsys.max_cssid > 0);
1961 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
1962 if (chain_crw) {
1963 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
1964 (guest_cssid << 8) | (ssid << 4));
1966 /* RW_ERC_IPI --> clear pending interrupts */
1967 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
1970 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
1972 /* TODO */
1975 void css_generate_css_crws(uint8_t cssid)
1977 if (!channel_subsys.sei_pending) {
1978 css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
1980 channel_subsys.sei_pending = true;
1983 void css_clear_sei_pending(void)
1985 channel_subsys.sei_pending = false;
1988 int css_enable_mcsse(void)
1990 trace_css_enable_facility("mcsse");
1991 channel_subsys.max_cssid = MAX_CSSID;
1992 return 0;
1995 int css_enable_mss(void)
1997 trace_css_enable_facility("mss");
1998 channel_subsys.max_ssid = MAX_SSID;
1999 return 0;
2002 void css_reset_sch(SubchDev *sch)
2004 PMCW *p = &sch->curr_status.pmcw;
2006 if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
2007 sch->disable_cb(sch);
2010 p->intparm = 0;
2011 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
2012 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
2013 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
2014 p->flags |= PMCW_FLAGS_MASK_DNV;
2015 p->devno = sch->devno;
2016 p->pim = 0x80;
2017 p->lpm = p->pim;
2018 p->pnom = 0;
2019 p->lpum = 0;
2020 p->mbi = 0;
2021 p->pom = 0xff;
2022 p->pam = 0x80;
2023 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
2024 PMCW_CHARS_MASK_CSENSE);
2026 memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
2027 sch->curr_status.mba = 0;
2029 sch->channel_prog = 0x0;
2030 sch->last_cmd_valid = false;
2031 sch->thinint_active = false;
2034 void css_reset(void)
2036 CrwContainer *crw_cont;
2038 /* Clean up monitoring. */
2039 channel_subsys.chnmon_active = false;
2040 channel_subsys.chnmon_area = 0;
2042 /* Clear pending CRWs. */
2043 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
2044 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
2045 g_free(crw_cont);
2047 channel_subsys.sei_pending = false;
2048 channel_subsys.do_crw_mchk = true;
2049 channel_subsys.crws_lost = false;
2051 /* Reset maximum ids. */
2052 channel_subsys.max_cssid = 0;
2053 channel_subsys.max_ssid = 0;
2056 static void get_css_devid(Object *obj, Visitor *v, const char *name,
2057 void *opaque, Error **errp)
2059 DeviceState *dev = DEVICE(obj);
2060 Property *prop = opaque;
2061 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2062 char buffer[] = "xx.x.xxxx";
2063 char *p = buffer;
2064 int r;
2066 if (dev_id->valid) {
2068 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
2069 dev_id->ssid, dev_id->devid);
2070 assert(r == sizeof(buffer) - 1);
2072 /* drop leading zero */
2073 if (dev_id->cssid <= 0xf) {
2074 p++;
2076 } else {
2077 snprintf(buffer, sizeof(buffer), "<unset>");
2080 visit_type_str(v, name, &p, errp);
2084 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
2086 static void set_css_devid(Object *obj, Visitor *v, const char *name,
2087 void *opaque, Error **errp)
2089 DeviceState *dev = DEVICE(obj);
2090 Property *prop = opaque;
2091 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
2092 Error *local_err = NULL;
2093 char *str;
2094 int num, n1, n2;
2095 unsigned int cssid, ssid, devid;
2097 if (dev->realized) {
2098 qdev_prop_set_after_realize(dev, name, errp);
2099 return;
2102 visit_type_str(v, name, &str, &local_err);
2103 if (local_err) {
2104 error_propagate(errp, local_err);
2105 return;
2108 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
2109 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
2110 error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
2111 goto out;
2113 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
2114 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
2115 cssid, ssid);
2116 goto out;
2119 dev_id->cssid = cssid;
2120 dev_id->ssid = ssid;
2121 dev_id->devid = devid;
2122 dev_id->valid = true;
2124 out:
2125 g_free(str);
2128 PropertyInfo css_devid_propinfo = {
2129 .name = "str",
2130 .description = "Identifier of an I/O device in the channel "
2131 "subsystem, example: fe.1.23ab",
2132 .get = get_css_devid,
2133 .set = set_css_devid,
2136 PropertyInfo css_devid_ro_propinfo = {
2137 .name = "str",
2138 .description = "Read-only identifier of an I/O device in the channel "
2139 "subsystem, example: fe.1.23ab",
2140 .get = get_css_devid,
2143 SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss,
2144 Error **errp)
2146 uint16_t schid = 0;
2147 SubchDev *sch;
2149 if (bus_id.valid) {
2150 if (is_virtual != (bus_id.cssid == VIRTUAL_CSSID)) {
2151 error_setg(errp, "cssid %hhx not valid for %s devices",
2152 bus_id.cssid,
2153 (is_virtual ? "virtual" : "non-virtual"));
2154 return NULL;
2158 if (bus_id.valid) {
2159 if (squash_mcss) {
2160 bus_id.cssid = channel_subsys.default_cssid;
2161 } else if (!channel_subsys.css[bus_id.cssid]) {
2162 css_create_css_image(bus_id.cssid, false);
2165 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
2166 bus_id.devid, &schid, errp)) {
2167 return NULL;
2169 } else if (squash_mcss || is_virtual) {
2170 bus_id.cssid = channel_subsys.default_cssid;
2172 if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2173 &bus_id.devid, &schid, errp)) {
2174 return NULL;
2176 } else {
2177 for (bus_id.cssid = 0; bus_id.cssid < MAX_CSSID; ++bus_id.cssid) {
2178 if (bus_id.cssid == VIRTUAL_CSSID) {
2179 continue;
2182 if (!channel_subsys.css[bus_id.cssid]) {
2183 css_create_css_image(bus_id.cssid, false);
2186 if (css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2187 &bus_id.devid, &schid,
2188 NULL)) {
2189 break;
2191 if (bus_id.cssid == MAX_CSSID) {
2192 error_setg(errp, "Virtual channel subsystem is full!");
2193 return NULL;
2198 sch = g_malloc0(sizeof(*sch));
2199 sch->cssid = bus_id.cssid;
2200 sch->ssid = bus_id.ssid;
2201 sch->devno = bus_id.devid;
2202 sch->schid = schid;
2203 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
2204 return sch;
2207 static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id)
2209 char *fid_path;
2210 FILE *fd;
2211 uint32_t chpid[8];
2212 int i;
2213 PMCW *p = &sch->curr_status.pmcw;
2215 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
2216 dev_id->cssid, dev_id->ssid, dev_id->devid);
2217 fd = fopen(fid_path, "r");
2218 if (fd == NULL) {
2219 error_report("%s: open %s failed", __func__, fid_path);
2220 g_free(fid_path);
2221 return -EINVAL;
2224 if (fscanf(fd, "%x %x %x %x %x %x %x %x",
2225 &chpid[0], &chpid[1], &chpid[2], &chpid[3],
2226 &chpid[4], &chpid[5], &chpid[6], &chpid[7]) != 8) {
2227 fclose(fd);
2228 g_free(fid_path);
2229 return -EINVAL;
2232 for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
2233 p->chpid[i] = chpid[i];
2236 fclose(fd);
2237 g_free(fid_path);
2239 return 0;
2242 static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id)
2244 char *fid_path;
2245 FILE *fd;
2246 uint32_t pim, pam, pom;
2247 PMCW *p = &sch->curr_status.pmcw;
2249 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
2250 dev_id->cssid, dev_id->ssid, dev_id->devid);
2251 fd = fopen(fid_path, "r");
2252 if (fd == NULL) {
2253 error_report("%s: open %s failed", __func__, fid_path);
2254 g_free(fid_path);
2255 return -EINVAL;
2258 if (fscanf(fd, "%x %x %x", &pim, &pam, &pom) != 3) {
2259 fclose(fd);
2260 g_free(fid_path);
2261 return -EINVAL;
2264 p->pim = pim;
2265 p->pam = pam;
2266 p->pom = pom;
2267 fclose(fd);
2268 g_free(fid_path);
2270 return 0;
2273 static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type,
2274 CssDevId *dev_id)
2276 char *fid_path;
2277 FILE *fd;
2279 fid_path = g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
2280 dev_id->cssid, chpid);
2281 fd = fopen(fid_path, "r");
2282 if (fd == NULL) {
2283 error_report("%s: open %s failed", __func__, fid_path);
2284 g_free(fid_path);
2285 return -EINVAL;
2288 if (fscanf(fd, "%x", type) != 1) {
2289 fclose(fd);
2290 g_free(fid_path);
2291 return -EINVAL;
2294 fclose(fd);
2295 g_free(fid_path);
2297 return 0;
2301 * We currently retrieve the real device information from sysfs to build the
2302 * guest subchannel information block without considering the migration feature.
2303 * We need to revisit this problem when we want to add migration support.
2305 int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id)
2307 CssImage *css = channel_subsys.css[sch->cssid];
2308 PMCW *p = &sch->curr_status.pmcw;
2309 SCSW *s = &sch->curr_status.scsw;
2310 uint32_t type;
2311 int i, ret;
2313 assert(css != NULL);
2314 memset(p, 0, sizeof(PMCW));
2315 p->flags |= PMCW_FLAGS_MASK_DNV;
2316 /* We are dealing with I/O subchannels only. */
2317 p->devno = sch->devno;
2319 /* Grab path mask from sysfs. */
2320 ret = css_sch_get_path_masks(sch, dev_id);
2321 if (ret) {
2322 return ret;
2325 /* Grab chpids from sysfs. */
2326 ret = css_sch_get_chpids(sch, dev_id);
2327 if (ret) {
2328 return ret;
2331 /* Build chpid type. */
2332 for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
2333 if (p->chpid[i] && !css->chpids[p->chpid[i]].in_use) {
2334 ret = css_sch_get_chpid_type(p->chpid[i], &type, dev_id);
2335 if (ret) {
2336 return ret;
2338 css_add_chpid(sch->cssid, p->chpid[i], type, false);
2342 memset(s, 0, sizeof(SCSW));
2343 sch->curr_status.mba = 0;
2344 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
2345 sch->curr_status.mda[i] = 0;
2348 return 0;