target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "cpu.h"
  23 #include "exec/memory.h"
  24 #include "qemu/host-utils.h"
  25 #include "exec/helper-proto.h"
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #include "exec/address-spaces.h"
  29 #ifdef CONFIG_KVM
  30 #include <linux/kvm.h>
  31 #endif
  32 #include "exec/exec-all.h"
  33 #include "exec/cpu_ldst.h"
  34
  35 #if !defined(CONFIG_USER_ONLY)
  36 #include "hw/watchdog/wdt_diag288.h"
  37 #include "sysemu/cpus.h"
  38 #include "sysemu/sysemu.h"
  39 #include "hw/s390x/ebcdic.h"
  40 #include "hw/s390x/ipl.h"
  41 #endif
  42
  43 /* #define DEBUG_HELPER */
  44 #ifdef DEBUG_HELPER
  45 #define HELPER_LOG(x...) qemu_log(x)
  46 #else
  47 #define HELPER_LOG(x...)
  48 #endif
  49
  50 /* Raise an exception dynamically from a helper function.  */
  51 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  52                                      uintptr_t retaddr)
  53 {
  54     CPUState *cs = CPU(s390_env_get_cpu(env));
  55     int t;
  56
  57     cs->exception_index = EXCP_PGM;
  58     env->int_pgm_code = excp;
  59
  60     /* Use the (ultimate) callers address to find the insn that trapped.  */
  61     cpu_restore_state(cs, retaddr);
  62
  63     /* Advance past the insn.  */
  64     t = cpu_ldub_code(env, env->psw.addr);
  65     env->int_pgm_ilen = t = get_ilen(t);
  66     env->psw.addr += t;
  67
  68     cpu_loop_exit(cs);
  69 }
  70
  71 /* Raise an exception statically from a TB.  */
  72 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  73 {
  74     CPUState *cs = CPU(s390_env_get_cpu(env));
  75
  76     HELPER_LOG("%s: exception %d\n", __func__, excp);
  77     cs->exception_index = excp;
  78     cpu_loop_exit(cs);
  79 }
  80
  81 #ifndef CONFIG_USER_ONLY
  82
  83 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  84 {
  85     S390CPU *cpu = s390_env_get_cpu(env);
  86
  87     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  88                   env->psw.addr);
  89
  90     if (kvm_enabled()) {
  91 #ifdef CONFIG_KVM
  92         struct kvm_s390_irq irq = {
  93             .type = KVM_S390_PROGRAM_INT,
  94             .u.pgm.code = code,
  95         };
  96
  97         kvm_s390_vcpu_interrupt(cpu, &irq);
  98 #endif
  99     } else {
 100         CPUState *cs = CPU(cpu);
 101
 102         env->int_pgm_code = code;
 103         env->int_pgm_ilen = ilen;
 104         cs->exception_index = EXCP_PGM;
 105         cpu_loop_exit(cs);
 106     }
 107 }
 108
 109 /* SCLP service call */
 110 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 111 {
 112     int r = sclp_service_call(env, r1, r2);
 113     if (r < 0) {
 114         program_interrupt(env, -r, 4);
 115         return 0;
 116     }
 117     return r;
 118 }
 119
 120 #ifndef CONFIG_USER_ONLY
 121 static int modified_clear_reset(S390CPU *cpu)
 122 {
 123     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 124     CPUState *t;
 125
 126     pause_all_vcpus();
 127     cpu_synchronize_all_states();
 128     CPU_FOREACH(t) {
 129         run_on_cpu(t, s390_do_cpu_full_reset, NULL);
 130     }
 131     s390_cmma_reset();
 132     subsystem_reset();
 133     s390_crypto_reset();
 134     scc->load_normal(CPU(cpu));
 135     cpu_synchronize_all_post_reset();
 136     resume_all_vcpus();
 137     return 0;
 138 }
 139
 140 static int load_normal_reset(S390CPU *cpu)
 141 {
 142     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 143     CPUState *t;
 144
 145     pause_all_vcpus();
 146     cpu_synchronize_all_states();
 147     CPU_FOREACH(t) {
 148         run_on_cpu(t, s390_do_cpu_reset, NULL);
 149     }
 150     s390_cmma_reset();
 151     subsystem_reset();
 152     scc->initial_cpu_reset(CPU(cpu));
 153     scc->load_normal(CPU(cpu));
 154     cpu_synchronize_all_post_reset();
 155     resume_all_vcpus();
 156     return 0;
 157 }
 158
 159 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 160 {
 161     uint64_t func = env->regs[r1];
 162     uint64_t timeout = env->regs[r1 + 1];
 163     uint64_t action = env->regs[r3];
 164     Object *obj;
 165     DIAG288State *diag288;
 166     DIAG288Class *diag288_class;
 167
 168     if (r1 % 2 || action != 0) {
 169         return -1;
 170     }
 171
 172     /* Timeout must be more than 15 seconds except for timer deletion */
 173     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 174         return -1;
 175     }
 176
 177     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 178     if (!obj) {
 179         return -1;
 180     }
 181
 182     diag288 = DIAG288(obj);
 183     diag288_class = DIAG288_GET_CLASS(diag288);
 184     return diag288_class->handle_timer(diag288, func, timeout);
 185 }
 186
 187 #define DIAG_308_RC_OK              0x0001
 188 #define DIAG_308_RC_NO_CONF         0x0102
 189 #define DIAG_308_RC_INVALID         0x0402
 190
 191 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 192 {
 193     uint64_t addr =  env->regs[r1];
 194     uint64_t subcode = env->regs[r3];
 195     IplParameterBlock *iplb;
 196
 197     if (env->psw.mask & PSW_MASK_PSTATE) {
 198         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 199         return;
 200     }
 201
 202     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 203         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 204         return;
 205     }
 206
 207     switch (subcode) {
 208     case 0:
 209         modified_clear_reset(s390_env_get_cpu(env));
 210         if (tcg_enabled()) {
 211             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 212         }
 213         break;
 214     case 1:
 215         load_normal_reset(s390_env_get_cpu(env));
 216         if (tcg_enabled()) {
 217             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 218         }
 219         break;
 220     case 3:
 221         s390_reipl_request();
 222         if (tcg_enabled()) {
 223             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 224         }
 225         break;
 226     case 5:
 227         if ((r1 & 1) || (addr & 0x0fffULL)) {
 228             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 229             return;
 230         }
 231         if (!address_space_access_valid(&address_space_memory, addr,
 232                                         sizeof(IplParameterBlock), false)) {
 233             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 234             return;
 235         }
 236         iplb = g_malloc0(sizeof(IplParameterBlock));
 237         cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
 238         if (!iplb_valid_len(iplb)) {
 239             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 240             goto out;
 241         }
 242
 243         cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
 244
 245         if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
 246             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 247             goto out;
 248         }
 249
 250         s390_ipl_update_diag308(iplb);
 251         env->regs[r1 + 1] = DIAG_308_RC_OK;
 252 out:
 253         g_free(iplb);
 254         return;
 255     case 6:
 256         if ((r1 & 1) || (addr & 0x0fffULL)) {
 257             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 258             return;
 259         }
 260         if (!address_space_access_valid(&address_space_memory, addr,
 261                                         sizeof(IplParameterBlock), true)) {
 262             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 263             return;
 264         }
 265         iplb = s390_ipl_get_iplb();
 266         if (iplb) {
 267             cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
 268             env->regs[r1 + 1] = DIAG_308_RC_OK;
 269         } else {
 270             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 271         }
 272         return;
 273     default:
 274         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 275         break;
 276     }
 277 }
 278 #endif
 279
 280 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 281 {
 282     uint64_t r;
 283
 284     switch (num) {
 285     case 0x500:
 286         /* KVM hypercall */
 287         r = s390_virtio_hypercall(env);
 288         break;
 289     case 0x44:
 290         /* yield */
 291         r = 0;
 292         break;
 293     case 0x308:
 294         /* ipl */
 295         handle_diag_308(env, r1, r3);
 296         r = 0;
 297         break;
 298     default:
 299         r = -1;
 300         break;
 301     }
 302
 303     if (r) {
 304         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 305     }
 306 }
 307
 308 /* Set Prefix */
 309 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 310 {
 311     CPUState *cs = CPU(s390_env_get_cpu(env));
 312     uint32_t prefix = a1 & 0x7fffe000;
 313
 314     env->psa = prefix;
 315     HELPER_LOG("prefix: %#x\n", prefix);
 316     tlb_flush_page(cs, 0);
 317     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 318 }
 319
 320 /* Store Clock */
 321 uint64_t HELPER(stck)(CPUS390XState *env)
 322 {
 323     uint64_t time;
 324
 325     time = env->tod_offset +
 326         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 327
 328     return time;
 329 }
 330
 331 /* Set Clock Comparator */
 332 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 333 {
 334     if (time == -1ULL) {
 335         return;
 336     }
 337
 338     env->ckc = time;
 339
 340     /* difference between origins */
 341     time -= env->tod_offset;
 342
 343     /* nanoseconds */
 344     time = tod2time(time);
 345
 346     timer_mod(env->tod_timer, env->tod_basetime + time);
 347 }
 348
 349 /* Store Clock Comparator */
 350 uint64_t HELPER(stckc)(CPUS390XState *env)
 351 {
 352     return env->ckc;
 353 }
 354
 355 /* Set CPU Timer */
 356 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 357 {
 358     if (time == -1ULL) {
 359         return;
 360     }
 361
 362     /* nanoseconds */
 363     time = tod2time(time);
 364
 365     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 366
 367     timer_mod(env->cpu_timer, env->cputm);
 368 }
 369
 370 /* Store CPU Timer */
 371 uint64_t HELPER(stpt)(CPUS390XState *env)
 372 {
 373     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 374 }
 375
 376 /* Store System Information */
 377 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 378                       uint64_t r0, uint64_t r1)
 379 {
 380     int cc = 0;
 381     int sel1, sel2;
 382
 383     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 384         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 385         /* valid function code, invalid reserved bits */
 386         program_interrupt(env, PGM_SPECIFICATION, 2);
 387     }
 388
 389     sel1 = r0 & STSI_R0_SEL1_MASK;
 390     sel2 = r1 & STSI_R1_SEL2_MASK;
 391
 392     /* XXX: spec exception if sysib is not 4k-aligned */
 393
 394     switch (r0 & STSI_LEVEL_MASK) {
 395     case STSI_LEVEL_1:
 396         if ((sel1 == 1) && (sel2 == 1)) {
 397             /* Basic Machine Configuration */
 398             struct sysib_111 sysib;
 399
 400             memset(&sysib, 0, sizeof(sysib));
 401             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 402             /* same as machine type number in STORE CPU ID */
 403             ebcdic_put(sysib.type, "QEMU", 4);
 404             /* same as model number in STORE CPU ID */
 405             ebcdic_put(sysib.model, "QEMU            ", 16);
 406             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 407             ebcdic_put(sysib.plant, "QEMU", 4);
 408             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 409         } else if ((sel1 == 2) && (sel2 == 1)) {
 410             /* Basic Machine CPU */
 411             struct sysib_121 sysib;
 412
 413             memset(&sysib, 0, sizeof(sysib));
 414             /* XXX make different for different CPUs? */
 415             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 416             ebcdic_put(sysib.plant, "QEMU", 4);
 417             stw_p(&sysib.cpu_addr, env->cpu_num);
 418             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 419         } else if ((sel1 == 2) && (sel2 == 2)) {
 420             /* Basic Machine CPUs */
 421             struct sysib_122 sysib;
 422
 423             memset(&sysib, 0, sizeof(sysib));
 424             stl_p(&sysib.capability, 0x443afc29);
 425             /* XXX change when SMP comes */
 426             stw_p(&sysib.total_cpus, 1);
 427             stw_p(&sysib.active_cpus, 1);
 428             stw_p(&sysib.standby_cpus, 0);
 429             stw_p(&sysib.reserved_cpus, 0);
 430             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 431         } else {
 432             cc = 3;
 433         }
 434         break;
 435     case STSI_LEVEL_2:
 436         {
 437             if ((sel1 == 2) && (sel2 == 1)) {
 438                 /* LPAR CPU */
 439                 struct sysib_221 sysib;
 440
 441                 memset(&sysib, 0, sizeof(sysib));
 442                 /* XXX make different for different CPUs? */
 443                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 444                 ebcdic_put(sysib.plant, "QEMU", 4);
 445                 stw_p(&sysib.cpu_addr, env->cpu_num);
 446                 stw_p(&sysib.cpu_id, 0);
 447                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 448             } else if ((sel1 == 2) && (sel2 == 2)) {
 449                 /* LPAR CPUs */
 450                 struct sysib_222 sysib;
 451
 452                 memset(&sysib, 0, sizeof(sysib));
 453                 stw_p(&sysib.lpar_num, 0);
 454                 sysib.lcpuc = 0;
 455                 /* XXX change when SMP comes */
 456                 stw_p(&sysib.total_cpus, 1);
 457                 stw_p(&sysib.conf_cpus, 1);
 458                 stw_p(&sysib.standby_cpus, 0);
 459                 stw_p(&sysib.reserved_cpus, 0);
 460                 ebcdic_put(sysib.name, "QEMU    ", 8);
 461                 stl_p(&sysib.caf, 1000);
 462                 stw_p(&sysib.dedicated_cpus, 0);
 463                 stw_p(&sysib.shared_cpus, 0);
 464                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 465             } else {
 466                 cc = 3;
 467             }
 468             break;
 469         }
 470     case STSI_LEVEL_3:
 471         {
 472             if ((sel1 == 2) && (sel2 == 2)) {
 473                 /* VM CPUs */
 474                 struct sysib_322 sysib;
 475
 476                 memset(&sysib, 0, sizeof(sysib));
 477                 sysib.count = 1;
 478                 /* XXX change when SMP comes */
 479                 stw_p(&sysib.vm[0].total_cpus, 1);
 480                 stw_p(&sysib.vm[0].conf_cpus, 1);
 481                 stw_p(&sysib.vm[0].standby_cpus, 0);
 482                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 483                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 484                 stl_p(&sysib.vm[0].caf, 1000);
 485                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 486                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 487             } else {
 488                 cc = 3;
 489             }
 490             break;
 491         }
 492     case STSI_LEVEL_CURRENT:
 493         env->regs[0] = STSI_LEVEL_3;
 494         break;
 495     default:
 496         cc = 3;
 497         break;
 498     }
 499
 500     return cc;
 501 }
 502
 503 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 504                       uint64_t cpu_addr)
 505 {
 506     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 507
 508     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 509                __func__, order_code, r1, cpu_addr);
 510
 511     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 512        as parameter (input). Status (output) is always R1. */
 513
 514     switch (order_code) {
 515     case SIGP_SET_ARCH:
 516         /* switch arch */
 517         break;
 518     case SIGP_SENSE:
 519         /* enumerate CPU status */
 520         if (cpu_addr) {
 521             /* XXX implement when SMP comes */
 522             return 3;
 523         }
 524         env->regs[r1] &= 0xffffffff00000000ULL;
 525         cc = 1;
 526         break;
 527 #if !defined(CONFIG_USER_ONLY)
 528     case SIGP_RESTART:
 529         qemu_system_reset_request();
 530         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 531         break;
 532     case SIGP_STOP:
 533         qemu_system_shutdown_request();
 534         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 535         break;
 536 #endif
 537     default:
 538         /* unknown sigp */
 539         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 540         cc = SIGP_CC_NOT_OPERATIONAL;
 541     }
 542
 543     return cc;
 544 }
 545 #endif
 546
 547 #ifndef CONFIG_USER_ONLY
 548 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 549 {
 550     S390CPU *cpu = s390_env_get_cpu(env);
 551     ioinst_handle_xsch(cpu, r1);
 552 }
 553
 554 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 555 {
 556     S390CPU *cpu = s390_env_get_cpu(env);
 557     ioinst_handle_csch(cpu, r1);
 558 }
 559
 560 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 561 {
 562     S390CPU *cpu = s390_env_get_cpu(env);
 563     ioinst_handle_hsch(cpu, r1);
 564 }
 565
 566 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 567 {
 568     S390CPU *cpu = s390_env_get_cpu(env);
 569     ioinst_handle_msch(cpu, r1, inst >> 16);
 570 }
 571
 572 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 573 {
 574     S390CPU *cpu = s390_env_get_cpu(env);
 575     ioinst_handle_rchp(cpu, r1);
 576 }
 577
 578 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 579 {
 580     S390CPU *cpu = s390_env_get_cpu(env);
 581     ioinst_handle_rsch(cpu, r1);
 582 }
 583
 584 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 585 {
 586     S390CPU *cpu = s390_env_get_cpu(env);
 587     ioinst_handle_ssch(cpu, r1, inst >> 16);
 588 }
 589
 590 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 591 {
 592     S390CPU *cpu = s390_env_get_cpu(env);
 593     ioinst_handle_stsch(cpu, r1, inst >> 16);
 594 }
 595
 596 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 597 {
 598     S390CPU *cpu = s390_env_get_cpu(env);
 599     ioinst_handle_tsch(cpu, r1, inst >> 16);
 600 }
 601
 602 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 603 {
 604     S390CPU *cpu = s390_env_get_cpu(env);
 605     ioinst_handle_chsc(cpu, inst >> 16);
 606 }
 607 #endif
 608
 609 #ifndef CONFIG_USER_ONLY
 610 void HELPER(per_check_exception)(CPUS390XState *env)
 611 {
 612     CPUState *cs = CPU(s390_env_get_cpu(env));
 613
 614     if (env->per_perc_atmid) {
 615         env->int_pgm_code = PGM_PER;
 616         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 617
 618         cs->exception_index = EXCP_PGM;
 619         cpu_loop_exit(cs);
 620     }
 621 }
 622
 623 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 624 {
 625     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 626         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 627             || get_per_in_range(env, to)) {
 628             env->per_address = from;
 629             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 630         }
 631     }
 632 }
 633
 634 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 635 {
 636     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 637         env->per_address = addr;
 638         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 639
 640         /* If the instruction has to be nullified, trigger the
 641            exception immediately. */
 642         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 643             CPUState *cs = CPU(s390_env_get_cpu(env));
 644
 645             env->int_pgm_code = PGM_PER;
 646             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 647
 648             cs->exception_index = EXCP_PGM;
 649             cpu_loop_exit(cs);
 650         }
 651     }
 652 }
 653 #endif