hw/dma/puv3_dma.c

   1 /*
   2  * DMA device simulation in PKUnity SoC
   3  *
   4  * Copyright (C) 2010-2012 Guan Xuetao
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation, or any later version.
   9  * See the COPYING file in the top-level directory.
  10  */
  11 #include "hw/hw.h"
  12 #include "hw/sysbus.h"
  13
  14 #undef DEBUG_PUV3
  15 #include "hw/unicore32/puv3.h"
  16
  17 #define PUV3_DMA_CH_NR          (6)
  18 #define PUV3_DMA_CH_MASK        (0xff)
  19 #define PUV3_DMA_CH(offset)     ((offset) >> 8)
  20
  21 #define TYPE_PUV3_DMA "puv3_dma"
  22 #define PUV3_DMA(obj) OBJECT_CHECK(PUV3DMAState, (obj), TYPE_PUV3_DMA)
  23
  24 typedef struct PUV3DMAState {
  25     SysBusDevice parent_obj;
  26
  27     MemoryRegion iomem;
  28     uint32_t reg_CFG[PUV3_DMA_CH_NR];
  29 } PUV3DMAState;
  30
  31 static uint64_t puv3_dma_read(void *opaque, hwaddr offset,
  32         unsigned size)
  33 {
  34     PUV3DMAState *s = opaque;
  35     uint32_t ret = 0;
  36
  37     assert(PUV3_DMA_CH(offset) < PUV3_DMA_CH_NR);
  38
  39     switch (offset & PUV3_DMA_CH_MASK) {
  40     case 0x10:
  41         ret = s->reg_CFG[PUV3_DMA_CH(offset)];
  42         break;
  43     default:
  44         DPRINTF("Bad offset 0x%x\n", offset);
  45     }
  46     DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
  47
  48     return ret;
  49 }
  50
  51 static void puv3_dma_write(void *opaque, hwaddr offset,
  52         uint64_t value, unsigned size)
  53 {
  54     PUV3DMAState *s = opaque;
  55
  56     assert(PUV3_DMA_CH(offset) < PUV3_DMA_CH_NR);
  57
  58     switch (offset & PUV3_DMA_CH_MASK) {
  59     case 0x10:
  60         s->reg_CFG[PUV3_DMA_CH(offset)] = value;
  61         break;
  62     default:
  63         DPRINTF("Bad offset 0x%x\n", offset);
  64     }
  65     DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
  66 }
  67
  68 static const MemoryRegionOps puv3_dma_ops = {
  69     .read = puv3_dma_read,
  70     .write = puv3_dma_write,
  71     .impl = {
  72         .min_access_size = 4,
  73         .max_access_size = 4,
  74     },
  75     .endianness = DEVICE_NATIVE_ENDIAN,
  76 };
  77
  78 static int puv3_dma_init(SysBusDevice *dev)
  79 {
  80     PUV3DMAState *s = PUV3_DMA(dev);
  81     int i;
  82
  83     for (i = 0; i < PUV3_DMA_CH_NR; i++) {
  84         s->reg_CFG[i] = 0x0;
  85     }
  86
  87     memory_region_init_io(&s->iomem, OBJECT(s), &puv3_dma_ops, s, "puv3_dma",
  88             PUV3_REGS_OFFSET);
  89     sysbus_init_mmio(dev, &s->iomem);
  90
  91     return 0;
  92 }
  93
  94 static void puv3_dma_class_init(ObjectClass *klass, void *data)
  95 {
  96     SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
  97
  98     sdc->init = puv3_dma_init;
  99 }
 100
 101 static const TypeInfo puv3_dma_info = {
 102     .name = TYPE_PUV3_DMA,
 103     .parent = TYPE_SYS_BUS_DEVICE,
 104     .instance_size = sizeof(PUV3DMAState),
 105     .class_init = puv3_dma_class_init,
 106 };
 107
 108 static void puv3_dma_register_type(void)
 109 {
 110     type_register_static(&puv3_dma_info);
 111 }
 112
 113 type_init(puv3_dma_register_type)