2 * PowerPC internal definitions for qemu.
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 #ifndef PPC_INTERNAL_H
19 #define PPC_INTERNAL_H
21 #include "hw/registerfields.h"
23 #define FUNC_MASK(name, ret_type, size, max_val) \
24 static inline ret_type name(uint##size##_t start, \
27 ret_type ret, max_bit = size - 1; \
29 if (likely(start == 0)) { \
30 ret = max_val << (max_bit - end); \
31 } else if (likely(end == max_bit)) { \
32 ret = max_val >> start; \
34 ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \
35 (((uint##size##_t)(-1ULL) >> (end)) >> 1); \
36 if (unlikely(start > end)) { \
44 #if defined(TARGET_PPC64)
45 FUNC_MASK(MASK
, target_ulong
, 64, UINT64_MAX
);
47 FUNC_MASK(MASK
, target_ulong
, 32, UINT32_MAX
);
49 FUNC_MASK(mask_u32
, uint32_t, 32, UINT32_MAX
);
50 FUNC_MASK(mask_u64
, uint64_t, 64, UINT64_MAX
);
52 /*****************************************************************************/
53 /*** Instruction decoding ***/
54 #define EXTRACT_HELPER(name, shift, nb) \
55 static inline uint32_t name(uint32_t opcode) \
57 return extract32(opcode, shift, nb); \
60 #define EXTRACT_SHELPER(name, shift, nb) \
61 static inline int32_t name(uint32_t opcode) \
63 return sextract32(opcode, shift, nb); \
66 #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \
67 static inline uint32_t name(uint32_t opcode) \
69 return extract32(opcode, shift1, nb1) << nb2 | \
70 extract32(opcode, shift2, nb2); \
73 #define EXTRACT_HELPER_SPLIT_3(name, \
74 d0_bits, shift_op_d0, shift_d0, \
75 d1_bits, shift_op_d1, shift_d1, \
76 d2_bits, shift_op_d2, shift_d2) \
77 static inline int16_t name(uint32_t opcode) \
80 (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \
81 (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \
82 (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2)); \
87 EXTRACT_HELPER(opc1
, 26, 6);
89 EXTRACT_HELPER(opc2
, 1, 5);
91 EXTRACT_HELPER(opc3
, 6, 5);
93 EXTRACT_HELPER(opc4
, 16, 5);
94 /* Update Cr0 flags */
95 EXTRACT_HELPER(Rc
, 0, 1);
96 /* Update Cr6 flags (Altivec) */
97 EXTRACT_HELPER(Rc21
, 10, 1);
99 EXTRACT_HELPER(rD
, 21, 5);
101 EXTRACT_HELPER(rS
, 21, 5);
103 EXTRACT_HELPER(rA
, 16, 5);
105 EXTRACT_HELPER(rB
, 11, 5);
107 EXTRACT_HELPER(rC
, 6, 5);
109 EXTRACT_HELPER(crfD
, 23, 3);
110 EXTRACT_HELPER(BF
, 23, 3);
111 EXTRACT_HELPER(crfS
, 18, 3);
112 EXTRACT_HELPER(crbD
, 21, 5);
113 EXTRACT_HELPER(crbA
, 16, 5);
114 EXTRACT_HELPER(crbB
, 11, 5);
116 EXTRACT_HELPER(_SPR
, 11, 10);
117 static inline uint32_t SPR(uint32_t opcode
)
119 uint32_t sprn
= _SPR(opcode
);
121 return ((sprn
>> 5) & 0x1F) | ((sprn
& 0x1F) << 5);
123 /*** Get constants ***/
124 /* 16 bits signed immediate value */
125 EXTRACT_SHELPER(SIMM
, 0, 16);
126 /* 16 bits unsigned immediate value */
127 EXTRACT_HELPER(UIMM
, 0, 16);
128 /* 5 bits signed immediate value */
129 EXTRACT_SHELPER(SIMM5
, 16, 5);
130 /* 5 bits signed immediate value */
131 EXTRACT_HELPER(UIMM5
, 16, 5);
132 /* 4 bits unsigned immediate value */
133 EXTRACT_HELPER(UIMM4
, 16, 4);
135 EXTRACT_HELPER(NB
, 11, 5);
137 EXTRACT_HELPER(SH
, 11, 5);
138 /* lwat/stwat/ldat/lwat */
139 EXTRACT_HELPER(FC
, 11, 5);
140 /* Vector shift count */
141 EXTRACT_HELPER(VSH
, 6, 4);
143 EXTRACT_HELPER(MB
, 6, 5);
145 EXTRACT_HELPER(ME
, 1, 5);
147 EXTRACT_HELPER(TO
, 21, 5);
149 EXTRACT_HELPER(CRM
, 12, 8);
151 #ifndef CONFIG_USER_ONLY
152 EXTRACT_HELPER(SR
, 16, 4);
156 EXTRACT_HELPER(FPBF
, 23, 3);
157 EXTRACT_HELPER(FPIMM
, 12, 4);
158 EXTRACT_HELPER(FPL
, 25, 1);
159 EXTRACT_HELPER(FPFLM
, 17, 8);
160 EXTRACT_HELPER(FPW
, 16, 1);
163 EXTRACT_HELPER(RM
, 11, 2);
166 EXTRACT_HELPER_SPLIT_3(DX
, 10, 6, 6, 5, 16, 1, 1, 0, 0)
167 #if defined(TARGET_PPC64)
169 EXTRACT_HELPER(L
, 16, 2);
172 /*** Jump target decoding ***/
173 /* Immediate address */
174 static inline target_ulong
LI(uint32_t opcode
)
176 return (opcode
>> 0) & 0x03FFFFFC;
179 static inline uint32_t BD(uint32_t opcode
)
181 return (opcode
>> 0) & 0xFFFC;
184 EXTRACT_HELPER(BO
, 21, 5);
185 EXTRACT_HELPER(BI
, 16, 5);
186 /* Absolute/relative address */
187 EXTRACT_HELPER(AA
, 1, 1);
189 EXTRACT_HELPER(LK
, 0, 1);
192 EXTRACT_HELPER(DCM
, 10, 6)
195 EXTRACT_HELPER(RMC
, 9, 2)
196 EXTRACT_HELPER(Rrm
, 16, 1)
198 EXTRACT_HELPER_SPLIT(DQxT
, 3, 1, 21, 5);
199 EXTRACT_HELPER_SPLIT(xT
, 0, 1, 21, 5);
200 EXTRACT_HELPER_SPLIT(xS
, 0, 1, 21, 5);
201 EXTRACT_HELPER_SPLIT(xA
, 2, 1, 16, 5);
202 EXTRACT_HELPER_SPLIT(xB
, 1, 1, 11, 5);
203 EXTRACT_HELPER_SPLIT(xC
, 3, 1, 6, 5);
204 EXTRACT_HELPER(DM
, 8, 2);
205 EXTRACT_HELPER(UIM
, 16, 2);
206 EXTRACT_HELPER(SHW
, 8, 2);
207 EXTRACT_HELPER(SP
, 19, 2);
208 EXTRACT_HELPER(IMM8
, 11, 8);
209 EXTRACT_HELPER(DCMX
, 16, 7);
210 EXTRACT_HELPER_SPLIT_3(DCMX_XV
, 5, 16, 0, 1, 2, 5, 1, 6, 6);
212 void helper_compute_fprf_float16(CPUPPCState
*env
, float16 arg
);
213 void helper_compute_fprf_float32(CPUPPCState
*env
, float32 arg
);
214 void helper_compute_fprf_float128(CPUPPCState
*env
, float128 arg
);
218 int ppc_fixup_cpu(PowerPCCPU
*cpu
);
219 void create_ppc_opcodes(PowerPCCPU
*cpu
, Error
**errp
);
220 void destroy_ppc_opcodes(PowerPCCPU
*cpu
);
223 void ppc_gdb_init(CPUState
*cs
, PowerPCCPUClass
*ppc
);
224 gchar
*ppc_gdb_arch_name(CPUState
*cs
);
227 * prot_for_access_type:
228 * @access_type: Access type
230 * Return the protection bit required for the given access type.
232 static inline int prot_for_access_type(MMUAccessType access_type
)
234 switch (access_type
) {
242 g_assert_not_reached();
245 /* PowerPC MMU emulation */
247 typedef struct mmu_ctx_t mmu_ctx_t
;
248 bool ppc_xlate(PowerPCCPU
*cpu
, vaddr eaddr
, MMUAccessType access_type
,
249 hwaddr
*raddrp
, int *psizep
, int *protp
,
250 int mmu_idx
, bool guest_visible
);
251 int get_physical_address_wtlb(CPUPPCState
*env
, mmu_ctx_t
*ctx
,
253 MMUAccessType access_type
, int type
,
255 /* Software driven TLB helpers */
256 int ppc6xx_tlb_getnum(CPUPPCState
*env
, target_ulong eaddr
,
257 int way
, int is_code
);
258 /* Context used internally during MMU translations */
260 hwaddr raddr
; /* Real address */
261 hwaddr eaddr
; /* Effective address */
262 int prot
; /* Protection bits */
263 hwaddr hash
[2]; /* Pagetable hash values */
264 target_ulong ptem
; /* Virtual segment ID | API */
265 int key
; /* Access key */
266 int nx
; /* Non-execute area */
269 /* Common routines used by software and hardware TLBs emulation */
270 static inline int pte_is_valid(target_ulong pte0
)
272 return pte0
& 0x80000000 ? 1 : 0;
275 static inline void pte_invalidate(target_ulong
*pte0
)
277 *pte0
&= ~0x80000000;
280 #define PTE_PTEM_MASK 0x7FFFFFBF
281 #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B)
283 #ifdef CONFIG_USER_ONLY
284 void ppc_cpu_record_sigsegv(CPUState
*cs
, vaddr addr
,
285 MMUAccessType access_type
,
286 bool maperr
, uintptr_t ra
);
288 bool ppc_cpu_tlb_fill(CPUState
*cs
, vaddr address
, int size
,
289 MMUAccessType access_type
, int mmu_idx
,
290 bool probe
, uintptr_t retaddr
);
291 G_NORETURN
void ppc_cpu_do_unaligned_access(CPUState
*cs
, vaddr addr
,
292 MMUAccessType access_type
, int mmu_idx
,
296 FIELD(GER_MSK
, XMSK
, 0, 4)
297 FIELD(GER_MSK
, YMSK
, 4, 4)
298 FIELD(GER_MSK
, PMSK
, 8, 8)
300 static inline int ger_pack_masks(int pmsk
, int ymsk
, int xmsk
)
303 msk
= FIELD_DP32(msk
, GER_MSK
, XMSK
, xmsk
);
304 msk
= FIELD_DP32(msk
, GER_MSK
, YMSK
, ymsk
);
305 msk
= FIELD_DP32(msk
, GER_MSK
, PMSK
, pmsk
);
309 #endif /* PPC_INTERNAL_H */