hw/s390x/s390-pci-bus.c

   1 /*
   2  * s390 PCI BUS
   3  *
   4  * Copyright 2014 IBM Corp.
   5  * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
   6  *            Hong Bo Li <lihbbj@cn.ibm.com>
   7  *            Yi Min Zhao <zyimin@cn.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or (at
  10  * your option) any later version. See the COPYING file in the top-level
  11  * directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qapi/error.h"
  16 #include "qapi/visitor.h"
  17 #include "qemu-common.h"
  18 #include "cpu.h"
  19 #include "s390-pci-bus.h"
  20 #include "s390-pci-inst.h"
  21 #include "hw/pci/pci_bus.h"
  22 #include "hw/pci/pci_bridge.h"
  23 #include "hw/pci/msi.h"
  24 #include "qemu/error-report.h"
  25
  26 #ifndef DEBUG_S390PCI_BUS
  27 #define DEBUG_S390PCI_BUS  0
  28 #endif
  29
  30 #define DPRINTF(fmt, ...)                                         \
  31     do {                                                          \
  32         if (DEBUG_S390PCI_BUS) {                                  \
  33             fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \
  34         }                                                         \
  35     } while (0)
  36
  37 S390pciState *s390_get_phb(void)
  38 {
  39     static S390pciState *phb;
  40
  41     if (!phb) {
  42         phb = S390_PCI_HOST_BRIDGE(
  43             object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
  44         assert(phb != NULL);
  45     }
  46
  47     return phb;
  48 }
  49
  50 int pci_chsc_sei_nt2_get_event(void *res)
  51 {
  52     ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
  53     PciCcdfAvail *accdf;
  54     PciCcdfErr *eccdf;
  55     int rc = 1;
  56     SeiContainer *sei_cont;
  57     S390pciState *s = s390_get_phb();
  58
  59     sei_cont = QTAILQ_FIRST(&s->pending_sei);
  60     if (sei_cont) {
  61         QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
  62         nt2_res->nt = 2;
  63         nt2_res->cc = sei_cont->cc;
  64         nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
  65         switch (sei_cont->cc) {
  66         case 1: /* error event */
  67             eccdf = (PciCcdfErr *)nt2_res->ccdf;
  68             eccdf->fid = cpu_to_be32(sei_cont->fid);
  69             eccdf->fh = cpu_to_be32(sei_cont->fh);
  70             eccdf->e = cpu_to_be32(sei_cont->e);
  71             eccdf->faddr = cpu_to_be64(sei_cont->faddr);
  72             eccdf->pec = cpu_to_be16(sei_cont->pec);
  73             break;
  74         case 2: /* availability event */
  75             accdf = (PciCcdfAvail *)nt2_res->ccdf;
  76             accdf->fid = cpu_to_be32(sei_cont->fid);
  77             accdf->fh = cpu_to_be32(sei_cont->fh);
  78             accdf->pec = cpu_to_be16(sei_cont->pec);
  79             break;
  80         default:
  81             abort();
  82         }
  83         g_free(sei_cont);
  84         rc = 0;
  85     }
  86
  87     return rc;
  88 }
  89
  90 int pci_chsc_sei_nt2_have_event(void)
  91 {
  92     S390pciState *s = s390_get_phb();
  93
  94     return !QTAILQ_EMPTY(&s->pending_sei);
  95 }
  96
  97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s,
  98                                                S390PCIBusDevice *pbdev)
  99 {
 100     S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) :
 101         QTAILQ_FIRST(&s->zpci_devs);
 102
 103     while (ret && ret->state == ZPCI_FS_RESERVED) {
 104         ret = QTAILQ_NEXT(ret, link);
 105     }
 106
 107     return ret;
 108 }
 109
 110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid)
 111 {
 112     S390PCIBusDevice *pbdev;
 113
 114     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 115         if (pbdev->fid == fid) {
 116             return pbdev;
 117         }
 118     }
 119
 120     return NULL;
 121 }
 122
 123 void s390_pci_sclp_configure(SCCB *sccb)
 124 {
 125     PciCfgSccb *psccb = (PciCfgSccb *)sccb;
 126     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 127                                                        be32_to_cpu(psccb->aid));
 128     uint16_t rc;
 129
 130     if (be16_to_cpu(sccb->h.length) < 16) {
 131         rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
 132         goto out;
 133     }
 134
 135     if (!pbdev) {
 136         DPRINTF("sclp config no dev found\n");
 137         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 138         goto out;
 139     }
 140
 141     switch (pbdev->state) {
 142     case ZPCI_FS_RESERVED:
 143         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 144         break;
 145     case ZPCI_FS_STANDBY:
 146         pbdev->state = ZPCI_FS_DISABLED;
 147         rc = SCLP_RC_NORMAL_COMPLETION;
 148         break;
 149     default:
 150         rc = SCLP_RC_NO_ACTION_REQUIRED;
 151     }
 152 out:
 153     psccb->header.response_code = cpu_to_be16(rc);
 154 }
 155
 156 void s390_pci_sclp_deconfigure(SCCB *sccb)
 157 {
 158     PciCfgSccb *psccb = (PciCfgSccb *)sccb;
 159     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 160                                                        be32_to_cpu(psccb->aid));
 161     uint16_t rc;
 162
 163     if (be16_to_cpu(sccb->h.length) < 16) {
 164         rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
 165         goto out;
 166     }
 167
 168     if (!pbdev) {
 169         DPRINTF("sclp deconfig no dev found\n");
 170         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 171         goto out;
 172     }
 173
 174     switch (pbdev->state) {
 175     case ZPCI_FS_RESERVED:
 176         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 177         break;
 178     case ZPCI_FS_STANDBY:
 179         rc = SCLP_RC_NO_ACTION_REQUIRED;
 180         break;
 181     default:
 182         if (pbdev->summary_ind) {
 183             pci_dereg_irqs(pbdev);
 184         }
 185         if (pbdev->iommu->enabled) {
 186             pci_dereg_ioat(pbdev->iommu);
 187         }
 188         pbdev->state = ZPCI_FS_STANDBY;
 189         rc = SCLP_RC_NORMAL_COMPLETION;
 190
 191         if (pbdev->release_timer) {
 192             qdev_unplug(DEVICE(pbdev->pdev), NULL);
 193         }
 194     }
 195 out:
 196     psccb->header.response_code = cpu_to_be16(rc);
 197 }
 198
 199 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid)
 200 {
 201     S390PCIBusDevice *pbdev;
 202
 203     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 204         if (pbdev->uid == uid) {
 205             return pbdev;
 206         }
 207     }
 208
 209     return NULL;
 210 }
 211
 212 static S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s,
 213                                                      const char *target)
 214 {
 215     S390PCIBusDevice *pbdev;
 216
 217     if (!target) {
 218         return NULL;
 219     }
 220
 221     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 222         if (!strcmp(pbdev->target, target)) {
 223             return pbdev;
 224         }
 225     }
 226
 227     return NULL;
 228 }
 229
 230 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx)
 231 {
 232     return g_hash_table_lookup(s->zpci_table, &idx);
 233 }
 234
 235 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh)
 236 {
 237     uint32_t idx = FH_MASK_INDEX & fh;
 238     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx);
 239
 240     if (pbdev && pbdev->fh == fh) {
 241         return pbdev;
 242     }
 243
 244     return NULL;
 245 }
 246
 247 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
 248                                     uint32_t fid, uint64_t faddr, uint32_t e)
 249 {
 250     SeiContainer *sei_cont;
 251     S390pciState *s = s390_get_phb();
 252
 253     sei_cont = g_malloc0(sizeof(SeiContainer));
 254     sei_cont->fh = fh;
 255     sei_cont->fid = fid;
 256     sei_cont->cc = cc;
 257     sei_cont->pec = pec;
 258     sei_cont->faddr = faddr;
 259     sei_cont->e = e;
 260
 261     QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
 262     css_generate_css_crws(0);
 263 }
 264
 265 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
 266                                          uint32_t fid)
 267 {
 268     s390_pci_generate_event(2, pec, fh, fid, 0, 0);
 269 }
 270
 271 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
 272                                    uint64_t faddr, uint32_t e)
 273 {
 274     s390_pci_generate_event(1, pec, fh, fid, faddr, e);
 275 }
 276
 277 static void s390_pci_set_irq(void *opaque, int irq, int level)
 278 {
 279     /* nothing to do */
 280 }
 281
 282 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
 283 {
 284     /* nothing to do */
 285     return 0;
 286 }
 287
 288 static uint64_t s390_pci_get_table_origin(uint64_t iota)
 289 {
 290     return iota & ~ZPCI_IOTA_RTTO_FLAG;
 291 }
 292
 293 static unsigned int calc_rtx(dma_addr_t ptr)
 294 {
 295     return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
 296 }
 297
 298 static unsigned int calc_sx(dma_addr_t ptr)
 299 {
 300     return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
 301 }
 302
 303 static unsigned int calc_px(dma_addr_t ptr)
 304 {
 305     return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
 306 }
 307
 308 static uint64_t get_rt_sto(uint64_t entry)
 309 {
 310     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
 311                 ? (entry & ZPCI_RTE_ADDR_MASK)
 312                 : 0;
 313 }
 314
 315 static uint64_t get_st_pto(uint64_t entry)
 316 {
 317     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
 318             ? (entry & ZPCI_STE_ADDR_MASK)
 319             : 0;
 320 }
 321
 322 static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
 323                                   uint64_t guest_dma_address)
 324 {
 325     uint64_t sto_a, pto_a, px_a;
 326     uint64_t sto, pto, pte;
 327     uint32_t rtx, sx, px;
 328
 329     rtx = calc_rtx(guest_dma_address);
 330     sx = calc_sx(guest_dma_address);
 331     px = calc_px(guest_dma_address);
 332
 333     sto_a = guest_iota + rtx * sizeof(uint64_t);
 334     sto = address_space_ldq(&address_space_memory, sto_a,
 335                             MEMTXATTRS_UNSPECIFIED, NULL);
 336     sto = get_rt_sto(sto);
 337     if (!sto) {
 338         pte = 0;
 339         goto out;
 340     }
 341
 342     pto_a = sto + sx * sizeof(uint64_t);
 343     pto = address_space_ldq(&address_space_memory, pto_a,
 344                             MEMTXATTRS_UNSPECIFIED, NULL);
 345     pto = get_st_pto(pto);
 346     if (!pto) {
 347         pte = 0;
 348         goto out;
 349     }
 350
 351     px_a = pto + px * sizeof(uint64_t);
 352     pte = address_space_ldq(&address_space_memory, px_a,
 353                             MEMTXATTRS_UNSPECIFIED, NULL);
 354
 355 out:
 356     return pte;
 357 }
 358
 359 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
 360                                           IOMMUAccessFlags flag)
 361 {
 362     uint64_t pte;
 363     uint32_t flags;
 364     S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
 365     IOMMUTLBEntry ret = {
 366         .target_as = &address_space_memory,
 367         .iova = 0,
 368         .translated_addr = 0,
 369         .addr_mask = ~(hwaddr)0,
 370         .perm = IOMMU_NONE,
 371     };
 372
 373     switch (iommu->pbdev->state) {
 374     case ZPCI_FS_ENABLED:
 375     case ZPCI_FS_BLOCKED:
 376         if (!iommu->enabled) {
 377             return ret;
 378         }
 379         break;
 380     default:
 381         return ret;
 382     }
 383
 384     DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
 385
 386     if (addr < iommu->pba || addr > iommu->pal) {
 387         return ret;
 388     }
 389
 390     pte = s390_guest_io_table_walk(s390_pci_get_table_origin(iommu->g_iota),
 391                                    addr);
 392     if (!pte) {
 393         return ret;
 394     }
 395
 396     flags = pte & ZPCI_PTE_FLAG_MASK;
 397     ret.iova = addr;
 398     ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK;
 399     ret.addr_mask = 0xfff;
 400
 401     if (flags & ZPCI_PTE_INVALID) {
 402         ret.perm = IOMMU_NONE;
 403     } else {
 404         ret.perm = IOMMU_RW;
 405     }
 406
 407     return ret;
 408 }
 409
 410 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
 411                                         int devfn)
 412 {
 413     uint64_t key = (uintptr_t)bus;
 414     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 415     S390PCIIOMMU *iommu;
 416
 417     if (!table) {
 418         table = g_malloc0(sizeof(S390PCIIOMMUTable));
 419         table->key = key;
 420         g_hash_table_insert(s->iommu_table, &table->key, table);
 421     }
 422
 423     iommu = table->iommu[PCI_SLOT(devfn)];
 424     if (!iommu) {
 425         iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU));
 426
 427         char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x",
 428                                         pci_bus_num(bus),
 429                                         PCI_SLOT(devfn),
 430                                         PCI_FUNC(devfn));
 431         char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x",
 432                                         pci_bus_num(bus),
 433                                         PCI_SLOT(devfn),
 434                                         PCI_FUNC(devfn));
 435         memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX);
 436         address_space_init(&iommu->as, &iommu->mr, as_name);
 437         table->iommu[PCI_SLOT(devfn)] = iommu;
 438
 439         g_free(mr_name);
 440         g_free(as_name);
 441     }
 442
 443     return iommu;
 444 }
 445
 446 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
 447 {
 448     S390pciState *s = opaque;
 449     S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
 450
 451     return &iommu->as;
 452 }
 453
 454 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
 455 {
 456     uint8_t ind_old, ind_new;
 457     hwaddr len = 1;
 458     uint8_t *ind_addr;
 459
 460     ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
 461     if (!ind_addr) {
 462         s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
 463         return -1;
 464     }
 465     do {
 466         ind_old = *ind_addr;
 467         ind_new = ind_old | to_be_set;
 468     } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old);
 469     cpu_physical_memory_unmap(ind_addr, len, 1, len);
 470
 471     return ind_old;
 472 }
 473
 474 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
 475                                 unsigned int size)
 476 {
 477     S390PCIBusDevice *pbdev = opaque;
 478     uint32_t idx = data >> ZPCI_MSI_VEC_BITS;
 479     uint32_t vec = data & ZPCI_MSI_VEC_MASK;
 480     uint64_t ind_bit;
 481     uint32_t sum_bit;
 482     uint32_t e = 0;
 483
 484     DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, idx, vec);
 485
 486     if (!pbdev) {
 487         e |= (vec << ERR_EVENT_MVN_OFFSET);
 488         s390_pci_generate_error_event(ERR_EVENT_NOMSI, idx, 0, addr, e);
 489         return;
 490     }
 491
 492     if (pbdev->state != ZPCI_FS_ENABLED) {
 493         return;
 494     }
 495
 496     ind_bit = pbdev->routes.adapter.ind_offset;
 497     sum_bit = pbdev->routes.adapter.summary_offset;
 498
 499     set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
 500                    0x80 >> ((ind_bit + vec) % 8));
 501     if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
 502                                        0x80 >> (sum_bit % 8))) {
 503         css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc);
 504     }
 505 }
 506
 507 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
 508 {
 509     return 0xffffffff;
 510 }
 511
 512 static const MemoryRegionOps s390_msi_ctrl_ops = {
 513     .write = s390_msi_ctrl_write,
 514     .read = s390_msi_ctrl_read,
 515     .endianness = DEVICE_LITTLE_ENDIAN,
 516 };
 517
 518 void s390_pci_iommu_enable(S390PCIIOMMU *iommu)
 519 {
 520     char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid);
 521     memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr),
 522                              TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr),
 523                              name, iommu->pal + 1);
 524     iommu->enabled = true;
 525     memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr));
 526     g_free(name);
 527 }
 528
 529 void s390_pci_iommu_disable(S390PCIIOMMU *iommu)
 530 {
 531     iommu->enabled = false;
 532     memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr));
 533     object_unparent(OBJECT(&iommu->iommu_mr));
 534 }
 535
 536 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
 537 {
 538     uint64_t key = (uintptr_t)bus;
 539     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 540     S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL;
 541
 542     if (!table || !iommu) {
 543         return;
 544     }
 545
 546     table->iommu[PCI_SLOT(devfn)] = NULL;
 547     address_space_destroy(&iommu->as);
 548     object_unparent(OBJECT(&iommu->mr));
 549     object_unparent(OBJECT(iommu));
 550     object_unref(OBJECT(iommu));
 551 }
 552
 553 static int s390_pcihost_init(SysBusDevice *dev)
 554 {
 555     PCIBus *b;
 556     BusState *bus;
 557     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
 558     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
 559
 560     DPRINTF("host_init\n");
 561
 562     b = pci_register_bus(DEVICE(dev), NULL,
 563                          s390_pci_set_irq, s390_pci_map_irq, NULL,
 564                          get_system_memory(), get_system_io(), 0, 64,
 565                          TYPE_PCI_BUS);
 566     pci_setup_iommu(b, s390_pci_dma_iommu, s);
 567
 568     bus = BUS(b);
 569     qbus_set_hotplug_handler(bus, DEVICE(dev), NULL);
 570     phb->bus = b;
 571
 572     s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL));
 573     qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL);
 574
 575     s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal,
 576                                            NULL, g_free);
 577     s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
 578     s->bus_no = 0;
 579     QTAILQ_INIT(&s->pending_sei);
 580     QTAILQ_INIT(&s->zpci_devs);
 581
 582     css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false,
 583                              S390_ADAPTER_SUPPRESSIBLE, &error_abort);
 584
 585     return 0;
 586 }
 587
 588 static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
 589 {
 590     char *name;
 591     uint8_t pos;
 592     uint16_t ctrl;
 593     uint32_t table, pba;
 594
 595     pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
 596     if (!pos) {
 597         pbdev->msix.available = false;
 598         return -1;
 599     }
 600
 601     ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
 602              pci_config_size(pbdev->pdev), sizeof(ctrl));
 603     table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
 604              pci_config_size(pbdev->pdev), sizeof(table));
 605     pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
 606              pci_config_size(pbdev->pdev), sizeof(pba));
 607
 608     pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
 609     pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
 610     pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
 611     pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
 612     pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
 613     pbdev->msix.available = true;
 614
 615     name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
 616     memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
 617                           &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE);
 618     memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR,
 619                                 &pbdev->msix_notify_mr);
 620     g_free(name);
 621
 622     return 0;
 623 }
 624
 625 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
 626 {
 627     memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
 628     object_unparent(OBJECT(&pbdev->msix_notify_mr));
 629 }
 630
 631 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s,
 632                                              const char *target)
 633 {
 634     DeviceState *dev = NULL;
 635
 636     dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE);
 637     if (!dev) {
 638         return NULL;
 639     }
 640
 641     qdev_prop_set_string(dev, "target", target);
 642     qdev_init_nofail(dev);
 643
 644     return S390_PCI_DEVICE(dev);
 645 }
 646
 647 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev)
 648 {
 649     uint32_t idx;
 650
 651     idx = s->next_idx;
 652     while (s390_pci_find_dev_by_idx(s, idx)) {
 653         idx = (idx + 1) & FH_MASK_INDEX;
 654         if (idx == s->next_idx) {
 655             return false;
 656         }
 657     }
 658
 659     pbdev->idx = idx;
 660     s->next_idx = (idx + 1) & FH_MASK_INDEX;
 661
 662     return true;
 663 }
 664
 665 static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
 666                                   DeviceState *dev, Error **errp)
 667 {
 668     PCIDevice *pdev = NULL;
 669     S390PCIBusDevice *pbdev = NULL;
 670     S390pciState *s = s390_get_phb();
 671
 672     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 673         BusState *bus;
 674         PCIBridge *pb = PCI_BRIDGE(dev);
 675         PCIDevice *pdev = PCI_DEVICE(dev);
 676
 677         pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq);
 678         pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s);
 679
 680         bus = BUS(&pb->sec_bus);
 681         qbus_set_hotplug_handler(bus, DEVICE(s), errp);
 682
 683         if (dev->hotplugged) {
 684             pci_default_write_config(pdev, PCI_PRIMARY_BUS, s->bus_no, 1);
 685             s->bus_no += 1;
 686             pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
 687             do {
 688                 pdev = pdev->bus->parent_dev;
 689                 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS,
 690                                          s->bus_no, 1);
 691             } while (pdev->bus && pci_bus_num(pdev->bus));
 692         }
 693     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 694         pdev = PCI_DEVICE(dev);
 695
 696         if (!dev->id) {
 697             /* In the case the PCI device does not define an id */
 698             /* we generate one based on the PCI address         */
 699             dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
 700                                       pci_bus_num(pdev->bus),
 701                                       PCI_SLOT(pdev->devfn),
 702                                       PCI_FUNC(pdev->devfn));
 703         }
 704
 705         pbdev = s390_pci_find_dev_by_target(s, dev->id);
 706         if (!pbdev) {
 707             pbdev = s390_pci_device_new(s, dev->id);
 708             if (!pbdev) {
 709                 error_setg(errp, "create zpci device failed");
 710                 return;
 711             }
 712         }
 713
 714         if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
 715             pbdev->fh |= FH_SHM_VFIO;
 716         } else {
 717             pbdev->fh |= FH_SHM_EMUL;
 718         }
 719
 720         pbdev->pdev = pdev;
 721         pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn);
 722         pbdev->iommu->pbdev = pbdev;
 723         pbdev->state = ZPCI_FS_STANDBY;
 724
 725         if (s390_pci_msix_init(pbdev)) {
 726             error_setg(errp, "MSI-X support is mandatory "
 727                        "in the S390 architecture");
 728             return;
 729         }
 730
 731         if (dev->hotplugged) {
 732             s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY,
 733                                          pbdev->fh, pbdev->fid);
 734         }
 735     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 736         pbdev = S390_PCI_DEVICE(dev);
 737
 738         if (!s390_pci_alloc_idx(s, pbdev)) {
 739             error_setg(errp, "no slot for plugging zpci device");
 740             return;
 741         }
 742         pbdev->fh = pbdev->idx;
 743         QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link);
 744         g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
 745     }
 746 }
 747
 748 static void s390_pcihost_timer_cb(void *opaque)
 749 {
 750     S390PCIBusDevice *pbdev = opaque;
 751
 752     if (pbdev->summary_ind) {
 753         pci_dereg_irqs(pbdev);
 754     }
 755     if (pbdev->iommu->enabled) {
 756         pci_dereg_ioat(pbdev->iommu);
 757     }
 758
 759     pbdev->state = ZPCI_FS_STANDBY;
 760     s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES,
 761                                  pbdev->fh, pbdev->fid);
 762     qdev_unplug(DEVICE(pbdev), NULL);
 763 }
 764
 765 static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
 766                                     DeviceState *dev, Error **errp)
 767 {
 768     PCIDevice *pci_dev = NULL;
 769     PCIBus *bus;
 770     int32_t devfn;
 771     S390PCIBusDevice *pbdev = NULL;
 772     S390pciState *s = s390_get_phb();
 773
 774     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 775         error_setg(errp, "PCI bridge hot unplug currently not supported");
 776         return;
 777     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 778         pci_dev = PCI_DEVICE(dev);
 779
 780         QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 781             if (pbdev->pdev == pci_dev) {
 782                 break;
 783             }
 784         }
 785         assert(pbdev != NULL);
 786     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 787         pbdev = S390_PCI_DEVICE(dev);
 788         pci_dev = pbdev->pdev;
 789     }
 790
 791     switch (pbdev->state) {
 792     case ZPCI_FS_RESERVED:
 793         goto out;
 794     case ZPCI_FS_STANDBY:
 795         break;
 796     default:
 797         s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
 798                                      pbdev->fh, pbdev->fid);
 799         pbdev->release_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
 800                                             s390_pcihost_timer_cb,
 801                                             pbdev);
 802         timer_mod(pbdev->release_timer,
 803                   qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + HOT_UNPLUG_TIMEOUT);
 804         return;
 805     }
 806
 807     if (pbdev->release_timer && timer_pending(pbdev->release_timer)) {
 808         timer_del(pbdev->release_timer);
 809         timer_free(pbdev->release_timer);
 810         pbdev->release_timer = NULL;
 811     }
 812
 813     s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
 814                                  pbdev->fh, pbdev->fid);
 815     bus = pci_dev->bus;
 816     devfn = pci_dev->devfn;
 817     object_unparent(OBJECT(pci_dev));
 818     s390_pci_msix_free(pbdev);
 819     s390_pci_iommu_free(s, bus, devfn);
 820     pbdev->pdev = NULL;
 821     pbdev->state = ZPCI_FS_RESERVED;
 822 out:
 823     pbdev->fid = 0;
 824     QTAILQ_REMOVE(&s->zpci_devs, pbdev, link);
 825     g_hash_table_remove(s->zpci_table, &pbdev->idx);
 826     object_unparent(OBJECT(pbdev));
 827 }
 828
 829 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
 830                                       void *opaque)
 831 {
 832     S390pciState *s = opaque;
 833     unsigned int primary = s->bus_no;
 834     unsigned int subordinate = 0xff;
 835     PCIBus *sec_bus = NULL;
 836
 837     if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
 838          PCI_HEADER_TYPE_BRIDGE)) {
 839         return;
 840     }
 841
 842     (s->bus_no)++;
 843     pci_default_write_config(pdev, PCI_PRIMARY_BUS, primary, 1);
 844     pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
 845     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
 846
 847     sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
 848     if (!sec_bus) {
 849         return;
 850     }
 851
 852     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, subordinate, 1);
 853     pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
 854                         s390_pci_enumerate_bridge, s);
 855     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
 856 }
 857
 858 static void s390_pcihost_reset(DeviceState *dev)
 859 {
 860     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
 861     PCIBus *bus = s->parent_obj.bus;
 862
 863     s->bus_no = 0;
 864     pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s);
 865 }
 866
 867 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
 868 {
 869     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 870     DeviceClass *dc = DEVICE_CLASS(klass);
 871     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 872
 873     dc->reset = s390_pcihost_reset;
 874     k->init = s390_pcihost_init;
 875     hc->plug = s390_pcihost_hot_plug;
 876     hc->unplug = s390_pcihost_hot_unplug;
 877     msi_nonbroken = true;
 878 }
 879
 880 static const TypeInfo s390_pcihost_info = {
 881     .name          = TYPE_S390_PCI_HOST_BRIDGE,
 882     .parent        = TYPE_PCI_HOST_BRIDGE,
 883     .instance_size = sizeof(S390pciState),
 884     .class_init    = s390_pcihost_class_init,
 885     .interfaces = (InterfaceInfo[]) {
 886         { TYPE_HOTPLUG_HANDLER },
 887         { }
 888     }
 889 };
 890
 891 static const TypeInfo s390_pcibus_info = {
 892     .name = TYPE_S390_PCI_BUS,
 893     .parent = TYPE_BUS,
 894     .instance_size = sizeof(S390PCIBus),
 895 };
 896
 897 static uint16_t s390_pci_generate_uid(S390pciState *s)
 898 {
 899     uint16_t uid = 0;
 900
 901     do {
 902         uid++;
 903         if (!s390_pci_find_dev_by_uid(s, uid)) {
 904             return uid;
 905         }
 906     } while (uid < ZPCI_MAX_UID);
 907
 908     return UID_UNDEFINED;
 909 }
 910
 911 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp)
 912 {
 913     uint32_t fid = 0;
 914
 915     do {
 916         if (!s390_pci_find_dev_by_fid(s, fid)) {
 917             return fid;
 918         }
 919     } while (fid++ != ZPCI_MAX_FID);
 920
 921     error_setg(errp, "no free fid could be found");
 922     return 0;
 923 }
 924
 925 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
 926 {
 927     S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
 928     S390pciState *s = s390_get_phb();
 929
 930     if (!zpci->target) {
 931         error_setg(errp, "target must be defined");
 932         return;
 933     }
 934
 935     if (s390_pci_find_dev_by_target(s, zpci->target)) {
 936         error_setg(errp, "target %s already has an associated zpci device",
 937                    zpci->target);
 938         return;
 939     }
 940
 941     if (zpci->uid == UID_UNDEFINED) {
 942         zpci->uid = s390_pci_generate_uid(s);
 943         if (!zpci->uid) {
 944             error_setg(errp, "no free uid could be found");
 945             return;
 946         }
 947     } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) {
 948         error_setg(errp, "uid %u already in use", zpci->uid);
 949         return;
 950     }
 951
 952     if (!zpci->fid_defined) {
 953         Error *local_error = NULL;
 954
 955         zpci->fid = s390_pci_generate_fid(s, &local_error);
 956         if (local_error) {
 957             error_propagate(errp, local_error);
 958             return;
 959         }
 960     } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) {
 961         error_setg(errp, "fid %u already in use", zpci->fid);
 962         return;
 963     }
 964
 965     zpci->state = ZPCI_FS_RESERVED;
 966 }
 967
 968 static void s390_pci_device_reset(DeviceState *dev)
 969 {
 970     S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
 971
 972     switch (pbdev->state) {
 973     case ZPCI_FS_RESERVED:
 974         return;
 975     case ZPCI_FS_STANDBY:
 976         break;
 977     default:
 978         pbdev->fh &= ~FH_MASK_ENABLE;
 979         pbdev->state = ZPCI_FS_DISABLED;
 980         break;
 981     }
 982
 983     if (pbdev->summary_ind) {
 984         pci_dereg_irqs(pbdev);
 985     }
 986     if (pbdev->iommu->enabled) {
 987         pci_dereg_ioat(pbdev->iommu);
 988     }
 989
 990     pbdev->fmb_addr = 0;
 991 }
 992
 993 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
 994                          void *opaque, Error **errp)
 995 {
 996     Property *prop = opaque;
 997     uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
 998
 999     visit_type_uint32(v, name, ptr, errp);
1000 }
1001
1002 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
1003                          void *opaque, Error **errp)
1004 {
1005     DeviceState *dev = DEVICE(obj);
1006     S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
1007     Property *prop = opaque;
1008     uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
1009
1010     if (dev->realized) {
1011         qdev_prop_set_after_realize(dev, name, errp);
1012         return;
1013     }
1014
1015     visit_type_uint32(v, name, ptr, errp);
1016     zpci->fid_defined = true;
1017 }
1018
1019 static const PropertyInfo s390_pci_fid_propinfo = {
1020     .name = "zpci_fid",
1021     .get = s390_pci_get_fid,
1022     .set = s390_pci_set_fid,
1023 };
1024
1025 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
1026     DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
1027
1028 static Property s390_pci_device_properties[] = {
1029     DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
1030     DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
1031     DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
1032     DEFINE_PROP_END_OF_LIST(),
1033 };
1034
1035 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
1036 {
1037     DeviceClass *dc = DEVICE_CLASS(klass);
1038
1039     dc->desc = "zpci device";
1040     dc->reset = s390_pci_device_reset;
1041     dc->bus_type = TYPE_S390_PCI_BUS;
1042     dc->realize = s390_pci_device_realize;
1043     dc->props = s390_pci_device_properties;
1044 }
1045
1046 static const TypeInfo s390_pci_device_info = {
1047     .name = TYPE_S390_PCI_DEVICE,
1048     .parent = TYPE_DEVICE,
1049     .instance_size = sizeof(S390PCIBusDevice),
1050     .class_init = s390_pci_device_class_init,
1051 };
1052
1053 static TypeInfo s390_pci_iommu_info = {
1054     .name = TYPE_S390_PCI_IOMMU,
1055     .parent = TYPE_OBJECT,
1056     .instance_size = sizeof(S390PCIIOMMU),
1057 };
1058
1059 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data)
1060 {
1061     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
1062
1063     imrc->translate = s390_translate_iommu;
1064 }
1065
1066 static const TypeInfo s390_iommu_memory_region_info = {
1067     .parent = TYPE_IOMMU_MEMORY_REGION,
1068     .name = TYPE_S390_IOMMU_MEMORY_REGION,
1069     .class_init = s390_iommu_memory_region_class_init,
1070 };
1071
1072 static void s390_pci_register_types(void)
1073 {
1074     type_register_static(&s390_pcihost_info);
1075     type_register_static(&s390_pcibus_info);
1076     type_register_static(&s390_pci_device_info);
1077     type_register_static(&s390_pci_iommu_info);
1078     type_register_static(&s390_iommu_memory_region_info);
1079 }
1080
1081 type_init(s390_pci_register_types)