2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 /* debug firmware config */
31 //#define DEBUG_FW_CFG
34 #define FW_CFG_DPRINTF(fmt, ...) \
35 do { printf("FW_CFG: " fmt , ## __VA_ARGS__); } while (0)
37 #define FW_CFG_DPRINTF(fmt, ...)
42 typedef struct FWCfgEntry
{
45 void *callback_opaque
;
46 FWCfgCallback callback
;
51 uint32_t ctl_iobase
, data_iobase
;
52 FWCfgEntry entries
[2][FW_CFG_MAX_ENTRY
];
56 Notifier machine_ready
;
59 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
61 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
62 FWCfgEntry
*e
= &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
64 FW_CFG_DPRINTF("write %d\n", value
);
66 if (s
->cur_entry
& FW_CFG_WRITE_CHANNEL
&& s
->cur_offset
< e
->len
) {
67 e
->data
[s
->cur_offset
++] = value
;
68 if (s
->cur_offset
== e
->len
) {
69 e
->callback(e
->callback_opaque
, e
->data
);
75 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
80 if ((key
& FW_CFG_ENTRY_MASK
) >= FW_CFG_MAX_ENTRY
) {
81 s
->cur_entry
= FW_CFG_INVALID
;
88 FW_CFG_DPRINTF("select key %d (%sfound)\n", key
, ret
? "" : "not ");
93 static uint8_t fw_cfg_read(FWCfgState
*s
)
95 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
96 FWCfgEntry
*e
= &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
99 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
|| s
->cur_offset
>= e
->len
)
102 ret
= e
->data
[s
->cur_offset
++];
104 FW_CFG_DPRINTF("read %d\n", ret
);
109 static uint32_t fw_cfg_io_readb(void *opaque
, uint32_t addr
)
111 return fw_cfg_read(opaque
);
114 static void fw_cfg_io_writeb(void *opaque
, uint32_t addr
, uint32_t value
)
116 fw_cfg_write(opaque
, (uint8_t)value
);
119 static void fw_cfg_io_writew(void *opaque
, uint32_t addr
, uint32_t value
)
121 fw_cfg_select(opaque
, (uint16_t)value
);
124 static uint32_t fw_cfg_mem_readb(void *opaque
, target_phys_addr_t addr
)
126 return fw_cfg_read(opaque
);
129 static void fw_cfg_mem_writeb(void *opaque
, target_phys_addr_t addr
,
132 fw_cfg_write(opaque
, (uint8_t)value
);
135 static void fw_cfg_mem_writew(void *opaque
, target_phys_addr_t addr
,
138 fw_cfg_select(opaque
, (uint16_t)value
);
141 static CPUReadMemoryFunc
* const fw_cfg_ctl_mem_read
[3] = {
147 static CPUWriteMemoryFunc
* const fw_cfg_ctl_mem_write
[3] = {
153 static CPUReadMemoryFunc
* const fw_cfg_data_mem_read
[3] = {
159 static CPUWriteMemoryFunc
* const fw_cfg_data_mem_write
[3] = {
165 static void fw_cfg_reset(DeviceState
*d
)
167 FWCfgState
*s
= DO_UPCAST(FWCfgState
, busdev
.qdev
, d
);
172 /* Save restore 32 bit int as uint16_t
173 This is a Big hack, but it is how the old state did it.
174 Or we broke compatibility in the state, or we can't use struct tm
177 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
)
180 *v
= qemu_get_be16(f
);
184 static void put_unused(QEMUFile
*f
, void *pv
, size_t size
)
186 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
187 fprintf(stderr
, "This functions shouldn't be called.\n");
190 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
191 .name
= "int32_as_uint16",
192 .get
= get_uint32_as_uint16
,
196 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
197 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
200 static bool is_version_1(void *opaque
, int version_id
)
202 return version_id
== 1;
205 static const VMStateDescription vmstate_fw_cfg
= {
208 .minimum_version_id
= 1,
209 .minimum_version_id_old
= 1,
210 .fields
= (VMStateField
[]) {
211 VMSTATE_UINT16(cur_entry
, FWCfgState
),
212 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
213 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
214 VMSTATE_END_OF_LIST()
218 int fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, uint8_t *data
, uint32_t len
)
220 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
222 key
&= FW_CFG_ENTRY_MASK
;
224 if (key
>= FW_CFG_MAX_ENTRY
)
227 s
->entries
[arch
][key
].data
= data
;
228 s
->entries
[arch
][key
].len
= len
;
233 int fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
237 copy
= qemu_malloc(sizeof(value
));
238 *copy
= cpu_to_le16(value
);
239 return fw_cfg_add_bytes(s
, key
, (uint8_t *)copy
, sizeof(value
));
242 int fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
246 copy
= qemu_malloc(sizeof(value
));
247 *copy
= cpu_to_le32(value
);
248 return fw_cfg_add_bytes(s
, key
, (uint8_t *)copy
, sizeof(value
));
251 int fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
255 copy
= qemu_malloc(sizeof(value
));
256 *copy
= cpu_to_le64(value
);
257 return fw_cfg_add_bytes(s
, key
, (uint8_t *)copy
, sizeof(value
));
260 int fw_cfg_add_callback(FWCfgState
*s
, uint16_t key
, FWCfgCallback callback
,
261 void *callback_opaque
, uint8_t *data
, size_t len
)
263 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
265 if (!(key
& FW_CFG_WRITE_CHANNEL
))
268 key
&= FW_CFG_ENTRY_MASK
;
270 if (key
>= FW_CFG_MAX_ENTRY
|| len
> 65535)
273 s
->entries
[arch
][key
].data
= data
;
274 s
->entries
[arch
][key
].len
= len
;
275 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
276 s
->entries
[arch
][key
].callback
= callback
;
281 int fw_cfg_add_file(FWCfgState
*s
, const char *filename
, uint8_t *data
,
287 int dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * FW_CFG_FILE_SLOTS
;
288 s
->files
= qemu_mallocz(dsize
);
289 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, (uint8_t*)s
->files
, dsize
);
292 index
= be32_to_cpu(s
->files
->count
);
293 if (index
== FW_CFG_FILE_SLOTS
) {
294 fprintf(stderr
, "fw_cfg: out of file slots\n");
298 fw_cfg_add_bytes(s
, FW_CFG_FILE_FIRST
+ index
, data
, len
);
300 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
),
302 for (i
= 0; i
< index
; i
++) {
303 if (strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
304 FW_CFG_DPRINTF("%s: skip duplicate: %s\n", __FUNCTION__
,
305 s
->files
->f
[index
].name
);
310 s
->files
->f
[index
].size
= cpu_to_be32(len
);
311 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
312 FW_CFG_DPRINTF("%s: #%d: %s (%d bytes)\n", __FUNCTION__
,
313 index
, s
->files
->f
[index
].name
, len
);
315 s
->files
->count
= cpu_to_be32(index
+1);
319 static void fw_cfg_machine_ready(struct Notifier
* n
)
322 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
323 char *bootindex
= get_boot_devices_list(&len
);
325 fw_cfg_add_file(s
, "bootorder", (uint8_t*)bootindex
, len
);
328 FWCfgState
*fw_cfg_init(uint32_t ctl_port
, uint32_t data_port
,
329 target_phys_addr_t ctl_addr
, target_phys_addr_t data_addr
)
335 dev
= qdev_create(NULL
, "fw_cfg");
336 qdev_prop_set_uint32(dev
, "ctl_iobase", ctl_port
);
337 qdev_prop_set_uint32(dev
, "data_iobase", data_port
);
338 qdev_init_nofail(dev
);
339 d
= sysbus_from_qdev(dev
);
341 s
= DO_UPCAST(FWCfgState
, busdev
.qdev
, dev
);
344 sysbus_mmio_map(d
, 0, ctl_addr
);
347 sysbus_mmio_map(d
, 1, data_addr
);
349 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (uint8_t *)"QEMU", 4);
350 fw_cfg_add_bytes(s
, FW_CFG_UUID
, qemu_uuid
, 16);
351 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)(display_type
== DT_NOGRAPHIC
));
352 fw_cfg_add_i16(s
, FW_CFG_NB_CPUS
, (uint16_t)smp_cpus
);
353 fw_cfg_add_i16(s
, FW_CFG_MAX_CPUS
, (uint16_t)max_cpus
);
354 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
357 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
358 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
363 static int fw_cfg_init1(SysBusDevice
*dev
)
365 FWCfgState
*s
= FROM_SYSBUS(FWCfgState
, dev
);
366 int io_ctl_memory
, io_data_memory
;
368 io_ctl_memory
= cpu_register_io_memory(fw_cfg_ctl_mem_read
,
369 fw_cfg_ctl_mem_write
, s
,
370 DEVICE_NATIVE_ENDIAN
);
371 sysbus_init_mmio(dev
, FW_CFG_SIZE
, io_ctl_memory
);
373 io_data_memory
= cpu_register_io_memory(fw_cfg_data_mem_read
,
374 fw_cfg_data_mem_write
, s
,
375 DEVICE_NATIVE_ENDIAN
);
376 sysbus_init_mmio(dev
, FW_CFG_SIZE
, io_data_memory
);
379 register_ioport_write(s
->ctl_iobase
, 2, 2, fw_cfg_io_writew
, s
);
381 if (s
->data_iobase
) {
382 register_ioport_read(s
->data_iobase
, 1, 1, fw_cfg_io_readb
, s
);
383 register_ioport_write(s
->data_iobase
, 1, 1, fw_cfg_io_writeb
, s
);
388 static SysBusDeviceInfo fw_cfg_info
= {
389 .init
= fw_cfg_init1
,
390 .qdev
.name
= "fw_cfg",
391 .qdev
.size
= sizeof(FWCfgState
),
392 .qdev
.vmsd
= &vmstate_fw_cfg
,
393 .qdev
.reset
= fw_cfg_reset
,
395 .qdev
.props
= (Property
[]) {
396 DEFINE_PROP_HEX32("ctl_iobase", FWCfgState
, ctl_iobase
, -1),
397 DEFINE_PROP_HEX32("data_iobase", FWCfgState
, data_iobase
, -1),
398 DEFINE_PROP_END_OF_LIST(),
402 static void fw_cfg_register_devices(void)
404 sysbus_register_withprop(&fw_cfg_info
);
407 device_init(fw_cfg_register_devices
)