tests: add top-level make dependency for docker builds
[qemu.git] / hw / i386 / pc_piix.c
blobe9b6f064fb210bbba717625145334ab9650f72ab
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "qemu/osdep.h"
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/display/ramfb.h"
32 #include "hw/smbios/smbios.h"
33 #include "hw/pci/pci.h"
34 #include "hw/pci/pci_ids.h"
35 #include "hw/usb.h"
36 #include "net/net.h"
37 #include "hw/boards.h"
38 #include "hw/ide.h"
39 #include "sysemu/kvm.h"
40 #include "hw/kvm/clock.h"
41 #include "sysemu/sysemu.h"
42 #include "hw/sysbus.h"
43 #include "sysemu/arch_init.h"
44 #include "hw/i2c/smbus.h"
45 #include "hw/xen/xen.h"
46 #include "exec/memory.h"
47 #include "exec/address-spaces.h"
48 #include "hw/acpi/acpi.h"
49 #include "cpu.h"
50 #include "qapi/error.h"
51 #include "qemu/error-report.h"
52 #ifdef CONFIG_XEN
53 #include <xen/hvm/hvm_info_table.h>
54 #include "hw/xen/xen_pt.h"
55 #endif
56 #include "migration/global_state.h"
57 #include "migration/misc.h"
58 #include "kvm_i386.h"
59 #include "sysemu/numa.h"
61 #define MAX_IDE_BUS 2
63 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
64 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
65 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
67 /* PC hardware initialisation */
68 static void pc_init1(MachineState *machine,
69 const char *host_type, const char *pci_type)
71 PCMachineState *pcms = PC_MACHINE(machine);
72 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
73 MemoryRegion *system_memory = get_system_memory();
74 MemoryRegion *system_io = get_system_io();
75 int i;
76 PCIBus *pci_bus;
77 ISABus *isa_bus;
78 PCII440FXState *i440fx_state;
79 int piix3_devfn = -1;
80 qemu_irq *i8259;
81 qemu_irq smi_irq;
82 GSIState *gsi_state;
83 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
84 BusState *idebus[MAX_IDE_BUS];
85 ISADevice *rtc_state;
86 MemoryRegion *ram_memory;
87 MemoryRegion *pci_memory;
88 MemoryRegion *rom_memory;
89 ram_addr_t lowmem;
92 * Calculate ram split, for memory below and above 4G. It's a bit
93 * complicated for backward compatibility reasons ...
95 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
96 * default value for max_ram_below_4g now.
98 * - Then, to gigabyte align the memory, we move the split to 3G
99 * (lowmem = 0xc0000000). But only in case we have to split in
100 * the first place, i.e. ram_size is larger than (traditional)
101 * lowmem. And for new machine types (gigabyte_align = true)
102 * only, for live migration compatibility reasons.
104 * - Next the max-ram-below-4g option was added, which allowed to
105 * reduce lowmem to a smaller value, to allow a larger PCI I/O
106 * window below 4G. qemu doesn't enforce gigabyte alignment here,
107 * but prints a warning.
109 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
110 * so legacy non-PAE guests can get as much memory as possible in
111 * the 32bit address space below 4G.
113 * - Note that Xen has its own ram setp code in xen_ram_init(),
114 * called via xen_hvm_init().
116 * Examples:
117 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
118 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
119 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
120 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
122 if (xen_enabled()) {
123 xen_hvm_init(pcms, &ram_memory);
124 } else {
125 if (!pcms->max_ram_below_4g) {
126 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
128 lowmem = pcms->max_ram_below_4g;
129 if (machine->ram_size >= pcms->max_ram_below_4g) {
130 if (pcmc->gigabyte_align) {
131 if (lowmem > 0xc0000000) {
132 lowmem = 0xc0000000;
134 if (lowmem & ((1ULL << 30) - 1)) {
135 warn_report("Large machine and max_ram_below_4g "
136 "(%" PRIu64 ") not a multiple of 1G; "
137 "possible bad performance.",
138 pcms->max_ram_below_4g);
143 if (machine->ram_size >= lowmem) {
144 pcms->above_4g_mem_size = machine->ram_size - lowmem;
145 pcms->below_4g_mem_size = lowmem;
146 } else {
147 pcms->above_4g_mem_size = 0;
148 pcms->below_4g_mem_size = machine->ram_size;
152 pc_cpus_init(pcms);
154 if (kvm_enabled() && pcmc->kvmclock_enabled) {
155 kvmclock_create();
158 if (pcmc->pci_enabled) {
159 pci_memory = g_new(MemoryRegion, 1);
160 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
161 rom_memory = pci_memory;
162 } else {
163 pci_memory = NULL;
164 rom_memory = system_memory;
167 pc_guest_info_init(pcms);
169 if (pcmc->smbios_defaults) {
170 MachineClass *mc = MACHINE_GET_CLASS(machine);
171 /* These values are guest ABI, do not change */
172 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
173 mc->name, pcmc->smbios_legacy_mode,
174 pcmc->smbios_uuid_encoded,
175 SMBIOS_ENTRY_POINT_21);
178 /* allocate ram and load rom/bios */
179 if (!xen_enabled()) {
180 pc_memory_init(pcms, system_memory,
181 rom_memory, &ram_memory);
182 } else if (machine->kernel_filename != NULL) {
183 /* For xen HVM direct kernel boot, load linux here */
184 xen_load_linux(pcms);
187 gsi_state = g_malloc0(sizeof(*gsi_state));
188 if (kvm_ioapic_in_kernel()) {
189 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
190 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
191 GSI_NUM_PINS);
192 } else {
193 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
196 if (pcmc->pci_enabled) {
197 pci_bus = i440fx_init(host_type,
198 pci_type,
199 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
200 system_memory, system_io, machine->ram_size,
201 pcms->below_4g_mem_size,
202 pcms->above_4g_mem_size,
203 pci_memory, ram_memory);
204 pcms->bus = pci_bus;
205 } else {
206 pci_bus = NULL;
207 i440fx_state = NULL;
208 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
209 &error_abort);
210 no_hpet = 1;
212 isa_bus_irqs(isa_bus, pcms->gsi);
214 if (kvm_pic_in_kernel()) {
215 i8259 = kvm_i8259_init(isa_bus);
216 } else if (xen_enabled()) {
217 i8259 = xen_interrupt_controller_init();
218 } else {
219 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
222 for (i = 0; i < ISA_NUM_IRQS; i++) {
223 gsi_state->i8259_irq[i] = i8259[i];
225 g_free(i8259);
226 if (pcmc->pci_enabled) {
227 ioapic_init_gsi(gsi_state, "i440fx");
230 pc_register_ferr_irq(pcms->gsi[13]);
232 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
234 assert(pcms->vmport != ON_OFF_AUTO__MAX);
235 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
236 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
239 /* init basic PC hardware */
240 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
241 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4);
243 pc_nic_init(pcmc, isa_bus, pci_bus);
245 ide_drive_get(hd, ARRAY_SIZE(hd));
246 if (pcmc->pci_enabled) {
247 PCIDevice *dev;
248 if (xen_enabled()) {
249 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
250 } else {
251 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
253 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
254 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
255 } else {
256 for(i = 0; i < MAX_IDE_BUS; i++) {
257 ISADevice *dev;
258 char busname[] = "ide.0";
259 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
260 ide_irq[i],
261 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
263 * The ide bus name is ide.0 for the first bus and ide.1 for the
264 * second one.
266 busname[4] = '0' + i;
267 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
271 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
273 if (pcmc->pci_enabled && machine_usb(machine)) {
274 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
277 if (pcmc->pci_enabled && acpi_enabled) {
278 DeviceState *piix4_pm;
279 I2CBus *smbus;
281 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
282 /* TODO: Populate SPD eeprom data. */
283 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
284 pcms->gsi[9], smi_irq,
285 pc_machine_is_smm_enabled(pcms),
286 &piix4_pm);
287 smbus_eeprom_init(smbus, 8, NULL, 0);
289 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
290 TYPE_HOTPLUG_HANDLER,
291 (Object **)&pcms->acpi_dev,
292 object_property_allow_set_link,
293 OBJ_PROP_LINK_STRONG, &error_abort);
294 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
295 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
298 if (pcms->acpi_nvdimm_state.is_enabled) {
299 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
300 pcms->fw_cfg, OBJECT(pcms));
304 /* Looking for a pc_compat_2_4() function? It doesn't exist.
305 * pc_compat_*() functions that run on machine-init time and
306 * change global QEMU state are deprecated. Please don't create
307 * one, and implement any pc-*-2.4 (and newer) compat code in
308 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
311 static void pc_compat_2_3(MachineState *machine)
313 PCMachineState *pcms = PC_MACHINE(machine);
314 if (kvm_enabled()) {
315 pcms->smm = ON_OFF_AUTO_OFF;
319 static void pc_compat_2_2(MachineState *machine)
321 pc_compat_2_3(machine);
322 machine->suppress_vmdesc = true;
325 static void pc_compat_2_1(MachineState *machine)
327 pc_compat_2_2(machine);
328 x86_cpu_change_kvm_default("svm", NULL);
331 static void pc_compat_2_0(MachineState *machine)
333 pc_compat_2_1(machine);
336 static void pc_compat_1_7(MachineState *machine)
338 pc_compat_2_0(machine);
339 x86_cpu_change_kvm_default("x2apic", NULL);
342 static void pc_compat_1_6(MachineState *machine)
344 pc_compat_1_7(machine);
347 static void pc_compat_1_5(MachineState *machine)
349 pc_compat_1_6(machine);
352 static void pc_compat_1_4(MachineState *machine)
354 pc_compat_1_5(machine);
357 static void pc_compat_1_3(MachineState *machine)
359 pc_compat_1_4(machine);
360 enable_compat_apic_id_mode();
363 /* PC compat function for pc-0.14 to pc-1.2 */
364 static void pc_compat_1_2(MachineState *machine)
366 pc_compat_1_3(machine);
367 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
370 /* PC compat function for pc-0.10 to pc-0.13 */
371 static void pc_compat_0_13(MachineState *machine)
373 pc_compat_1_2(machine);
376 static void pc_init_isa(MachineState *machine)
378 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
381 #ifdef CONFIG_XEN
382 static void pc_xen_hvm_init_pci(MachineState *machine)
384 const char *pci_type = has_igd_gfx_passthru ?
385 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
387 pc_init1(machine,
388 TYPE_I440FX_PCI_HOST_BRIDGE,
389 pci_type);
392 static void pc_xen_hvm_init(MachineState *machine)
394 PCMachineState *pcms = PC_MACHINE(machine);
396 if (!xen_enabled()) {
397 error_report("xenfv machine requires the xen accelerator");
398 exit(1);
401 pc_xen_hvm_init_pci(machine);
402 pci_create_simple(pcms->bus, -1, "xen-platform");
404 #endif
406 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
407 static void pc_init_##suffix(MachineState *machine) \
409 void (*compat)(MachineState *m) = (compatfn); \
410 if (compat) { \
411 compat(machine); \
413 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
414 TYPE_I440FX_PCI_DEVICE); \
416 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
418 static void pc_i440fx_machine_options(MachineClass *m)
420 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
421 pcmc->default_nic_model = "e1000";
423 m->family = "pc_piix";
424 m->desc = "Standard PC (i440FX + PIIX, 1996)";
425 m->default_machine_opts = "firmware=bios-256k.bin";
426 m->default_display = "std";
427 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
430 static void pc_i440fx_3_0_machine_options(MachineClass *m)
432 pc_i440fx_machine_options(m);
433 m->alias = "pc";
434 m->is_default = 1;
437 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
438 pc_i440fx_3_0_machine_options);
440 static void pc_i440fx_2_12_machine_options(MachineClass *m)
442 pc_i440fx_3_0_machine_options(m);
443 m->is_default = 0;
444 m->alias = NULL;
445 SET_MACHINE_COMPAT(m, PC_COMPAT_2_12);
448 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
449 pc_i440fx_2_12_machine_options);
451 static void pc_i440fx_2_11_machine_options(MachineClass *m)
453 pc_i440fx_2_12_machine_options(m);
454 SET_MACHINE_COMPAT(m, PC_COMPAT_2_11);
457 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
458 pc_i440fx_2_11_machine_options);
460 static void pc_i440fx_2_10_machine_options(MachineClass *m)
462 pc_i440fx_2_11_machine_options(m);
463 SET_MACHINE_COMPAT(m, PC_COMPAT_2_10);
464 m->auto_enable_numa_with_memhp = false;
467 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
468 pc_i440fx_2_10_machine_options);
470 static void pc_i440fx_2_9_machine_options(MachineClass *m)
472 pc_i440fx_2_10_machine_options(m);
473 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9);
474 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
477 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
478 pc_i440fx_2_9_machine_options);
480 static void pc_i440fx_2_8_machine_options(MachineClass *m)
482 pc_i440fx_2_9_machine_options(m);
483 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8);
486 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
487 pc_i440fx_2_8_machine_options);
490 static void pc_i440fx_2_7_machine_options(MachineClass *m)
492 pc_i440fx_2_8_machine_options(m);
493 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
496 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
497 pc_i440fx_2_7_machine_options);
500 static void pc_i440fx_2_6_machine_options(MachineClass *m)
502 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
503 pc_i440fx_2_7_machine_options(m);
504 pcmc->legacy_cpu_hotplug = true;
505 pcmc->linuxboot_dma_enabled = false;
506 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
509 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
510 pc_i440fx_2_6_machine_options);
513 static void pc_i440fx_2_5_machine_options(MachineClass *m)
515 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
516 pc_i440fx_2_6_machine_options(m);
517 pcmc->save_tsc_khz = false;
518 m->legacy_fw_cfg_order = 1;
519 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
522 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
523 pc_i440fx_2_5_machine_options);
526 static void pc_i440fx_2_4_machine_options(MachineClass *m)
528 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
529 pc_i440fx_2_5_machine_options(m);
530 m->hw_version = "2.4.0";
531 pcmc->broken_reserved_end = true;
532 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
535 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
536 pc_i440fx_2_4_machine_options)
539 static void pc_i440fx_2_3_machine_options(MachineClass *m)
541 pc_i440fx_2_4_machine_options(m);
542 m->hw_version = "2.3.0";
543 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
546 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
547 pc_i440fx_2_3_machine_options);
550 static void pc_i440fx_2_2_machine_options(MachineClass *m)
552 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
553 pc_i440fx_2_3_machine_options(m);
554 m->hw_version = "2.2.0";
555 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
556 pcmc->rsdp_in_ram = false;
559 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
560 pc_i440fx_2_2_machine_options);
563 static void pc_i440fx_2_1_machine_options(MachineClass *m)
565 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
566 pc_i440fx_2_2_machine_options(m);
567 m->hw_version = "2.1.0";
568 m->default_display = NULL;
569 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
570 pcmc->smbios_uuid_encoded = false;
571 pcmc->enforce_aligned_dimm = false;
574 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
575 pc_i440fx_2_1_machine_options);
579 static void pc_i440fx_2_0_machine_options(MachineClass *m)
581 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
582 pc_i440fx_2_1_machine_options(m);
583 m->hw_version = "2.0.0";
584 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
585 pcmc->smbios_legacy_mode = true;
586 pcmc->has_reserved_memory = false;
587 /* This value depends on the actual DSDT and SSDT compiled into
588 * the source QEMU; unfortunately it depends on the binary and
589 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
590 * both QEMU 1.7 and QEMU 2.0.
592 * Large variations cause migration to fail for more than one
593 * consecutive value of the "-smp" maxcpus option.
595 * For small variations of the kind caused by different iasl versions,
596 * the 4k rounding usually leaves slack. However, there could be still
597 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
598 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
600 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
601 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
603 pcmc->legacy_acpi_table_size = 6652;
604 pcmc->acpi_data_size = 0x10000;
607 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
608 pc_i440fx_2_0_machine_options);
611 static void pc_i440fx_1_7_machine_options(MachineClass *m)
613 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
614 pc_i440fx_2_0_machine_options(m);
615 m->hw_version = "1.7.0";
616 m->default_machine_opts = NULL;
617 m->option_rom_has_mr = true;
618 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
619 pcmc->smbios_defaults = false;
620 pcmc->gigabyte_align = false;
621 pcmc->legacy_acpi_table_size = 6414;
624 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
625 pc_i440fx_1_7_machine_options);
628 static void pc_i440fx_1_6_machine_options(MachineClass *m)
630 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
631 pc_i440fx_1_7_machine_options(m);
632 m->hw_version = "1.6.0";
633 m->rom_file_has_mr = false;
634 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
635 pcmc->has_acpi_build = false;
638 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
639 pc_i440fx_1_6_machine_options);
642 static void pc_i440fx_1_5_machine_options(MachineClass *m)
644 pc_i440fx_1_6_machine_options(m);
645 m->hw_version = "1.5.0";
646 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
649 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
650 pc_i440fx_1_5_machine_options);
653 static void pc_i440fx_1_4_machine_options(MachineClass *m)
655 pc_i440fx_1_5_machine_options(m);
656 m->hw_version = "1.4.0";
657 m->hot_add_cpu = NULL;
658 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
661 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
662 pc_i440fx_1_4_machine_options);
665 #define PC_COMPAT_1_3 \
666 PC_CPU_MODEL_IDS("1.3.0") \
668 .driver = "usb-tablet",\
669 .property = "usb_version",\
670 .value = stringify(1),\
671 },{\
672 .driver = "virtio-net-pci",\
673 .property = "ctrl_mac_addr",\
674 .value = "off", \
675 },{ \
676 .driver = "virtio-net-pci", \
677 .property = "mq", \
678 .value = "off", \
679 }, {\
680 .driver = "e1000",\
681 .property = "autonegotiation",\
682 .value = "off",\
686 static void pc_i440fx_1_3_machine_options(MachineClass *m)
688 pc_i440fx_1_4_machine_options(m);
689 m->hw_version = "1.3.0";
690 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
693 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
694 pc_i440fx_1_3_machine_options);
697 #define PC_COMPAT_1_2 \
698 PC_CPU_MODEL_IDS("1.2.0") \
700 .driver = "nec-usb-xhci",\
701 .property = "msi",\
702 .value = "off",\
703 },{\
704 .driver = "nec-usb-xhci",\
705 .property = "msix",\
706 .value = "off",\
707 },{\
708 .driver = "ivshmem",\
709 .property = "use64",\
710 .value = "0",\
711 },{\
712 .driver = "qxl",\
713 .property = "revision",\
714 .value = stringify(3),\
715 },{\
716 .driver = "qxl-vga",\
717 .property = "revision",\
718 .value = stringify(3),\
719 },{\
720 .driver = "VGA",\
721 .property = "mmio",\
722 .value = "off",\
725 static void pc_i440fx_1_2_machine_options(MachineClass *m)
727 pc_i440fx_1_3_machine_options(m);
728 m->hw_version = "1.2.0";
729 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
732 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
733 pc_i440fx_1_2_machine_options);
736 #define PC_COMPAT_1_1 \
737 PC_CPU_MODEL_IDS("1.1.0") \
739 .driver = "virtio-scsi-pci",\
740 .property = "hotplug",\
741 .value = "off",\
742 },{\
743 .driver = "virtio-scsi-pci",\
744 .property = "param_change",\
745 .value = "off",\
746 },{\
747 .driver = "VGA",\
748 .property = "vgamem_mb",\
749 .value = stringify(8),\
750 },{\
751 .driver = "vmware-svga",\
752 .property = "vgamem_mb",\
753 .value = stringify(8),\
754 },{\
755 .driver = "qxl-vga",\
756 .property = "vgamem_mb",\
757 .value = stringify(8),\
758 },{\
759 .driver = "qxl",\
760 .property = "vgamem_mb",\
761 .value = stringify(8),\
762 },{\
763 .driver = "virtio-blk-pci",\
764 .property = "config-wce",\
765 .value = "off",\
768 static void pc_i440fx_1_1_machine_options(MachineClass *m)
770 pc_i440fx_1_2_machine_options(m);
771 m->hw_version = "1.1.0";
772 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
775 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
776 pc_i440fx_1_1_machine_options);
779 #define PC_COMPAT_1_0 \
780 PC_CPU_MODEL_IDS("1.0") \
782 .driver = TYPE_ISA_FDC,\
783 .property = "check_media_rate",\
784 .value = "off",\
785 }, {\
786 .driver = "virtio-balloon-pci",\
787 .property = "class",\
788 .value = stringify(PCI_CLASS_MEMORY_RAM),\
789 },{\
790 .driver = "apic-common",\
791 .property = "vapic",\
792 .value = "off",\
793 },{\
794 .driver = TYPE_USB_DEVICE,\
795 .property = "full-path",\
796 .value = "no",\
799 static void pc_i440fx_1_0_machine_options(MachineClass *m)
801 pc_i440fx_1_1_machine_options(m);
802 m->hw_version = "1.0";
803 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
806 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
807 pc_i440fx_1_0_machine_options);
810 #define PC_COMPAT_0_15 \
811 PC_CPU_MODEL_IDS("0.15")
813 static void pc_i440fx_0_15_machine_options(MachineClass *m)
815 pc_i440fx_1_0_machine_options(m);
816 m->hw_version = "0.15";
817 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
820 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
821 pc_i440fx_0_15_machine_options);
824 #define PC_COMPAT_0_14 \
825 PC_CPU_MODEL_IDS("0.14") \
827 .driver = "virtio-blk-pci",\
828 .property = "event_idx",\
829 .value = "off",\
830 },{\
831 .driver = "virtio-serial-pci",\
832 .property = "event_idx",\
833 .value = "off",\
834 },{\
835 .driver = "virtio-net-pci",\
836 .property = "event_idx",\
837 .value = "off",\
838 },{\
839 .driver = "virtio-balloon-pci",\
840 .property = "event_idx",\
841 .value = "off",\
842 },{\
843 .driver = "qxl",\
844 .property = "revision",\
845 .value = stringify(2),\
846 },{\
847 .driver = "qxl-vga",\
848 .property = "revision",\
849 .value = stringify(2),\
852 static void pc_i440fx_0_14_machine_options(MachineClass *m)
854 pc_i440fx_0_15_machine_options(m);
855 m->hw_version = "0.14";
856 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
859 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
860 pc_i440fx_0_14_machine_options);
863 #define PC_COMPAT_0_13 \
864 PC_CPU_MODEL_IDS("0.13") \
866 .driver = TYPE_PCI_DEVICE,\
867 .property = "command_serr_enable",\
868 .value = "off",\
869 },{\
870 .driver = "AC97",\
871 .property = "use_broken_id",\
872 .value = stringify(1),\
873 },{\
874 .driver = "virtio-9p-pci",\
875 .property = "vectors",\
876 .value = stringify(0),\
877 },{\
878 .driver = "VGA",\
879 .property = "rombar",\
880 .value = stringify(0),\
881 },{\
882 .driver = "vmware-svga",\
883 .property = "rombar",\
884 .value = stringify(0),\
887 static void pc_i440fx_0_13_machine_options(MachineClass *m)
889 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
890 pc_i440fx_0_14_machine_options(m);
891 m->hw_version = "0.13";
892 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
893 pcmc->kvmclock_enabled = false;
896 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
897 pc_i440fx_0_13_machine_options);
900 #define PC_COMPAT_0_12 \
901 PC_CPU_MODEL_IDS("0.12") \
903 .driver = "virtio-serial-pci",\
904 .property = "max_ports",\
905 .value = stringify(1),\
906 },{\
907 .driver = "virtio-serial-pci",\
908 .property = "vectors",\
909 .value = stringify(0),\
910 },{\
911 .driver = "usb-mouse",\
912 .property = "serial",\
913 .value = "1",\
914 },{\
915 .driver = "usb-tablet",\
916 .property = "serial",\
917 .value = "1",\
918 },{\
919 .driver = "usb-kbd",\
920 .property = "serial",\
921 .value = "1",\
924 static void pc_i440fx_0_12_machine_options(MachineClass *m)
926 pc_i440fx_0_13_machine_options(m);
927 m->hw_version = "0.12";
928 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
931 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
932 pc_i440fx_0_12_machine_options);
935 #define PC_COMPAT_0_11 \
936 PC_CPU_MODEL_IDS("0.11") \
938 .driver = "virtio-blk-pci",\
939 .property = "vectors",\
940 .value = stringify(0),\
941 },{\
942 .driver = TYPE_PCI_DEVICE,\
943 .property = "rombar",\
944 .value = stringify(0),\
945 },{\
946 .driver = "ide-drive",\
947 .property = "ver",\
948 .value = "0.11",\
949 },{\
950 .driver = "scsi-disk",\
951 .property = "ver",\
952 .value = "0.11",\
955 static void pc_i440fx_0_11_machine_options(MachineClass *m)
957 pc_i440fx_0_12_machine_options(m);
958 m->hw_version = "0.11";
959 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
962 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
963 pc_i440fx_0_11_machine_options);
966 #define PC_COMPAT_0_10 \
967 PC_CPU_MODEL_IDS("0.10") \
969 .driver = "virtio-blk-pci",\
970 .property = "class",\
971 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
972 },{\
973 .driver = "virtio-serial-pci",\
974 .property = "class",\
975 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
976 },{\
977 .driver = "virtio-net-pci",\
978 .property = "vectors",\
979 .value = stringify(0),\
980 },{\
981 .driver = "ide-drive",\
982 .property = "ver",\
983 .value = "0.10",\
984 },{\
985 .driver = "scsi-disk",\
986 .property = "ver",\
987 .value = "0.10",\
990 static void pc_i440fx_0_10_machine_options(MachineClass *m)
992 pc_i440fx_0_11_machine_options(m);
993 m->hw_version = "0.10";
994 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
997 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
998 pc_i440fx_0_10_machine_options);
1000 typedef struct {
1001 uint16_t gpu_device_id;
1002 uint16_t pch_device_id;
1003 uint8_t pch_revision_id;
1004 } IGDDeviceIDInfo;
1006 /* In real world different GPU should have different PCH. But actually
1007 * the different PCH DIDs likely map to different PCH SKUs. We do the
1008 * same thing for the GPU. For PCH, the different SKUs are going to be
1009 * all the same silicon design and implementation, just different
1010 * features turn on and off with fuses. The SW interfaces should be
1011 * consistent across all SKUs in a given family (eg LPT). But just same
1012 * features may not be supported.
1014 * Most of these different PCH features probably don't matter to the
1015 * Gfx driver, but obviously any difference in display port connections
1016 * will so it should be fine with any PCH in case of passthrough.
1018 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
1019 * scenarios, 0x9cc3 for BDW(Broadwell).
1021 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
1022 /* HSW Classic */
1023 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
1024 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
1025 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
1026 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
1027 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
1028 /* HSW ULT */
1029 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
1030 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
1031 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
1032 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
1033 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
1034 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
1035 /* HSW CRW */
1036 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
1037 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
1038 /* HSW Server */
1039 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
1040 /* HSW SRVR */
1041 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
1042 /* BSW */
1043 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
1044 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
1045 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
1046 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
1047 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
1048 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
1049 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
1050 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
1051 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
1052 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
1053 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
1056 static void isa_bridge_class_init(ObjectClass *klass, void *data)
1058 DeviceClass *dc = DEVICE_CLASS(klass);
1059 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1061 dc->desc = "ISA bridge faked to support IGD PT";
1062 k->vendor_id = PCI_VENDOR_ID_INTEL;
1063 k->class_id = PCI_CLASS_BRIDGE_ISA;
1066 static TypeInfo isa_bridge_info = {
1067 .name = "igd-passthrough-isa-bridge",
1068 .parent = TYPE_PCI_DEVICE,
1069 .instance_size = sizeof(PCIDevice),
1070 .class_init = isa_bridge_class_init,
1071 .interfaces = (InterfaceInfo[]) {
1072 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1073 { },
1077 static void pt_graphics_register_types(void)
1079 type_register_static(&isa_bridge_info);
1081 type_init(pt_graphics_register_types)
1083 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
1085 struct PCIDevice *bridge_dev;
1086 int i, num;
1087 uint16_t pch_dev_id = 0xffff;
1088 uint8_t pch_rev_id;
1090 num = ARRAY_SIZE(igd_combo_id_infos);
1091 for (i = 0; i < num; i++) {
1092 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
1093 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
1094 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
1098 if (pch_dev_id == 0xffff) {
1099 return;
1102 /* Currently IGD drivers always need to access PCH by 1f.0. */
1103 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
1104 "igd-passthrough-isa-bridge");
1107 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1109 if (!bridge_dev) {
1110 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1111 return;
1113 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1114 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1117 static void isapc_machine_options(MachineClass *m)
1119 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
1120 m->desc = "ISA-only PC";
1121 m->max_cpus = 1;
1122 m->option_rom_has_mr = true;
1123 m->rom_file_has_mr = false;
1124 pcmc->pci_enabled = false;
1125 pcmc->has_acpi_build = false;
1126 pcmc->smbios_defaults = false;
1127 pcmc->gigabyte_align = false;
1128 pcmc->smbios_legacy_mode = true;
1129 pcmc->has_reserved_memory = false;
1130 pcmc->default_nic_model = "ne2k_isa";
1131 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
1134 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1135 isapc_machine_options);
1138 #ifdef CONFIG_XEN
1139 static void xenfv_machine_options(MachineClass *m)
1141 m->desc = "Xen Fully-virtualized PC";
1142 m->max_cpus = HVM_MAX_VCPUS;
1143 m->default_machine_opts = "accel=xen";
1146 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1147 xenfv_machine_options);
1148 #endif