hw/ppce500_mpc8544ds.c

   1 /*
   2  * Qemu PowerPC MPC8544DS board emualtion
   3  *
   4  * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Yu Liu,     <yu.liu@freescale.com>
   7  *
   8  * This file is derived from hw/ppc440_bamboo.c,
   9  * the copyright for that material belongs to the original owners.
  10  *
  11  * This is free software; you can redistribute it and/or modify
  12  * it under the terms of  the GNU General  Public License as published by
  13  * the Free Software Foundation;  either version 2 of the  License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #include <dirent.h>
  18
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #include "net.h"
  22 #include "hw.h"
  23 #include "pc.h"
  24 #include "pci.h"
  25 #include "boards.h"
  26 #include "sysemu.h"
  27 #include "kvm.h"
  28 #include "kvm_ppc.h"
  29 #include "device_tree.h"
  30 #include "openpic.h"
  31 #include "ppce500.h"
  32
  33 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
  34 #define UIMAGE_LOAD_BASE           0
  35 #define DTB_LOAD_BASE              0x600000
  36 #define INITRD_LOAD_BASE           0x2000000
  37
  38 #define RAM_SIZES_ALIGN            (64UL << 20)
  39
  40 #define MPC8544_CCSRBAR_BASE       0xE0000000
  41 #define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000)
  42 #define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500)
  43 #define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600)
  44 #define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000)
  45 #define MPC8544_PCI_REGS_SIZE      0x1000
  46 #define MPC8544_PCI_IO             0xE1000000
  47 #define MPC8544_PCI_IOLEN          0x10000
  48
  49 #ifdef CONFIG_FDT
  50 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
  51 {
  52     uint32_t cell;
  53     int ret;
  54
  55     ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
  56     if (ret < 0) {
  57         fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
  58         goto out;
  59     }
  60
  61     ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
  62                                 prop, cell);
  63     if (ret < 0) {
  64         fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
  65         goto out;
  66     }
  67
  68 out:
  69     return ret;
  70 }
  71 #endif
  72
  73 static void *mpc8544_load_device_tree(target_phys_addr_t addr,
  74                                      uint32_t ramsize,
  75                                      target_phys_addr_t initrd_base,
  76                                      target_phys_addr_t initrd_size,
  77                                      const char *kernel_cmdline)
  78 {
  79     void *fdt = NULL;
  80 #ifdef CONFIG_FDT
  81     uint32_t mem_reg_property[] = {0, ramsize};
  82     char *filename;
  83     int fdt_size;
  84     int ret;
  85
  86     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  87     if (!filename) {
  88         goto out;
  89     }
  90     fdt = load_device_tree(filename, &fdt_size);
  91     qemu_free(filename);
  92     if (fdt == NULL) {
  93         goto out;
  94     }
  95
  96     /* Manipulate device tree in memory. */
  97     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
  98                                sizeof(mem_reg_property));
  99     if (ret < 0)
 100         fprintf(stderr, "couldn't set /memory/reg\n");
 101
 102     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 103                                     initrd_base);
 104     if (ret < 0)
 105         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 106
 107     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 108                                     (initrd_base + initrd_size));
 109     if (ret < 0)
 110         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 111
 112     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 113                                       kernel_cmdline);
 114     if (ret < 0)
 115         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 116
 117     if (kvm_enabled()) {
 118         struct dirent *dirp;
 119         DIR *dp;
 120         char buf[128];
 121
 122         if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
 123             printf("Can't open directory /proc/device-tree/cpus/\n");
 124             goto out;
 125         }
 126
 127         buf[0] = '\0';
 128         while ((dirp = readdir(dp)) != NULL) {
 129             if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
 130                 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
 131                 break;
 132             }
 133         }
 134         closedir(dp);
 135         if (buf[0] == '\0') {
 136             printf("Unknow host!\n");
 137             goto out;
 138         }
 139
 140         mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
 141         mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
 142     }
 143
 144     cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
 145
 146 out:
 147 #endif
 148
 149     return fdt;
 150 }
 151
 152 static void mpc8544ds_init(ram_addr_t ram_size,
 153                          const char *boot_device,
 154                          const char *kernel_filename,
 155                          const char *kernel_cmdline,
 156                          const char *initrd_filename,
 157                          const char *cpu_model)
 158 {
 159     PCIBus *pci_bus;
 160     CPUState *env;
 161     uint64_t elf_entry;
 162     uint64_t elf_lowaddr;
 163     target_ulong entry=0;
 164     target_ulong loadaddr=UIMAGE_LOAD_BASE;
 165     target_long kernel_size=0;
 166     target_ulong dt_base=DTB_LOAD_BASE;
 167     target_ulong initrd_base=INITRD_LOAD_BASE;
 168     target_long initrd_size=0;
 169     void *fdt;
 170     int i=0;
 171     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
 172     qemu_irq *irqs, *mpic, *pci_irqs;
 173     SerialState * serial[2];
 174
 175     /* Setup CPU */
 176     env = cpu_ppc_init("e500v2_v30");
 177     if (!env) {
 178         fprintf(stderr, "Unable to initialize CPU!\n");
 179         exit(1);
 180     }
 181
 182     /* Fixup Memory size on a alignment boundary */
 183     ram_size &= ~(RAM_SIZES_ALIGN - 1);
 184
 185     /* Register Memory */
 186     cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
 187
 188     /* MPIC */
 189     irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 190     irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
 191     irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
 192     mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
 193
 194     /* Serial */
 195     if (serial_hds[0])
 196         serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
 197                                0, mpic[12+26], 399193,
 198                         serial_hds[0], 1);
 199
 200     if (serial_hds[1])
 201         serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
 202                         0, mpic[12+26], 399193,
 203                         serial_hds[0], 1);
 204
 205     /* PCI */
 206     pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
 207     pci_irqs[0] = mpic[pci_irq_nrs[0]];
 208     pci_irqs[1] = mpic[pci_irq_nrs[1]];
 209     pci_irqs[2] = mpic[pci_irq_nrs[2]];
 210     pci_irqs[3] = mpic[pci_irq_nrs[3]];
 211     pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
 212     if (!pci_bus)
 213         printf("couldn't create PCI controller!\n");
 214
 215     isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
 216
 217     if (pci_bus) {
 218         /* Register network interfaces. */
 219         for (i = 0; i < nb_nics; i++) {
 220             pci_nic_init(&nd_table[i], "virtio", NULL);
 221         }
 222     }
 223
 224     /* Load kernel. */
 225     if (kernel_filename) {
 226         kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 227         if (kernel_size < 0) {
 228             kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
 229                                    NULL);
 230             entry = elf_entry;
 231             loadaddr = elf_lowaddr;
 232         }
 233         /* XXX try again as binary */
 234         if (kernel_size < 0) {
 235             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 236                     kernel_filename);
 237             exit(1);
 238         }
 239     }
 240
 241     /* Load initrd. */
 242     if (initrd_filename) {
 243         initrd_size = load_image_targphys(initrd_filename, initrd_base,
 244                                           ram_size - initrd_base);
 245
 246         if (initrd_size < 0) {
 247             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 248                     initrd_filename);
 249             exit(1);
 250         }
 251     }
 252
 253     /* If we're loading a kernel directly, we must load the device tree too. */
 254     if (kernel_filename) {
 255         fdt = mpc8544_load_device_tree(dt_base, ram_size,
 256                                       initrd_base, initrd_size, kernel_cmdline);
 257         if (fdt == NULL) {
 258             fprintf(stderr, "couldn't load device tree\n");
 259             exit(1);
 260         }
 261
 262         /* Set initial guest state. */
 263         env->gpr[1] = (16<<20) - 8;
 264         env->gpr[3] = dt_base;
 265         env->nip = entry;
 266         /* XXX we currently depend on KVM to create some initial TLB entries. */
 267     }
 268
 269     if (kvm_enabled())
 270         kvmppc_init();
 271
 272     return;
 273 }
 274
 275 static QEMUMachine mpc8544ds_machine = {
 276     .name = "mpc8544ds",
 277     .desc = "mpc8544ds",
 278     .init = mpc8544ds_init,
 279 };
 280
 281 static void mpc8544ds_machine_init(void)
 282 {
 283     qemu_register_machine(&mpc8544ds_machine);
 284 }
 285
 286 machine_init(mpc8544ds_machine_init);