net/cadence_gem: Add missing VMSTATE_END_OF_LIST
[qemu.git] / tests / libqos / pci.c
blob7e0907b51413604e764276ceda93e331d1e93b37
1 /*
2 * libqos PCI bindings
4 * Copyright IBM, Corp. 2012-2013
6 * Authors:
7 * Anthony Liguori <aliguori@us.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "libqos/pci.h"
15 #include "hw/pci/pci_regs.h"
16 #include <glib.h>
18 #include <stdio.h>
20 void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
21 void (*func)(QPCIDevice *dev, int devfn, void *data),
22 void *data)
24 int slot;
26 for (slot = 0; slot < 32; slot++) {
27 int fn;
29 for (fn = 0; fn < 8; fn++) {
30 QPCIDevice *dev;
32 dev = qpci_device_find(bus, QPCI_DEVFN(slot, fn));
33 if (!dev) {
34 continue;
37 if (vendor_id != -1 &&
38 qpci_config_readw(dev, PCI_VENDOR_ID) != vendor_id) {
39 continue;
42 if (device_id != -1 &&
43 qpci_config_readw(dev, PCI_DEVICE_ID) != device_id) {
44 continue;
47 func(dev, QPCI_DEVFN(slot, fn), data);
52 QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
54 QPCIDevice *dev;
56 dev = g_malloc0(sizeof(*dev));
57 dev->bus = bus;
58 dev->devfn = devfn;
60 if (qpci_config_readw(dev, PCI_VENDOR_ID) == 0xFFFF) {
61 g_free(dev);
62 return NULL;
65 return dev;
68 void qpci_device_enable(QPCIDevice *dev)
70 uint16_t cmd;
72 /* FIXME -- does this need to be a bus callout? */
73 cmd = qpci_config_readw(dev, PCI_COMMAND);
74 cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
75 qpci_config_writew(dev, PCI_COMMAND, cmd);
78 uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset)
80 return dev->bus->config_readb(dev->bus, dev->devfn, offset);
83 uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset)
85 return dev->bus->config_readw(dev->bus, dev->devfn, offset);
88 uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset)
90 return dev->bus->config_readl(dev->bus, dev->devfn, offset);
94 void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value)
96 dev->bus->config_writeb(dev->bus, dev->devfn, offset, value);
99 void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value)
101 dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
104 void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value)
106 dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
110 uint8_t qpci_io_readb(QPCIDevice *dev, void *data)
112 return dev->bus->io_readb(dev->bus, data);
115 uint16_t qpci_io_readw(QPCIDevice *dev, void *data)
117 return dev->bus->io_readw(dev->bus, data);
120 uint32_t qpci_io_readl(QPCIDevice *dev, void *data)
122 return dev->bus->io_readl(dev->bus, data);
126 void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value)
128 dev->bus->io_writeb(dev->bus, data, value);
131 void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value)
133 dev->bus->io_writew(dev->bus, data, value);
136 void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value)
138 dev->bus->io_writel(dev->bus, data, value);
141 void *qpci_iomap(QPCIDevice *dev, int barno)
143 return dev->bus->iomap(dev->bus, dev, barno);
146 void qpci_iounmap(QPCIDevice *dev, void *data)
148 dev->bus->iounmap(dev->bus, data);