target-i386: cleanup x86_cpu_get_phys_page_debug
[qemu.git] / hw / sh4 / shix.c
blob7c152b4a3ae86d2d2affff71361990a70eebe6ad
1 /*
2 * SHIX 2.0 board description
4 * Copyright (c) 2005 Samuel Tardieu
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 Shix 2.0 board by Alexis Polti, described at
26 http://perso.enst.fr/~polti/realisations/shix20/
28 More information in target-sh4/README.sh4
30 #include "hw/hw.h"
31 #include "hw/sh4/sh.h"
32 #include "sysemu/sysemu.h"
33 #include "sysemu/qtest.h"
34 #include "hw/boards.h"
35 #include "hw/loader.h"
36 #include "exec/address-spaces.h"
37 #include "qemu/error-report.h"
39 #define BIOS_FILENAME "shix_bios.bin"
40 #define BIOS_ADDRESS 0xA0000000
42 static void shix_init(MachineState *machine)
44 const char *cpu_model = machine->cpu_model;
45 int ret;
46 SuperHCPU *cpu;
47 struct SH7750State *s;
48 MemoryRegion *sysmem = get_system_memory();
49 MemoryRegion *rom = g_new(MemoryRegion, 1);
50 MemoryRegion *sdram = g_new(MemoryRegion, 2);
52 if (!cpu_model)
53 cpu_model = "any";
55 cpu = cpu_sh4_init(cpu_model);
56 if (cpu == NULL) {
57 fprintf(stderr, "Unable to find CPU definition\n");
58 exit(1);
61 /* Allocate memory space */
62 memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
63 vmstate_register_ram_global(rom);
64 memory_region_set_readonly(rom, true);
65 memory_region_add_subregion(sysmem, 0x00000000, rom);
66 memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
67 vmstate_register_ram_global(&sdram[0]);
68 memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
69 memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
70 vmstate_register_ram_global(&sdram[1]);
71 memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
73 /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
74 if (bios_name == NULL)
75 bios_name = BIOS_FILENAME;
76 ret = load_image_targphys(bios_name, 0, 0x4000);
77 if (ret < 0 && !qtest_enabled()) {
78 error_report("Could not load SHIX bios '%s'", bios_name);
79 exit(1);
82 /* Register peripherals */
83 s = sh7750_init(cpu, sysmem);
84 /* XXXXX Check success */
85 tc58128_init(s, "shix_linux_nand.bin", NULL);
88 static QEMUMachine shix_machine = {
89 .name = "shix",
90 .desc = "shix card",
91 .init = shix_init,
92 .is_default = 1,
95 static void shix_machine_init(void)
97 qemu_register_machine(&shix_machine);
100 machine_init(shix_machine_init);