hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32 #include "cpus.h"
  33 #include "kvm.h"
  34 #include "kvm_ppc.h"
  35
  36 #include "hw/boards.h"
  37 #include "hw/ppc.h"
  38 #include "hw/loader.h"
  39
  40 #include "hw/spapr.h"
  41 #include "hw/spapr_vio.h"
  42 #include "hw/spapr_pci.h"
  43 #include "hw/xics.h"
  44
  45 #include "kvm.h"
  46 #include "kvm_ppc.h"
  47 #include "pci.h"
  48
  49 #include "exec-memory.h"
  50
  51 #include <libfdt.h>
  52
  53 #define KERNEL_LOAD_ADDR        0x00000000
  54 #define INITRD_LOAD_ADDR        0x02800000
  55 #define FDT_MAX_SIZE            0x10000
  56 #define RTAS_MAX_SIZE           0x10000
  57 #define FW_MAX_SIZE             0x400000
  58 #define FW_FILE_NAME            "slof.bin"
  59
  60 #define MIN_RMA_SLOF            128UL
  61
  62 #define TIMEBASE_FREQ           512000000ULL
  63
  64 #define MAX_CPUS                256
  65 #define XICS_IRQS               1024
  66
  67 #define SPAPR_PCI_BUID          0x800000020000001ULL
  68 #define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
  69 #define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
  70 #define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
  71
  72 #define PHANDLE_XICP            0x00001111
  73
  74 sPAPREnvironment *spapr;
  75
  76 qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)
  77 {
  78     uint32_t irq;
  79     qemu_irq qirq;
  80
  81     if (hint) {
  82         irq = hint;
  83         /* FIXME: we should probably check for collisions somehow */
  84     } else {
  85         irq = spapr->next_irq++;
  86     }
  87
  88     qirq = xics_find_qirq(spapr->icp, irq);
  89     if (!qirq) {
  90         return NULL;
  91     }
  92
  93     if (irq_num) {
  94         *irq_num = irq;
  95     }
  96
  97     return qirq;
  98 }
  99
 100 static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr)
 101 {
 102     int ret = 0, offset;
 103     CPUState *env;
 104     char cpu_model[32];
 105     int smt = kvmppc_smt_threads();
 106
 107     assert(spapr->cpu_model);
 108
 109     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 110         uint32_t associativity[] = {cpu_to_be32(0x5),
 111                                     cpu_to_be32(0x0),
 112                                     cpu_to_be32(0x0),
 113                                     cpu_to_be32(0x0),
 114                                     cpu_to_be32(env->numa_node),
 115                                     cpu_to_be32(env->cpu_index)};
 116
 117         if ((env->cpu_index % smt) != 0) {
 118             continue;
 119         }
 120
 121         snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
 122                  env->cpu_index);
 123
 124         offset = fdt_path_offset(fdt, cpu_model);
 125         if (offset < 0) {
 126             return offset;
 127         }
 128
 129         ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
 130                           sizeof(associativity));
 131         if (ret < 0) {
 132             return ret;
 133         }
 134     }
 135     return ret;
 136 }
 137
 138 static void *spapr_create_fdt_skel(const char *cpu_model,
 139                                    target_phys_addr_t rma_size,
 140                                    target_phys_addr_t initrd_base,
 141                                    target_phys_addr_t initrd_size,
 142                                    const char *boot_device,
 143                                    const char *kernel_cmdline,
 144                                    long hash_shift)
 145 {
 146     void *fdt;
 147     CPUState *env;
 148     uint64_t mem_reg_property[2];
 149     uint32_t start_prop = cpu_to_be32(initrd_base);
 150     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 151     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
 152     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 153         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 154     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 155     int i;
 156     char *modelname;
 157     int smt = kvmppc_smt_threads();
 158     unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
 159     uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
 160     uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
 161                                 cpu_to_be32(0x0), cpu_to_be32(0x0),
 162                                 cpu_to_be32(0x0)};
 163     char mem_name[32];
 164     target_phys_addr_t node0_size, mem_start;
 165
 166 #define _FDT(exp) \
 167     do { \
 168         int ret = (exp);                                           \
 169         if (ret < 0) {                                             \
 170             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 171                     #exp, fdt_strerror(ret));                      \
 172             exit(1);                                               \
 173         }                                                          \
 174     } while (0)
 175
 176     fdt = g_malloc0(FDT_MAX_SIZE);
 177     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 178
 179     _FDT((fdt_finish_reservemap(fdt)));
 180
 181     /* Root node */
 182     _FDT((fdt_begin_node(fdt, "")));
 183     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 184     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 185
 186     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 187     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 188
 189     /* /chosen */
 190     _FDT((fdt_begin_node(fdt, "chosen")));
 191
 192     /* Set Form1_affinity */
 193     _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
 194
 195     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 196     _FDT((fdt_property(fdt, "linux,initrd-start",
 197                        &start_prop, sizeof(start_prop))));
 198     _FDT((fdt_property(fdt, "linux,initrd-end",
 199                        &end_prop, sizeof(end_prop))));
 200     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 201
 202     /*
 203      * Because we don't always invoke any firmware, we can't rely on
 204      * that to do BAR allocation.  Long term, we should probably do
 205      * that ourselves, but for now, this setting (plus advertising the
 206      * current BARs as 0) causes sufficiently recent kernels to to the
 207      * BAR assignment themselves */
 208     _FDT((fdt_property_cell(fdt, "linux,pci-probe-only", 0)));
 209
 210     _FDT((fdt_end_node(fdt)));
 211
 212     /* memory node(s) */
 213     node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
 214     if (rma_size > node0_size) {
 215         rma_size = node0_size;
 216     }
 217
 218     /* RMA */
 219     mem_reg_property[0] = 0;
 220     mem_reg_property[1] = cpu_to_be64(rma_size);
 221     _FDT((fdt_begin_node(fdt, "memory@0")));
 222     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 223     _FDT((fdt_property(fdt, "reg", mem_reg_property,
 224         sizeof(mem_reg_property))));
 225     _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 226         sizeof(associativity))));
 227     _FDT((fdt_end_node(fdt)));
 228
 229     /* RAM: Node 0 */
 230     if (node0_size > rma_size) {
 231         mem_reg_property[0] = cpu_to_be64(rma_size);
 232         mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
 233
 234         sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
 235         _FDT((fdt_begin_node(fdt, mem_name)));
 236         _FDT((fdt_property_string(fdt, "device_type", "memory")));
 237         _FDT((fdt_property(fdt, "reg", mem_reg_property,
 238                            sizeof(mem_reg_property))));
 239         _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 240                            sizeof(associativity))));
 241         _FDT((fdt_end_node(fdt)));
 242     }
 243
 244     /* RAM: Node 1 and beyond */
 245     mem_start = node0_size;
 246     for (i = 1; i < nb_numa_nodes; i++) {
 247         mem_reg_property[0] = cpu_to_be64(mem_start);
 248         mem_reg_property[1] = cpu_to_be64(node_mem[i]);
 249         associativity[3] = associativity[4] = cpu_to_be32(i);
 250         sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
 251         _FDT((fdt_begin_node(fdt, mem_name)));
 252         _FDT((fdt_property_string(fdt, "device_type", "memory")));
 253         _FDT((fdt_property(fdt, "reg", mem_reg_property,
 254             sizeof(mem_reg_property))));
 255         _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 256             sizeof(associativity))));
 257         _FDT((fdt_end_node(fdt)));
 258         mem_start += node_mem[i];
 259     }
 260
 261     /* cpus */
 262     _FDT((fdt_begin_node(fdt, "cpus")));
 263
 264     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 265     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 266
 267     modelname = g_strdup(cpu_model);
 268
 269     for (i = 0; i < strlen(modelname); i++) {
 270         modelname[i] = toupper(modelname[i]);
 271     }
 272
 273     /* This is needed during FDT finalization */
 274     spapr->cpu_model = g_strdup(modelname);
 275
 276     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 277         int index = env->cpu_index;
 278         uint32_t servers_prop[smp_threads];
 279         uint32_t gservers_prop[smp_threads * 2];
 280         char *nodename;
 281         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 282                            0xffffffff, 0xffffffff};
 283         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 284         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 285
 286         if ((index % smt) != 0) {
 287             continue;
 288         }
 289
 290         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 291             fprintf(stderr, "Allocation failure\n");
 292             exit(1);
 293         }
 294
 295         _FDT((fdt_begin_node(fdt, nodename)));
 296
 297         free(nodename);
 298
 299         _FDT((fdt_property_cell(fdt, "reg", index)));
 300         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 301
 302         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 303         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 304                                 env->dcache_line_size)));
 305         _FDT((fdt_property_cell(fdt, "icache-block-size",
 306                                 env->icache_line_size)));
 307         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 308         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 309         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 310         _FDT((fdt_property(fdt, "ibm,pft-size",
 311                            pft_size_prop, sizeof(pft_size_prop))));
 312         _FDT((fdt_property_string(fdt, "status", "okay")));
 313         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 314
 315         /* Build interrupt servers and gservers properties */
 316         for (i = 0; i < smp_threads; i++) {
 317             servers_prop[i] = cpu_to_be32(index + i);
 318             /* Hack, direct the group queues back to cpu 0 */
 319             gservers_prop[i*2] = cpu_to_be32(index + i);
 320             gservers_prop[i*2 + 1] = 0;
 321         }
 322         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
 323                            servers_prop, sizeof(servers_prop))));
 324         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 325                            gservers_prop, sizeof(gservers_prop))));
 326
 327         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 328             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 329                                segs, sizeof(segs))));
 330         }
 331
 332         /* Advertise VMX/VSX (vector extensions) if available
 333          *   0 / no property == no vector extensions
 334          *   1               == VMX / Altivec available
 335          *   2               == VSX available */
 336         if (env->insns_flags & PPC_ALTIVEC) {
 337             uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
 338
 339             _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
 340         }
 341
 342         /* Advertise DFP (Decimal Floating Point) if available
 343          *   0 / no property == no DFP
 344          *   1               == DFP available */
 345         if (env->insns_flags2 & PPC2_DFP) {
 346             _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
 347         }
 348
 349         _FDT((fdt_end_node(fdt)));
 350     }
 351
 352     g_free(modelname);
 353
 354     _FDT((fdt_end_node(fdt)));
 355
 356     /* RTAS */
 357     _FDT((fdt_begin_node(fdt, "rtas")));
 358
 359     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 360                        sizeof(hypertas_prop))));
 361
 362     _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
 363         refpoints, sizeof(refpoints))));
 364
 365     _FDT((fdt_end_node(fdt)));
 366
 367     /* interrupt controller */
 368     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 369
 370     _FDT((fdt_property_string(fdt, "device_type",
 371                               "PowerPC-External-Interrupt-Presentation")));
 372     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 373     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 374     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 375                        interrupt_server_ranges_prop,
 376                        sizeof(interrupt_server_ranges_prop))));
 377     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 378     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 379     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 380
 381     _FDT((fdt_end_node(fdt)));
 382
 383     /* vdevice */
 384     _FDT((fdt_begin_node(fdt, "vdevice")));
 385
 386     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 387     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 388     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 389     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 390     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 391     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 392
 393     _FDT((fdt_end_node(fdt)));
 394
 395     _FDT((fdt_end_node(fdt))); /* close root node */
 396     _FDT((fdt_finish(fdt)));
 397
 398     return fdt;
 399 }
 400
 401 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 402                                target_phys_addr_t fdt_addr,
 403                                target_phys_addr_t rtas_addr,
 404                                target_phys_addr_t rtas_size)
 405 {
 406     int ret;
 407     void *fdt;
 408     sPAPRPHBState *phb;
 409
 410     fdt = g_malloc(FDT_MAX_SIZE);
 411
 412     /* open out the base tree into a temp buffer for the final tweaks */
 413     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 414
 415     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 416     if (ret < 0) {
 417         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 418         exit(1);
 419     }
 420
 421     QLIST_FOREACH(phb, &spapr->phbs, list) {
 422         ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt);
 423     }
 424
 425     if (ret < 0) {
 426         fprintf(stderr, "couldn't setup PCI devices in fdt\n");
 427         exit(1);
 428     }
 429
 430     /* RTAS */
 431     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 432     if (ret < 0) {
 433         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 434     }
 435
 436     /* Advertise NUMA via ibm,associativity */
 437     if (nb_numa_nodes > 1) {
 438         ret = spapr_set_associativity(fdt, spapr);
 439         if (ret < 0) {
 440             fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
 441         }
 442     }
 443
 444     spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
 445
 446     _FDT((fdt_pack(fdt)));
 447
 448     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 449
 450     g_free(fdt);
 451 }
 452
 453 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 454 {
 455     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 456 }
 457
 458 static void emulate_spapr_hypercall(CPUState *env)
 459 {
 460     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 461 }
 462
 463 static void spapr_reset(void *opaque)
 464 {
 465     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 466
 467     fprintf(stderr, "sPAPR reset\n");
 468
 469     /* flush out the hash table */
 470     memset(spapr->htab, 0, spapr->htab_size);
 471
 472     /* Load the fdt */
 473     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 474                        spapr->rtas_size);
 475
 476     /* Set up the entry state */
 477     first_cpu->gpr[3] = spapr->fdt_addr;
 478     first_cpu->gpr[5] = 0;
 479     first_cpu->halted = 0;
 480     first_cpu->nip = spapr->entry_point;
 481
 482 }
 483
 484 /* pSeries LPAR / sPAPR hardware init */
 485 static void ppc_spapr_init(ram_addr_t ram_size,
 486                            const char *boot_device,
 487                            const char *kernel_filename,
 488                            const char *kernel_cmdline,
 489                            const char *initrd_filename,
 490                            const char *cpu_model)
 491 {
 492     CPUState *env;
 493     int i;
 494     MemoryRegion *sysmem = get_system_memory();
 495     MemoryRegion *ram = g_new(MemoryRegion, 1);
 496     target_phys_addr_t rma_alloc_size, rma_size;
 497     uint32_t initrd_base;
 498     long kernel_size, initrd_size, fw_size;
 499     long pteg_shift = 17;
 500     char *filename;
 501
 502     spapr = g_malloc0(sizeof(*spapr));
 503     QLIST_INIT(&spapr->phbs);
 504
 505     cpu_ppc_hypercall = emulate_spapr_hypercall;
 506
 507     /* Allocate RMA if necessary */
 508     rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
 509
 510     if (rma_alloc_size == -1) {
 511         hw_error("qemu: Unable to create RMA\n");
 512         exit(1);
 513     }
 514     if (rma_alloc_size && (rma_alloc_size < ram_size)) {
 515         rma_size = rma_alloc_size;
 516     } else {
 517         rma_size = ram_size;
 518     }
 519
 520     /* We place the device tree just below either the top of the RMA,
 521      * or just below 2GB, whichever is lowere, so that it can be
 522      * processed with 32-bit real mode code if necessary */
 523     spapr->fdt_addr = MIN(rma_size, 0x80000000) - FDT_MAX_SIZE;
 524     spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE;
 525
 526     /* init CPUs */
 527     if (cpu_model == NULL) {
 528         cpu_model = kvm_enabled() ? "host" : "POWER7";
 529     }
 530     for (i = 0; i < smp_cpus; i++) {
 531         env = cpu_init(cpu_model);
 532
 533         if (!env) {
 534             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 535             exit(1);
 536         }
 537         /* Set time-base frequency to 512 MHz */
 538         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 539         qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
 540
 541         env->hreset_vector = 0x60;
 542         env->hreset_excp_prefix = 0;
 543         env->gpr[3] = env->cpu_index;
 544     }
 545
 546     /* allocate RAM */
 547     spapr->ram_limit = ram_size;
 548     if (spapr->ram_limit > rma_alloc_size) {
 549         ram_addr_t nonrma_base = rma_alloc_size;
 550         ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
 551
 552         memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
 553         vmstate_register_ram_global(ram);
 554         memory_region_add_subregion(sysmem, nonrma_base, ram);
 555     }
 556
 557     /* allocate hash page table.  For now we always make this 16mb,
 558      * later we should probably make it scale to the size of guest
 559      * RAM */
 560     spapr->htab_size = 1ULL << (pteg_shift + 7);
 561     spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
 562
 563     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 564         env->external_htab = spapr->htab;
 565         env->htab_base = -1;
 566         env->htab_mask = spapr->htab_size - 1;
 567
 568         /* Tell KVM that we're in PAPR mode */
 569         env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 570                              ((pteg_shift + 7) - 18);
 571         env->spr[SPR_HIOR] = 0;
 572
 573         if (kvm_enabled()) {
 574             kvmppc_set_papr(env);
 575         }
 576     }
 577
 578     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 579     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 580                                            ram_size - spapr->rtas_addr);
 581     if (spapr->rtas_size < 0) {
 582         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 583         exit(1);
 584     }
 585     g_free(filename);
 586
 587     /* Set up Interrupt Controller */
 588     spapr->icp = xics_system_init(XICS_IRQS);
 589     spapr->next_irq = 16;
 590
 591     /* Set up VIO bus */
 592     spapr->vio_bus = spapr_vio_bus_init();
 593
 594     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 595         if (serial_hds[i]) {
 596             spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i,
 597                              serial_hds[i]);
 598         }
 599     }
 600
 601     /* Set up PCI */
 602     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
 603                      SPAPR_PCI_MEM_WIN_ADDR,
 604                      SPAPR_PCI_MEM_WIN_SIZE,
 605                      SPAPR_PCI_IO_WIN_ADDR);
 606
 607     for (i = 0; i < nb_nics; i++) {
 608         NICInfo *nd = &nd_table[i];
 609
 610         if (!nd->model) {
 611             nd->model = g_strdup("ibmveth");
 612         }
 613
 614         if (strcmp(nd->model, "ibmveth") == 0) {
 615             spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
 616         } else {
 617             pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
 618         }
 619     }
 620
 621     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 622         spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
 623     }
 624
 625     if (kernel_filename) {
 626         uint64_t lowaddr = 0;
 627
 628         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 629                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 630         if (kernel_size < 0) {
 631             kernel_size = load_image_targphys(kernel_filename,
 632                                               KERNEL_LOAD_ADDR,
 633                                               ram_size - KERNEL_LOAD_ADDR);
 634         }
 635         if (kernel_size < 0) {
 636             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 637                     kernel_filename);
 638             exit(1);
 639         }
 640
 641         /* load initrd */
 642         if (initrd_filename) {
 643             initrd_base = INITRD_LOAD_ADDR;
 644             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 645                                               ram_size - initrd_base);
 646             if (initrd_size < 0) {
 647                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 648                         initrd_filename);
 649                 exit(1);
 650             }
 651         } else {
 652             initrd_base = 0;
 653             initrd_size = 0;
 654         }
 655
 656         spapr->entry_point = KERNEL_LOAD_ADDR;
 657     } else {
 658         if (rma_size < (MIN_RMA_SLOF << 20)) {
 659             fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 660                     "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
 661             exit(1);
 662         }
 663         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 664         fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 665         if (fw_size < 0) {
 666             hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 667             exit(1);
 668         }
 669         g_free(filename);
 670         spapr->entry_point = 0x100;
 671         initrd_base = 0;
 672         initrd_size = 0;
 673
 674         /* SLOF will startup the secondary CPUs using RTAS,
 675            rather than expecting a kexec() style entry */
 676         for (env = first_cpu; env != NULL; env = env->next_cpu) {
 677             env->halted = 1;
 678         }
 679     }
 680
 681     /* Prepare the device tree */
 682     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size,
 683                                             initrd_base, initrd_size,
 684                                             boot_device, kernel_cmdline,
 685                                             pteg_shift + 7);
 686     assert(spapr->fdt_skel != NULL);
 687
 688     qemu_register_reset(spapr_reset, spapr);
 689 }
 690
 691 static QEMUMachine spapr_machine = {
 692     .name = "pseries",
 693     .desc = "pSeries Logical Partition (PAPR compliant)",
 694     .init = ppc_spapr_init,
 695     .max_cpus = MAX_CPUS,
 696     .no_vga = 1,
 697     .no_parallel = 1,
 698     .use_scsi = 1,
 699 };
 700
 701 static void spapr_machine_init(void)
 702 {
 703     qemu_register_machine(&spapr_machine);
 704 }
 705
 706 machine_init(spapr_machine_init);