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qdev: skip bus check for bus-less devices in qdev_unplug()
[qemu.git] / hw / mips / mips_fulong2e.c
blob1aac93a414bc99d557aa6635b3a488417f523f23
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 /*
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
16 *
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
19 */
20
21 #include "hw/hw.h"
22 #include "hw/i386/pc.h"
23 #include "hw/char/serial.h"
24 #include "hw/block/fdc.h"
25 #include "net/net.h"
26 #include "hw/boards.h"
27 #include "hw/i2c/smbus.h"
28 #include "block/block.h"
29 #include "hw/block/flash.h"
30 #include "hw/mips/mips.h"
31 #include "hw/mips/cpudevs.h"
32 #include "hw/pci/pci.h"
33 #include "sysemu/char.h"
34 #include "sysemu/sysemu.h"
35 #include "audio/audio.h"
36 #include "qemu/log.h"
37 #include "hw/loader.h"
38 #include "hw/mips/bios.h"
39 #include "hw/ide.h"
40 #include "elf.h"
41 #include "hw/isa/vt82c686.h"
42 #include "hw/timer/mc146818rtc.h"
43 #include "hw/timer/i8254.h"
44 #include "sysemu/blockdev.h"
45 #include "exec/address-spaces.h"
46
47 #define DEBUG_FULONG2E_INIT
48
49 #define ENVP_ADDR 0x80002000l
50 #define ENVP_NB_ENTRIES 16
51 #define ENVP_ENTRY_SIZE 256
52
53 #define MAX_IDE_BUS 2
54
55 /*
56 * PMON is not part of qemu and released with BSD license, anyone
57 * who want to build a pmon binary please first git-clone the source
58 * from the git repository at:
59 * http://www.loongson.cn/support/git/pmon
60 * Then follow the "Compile Guide" available at:
61 * http://dev.lemote.com/code/pmon
62 *
63 * Notes:
64 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
65 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
66 * in the "Compile Guide".
67 */
68 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
69
70 /* PCI SLOT in fulong 2e */
71 #define FULONG2E_VIA_SLOT 5
72 #define FULONG2E_ATI_SLOT 6
73 #define FULONG2E_RTL8139_SLOT 7
74
75 static ISADevice *pit;
76
77 static struct _loaderparams {
78 int ram_size;
79 const char *kernel_filename;
80 const char *kernel_cmdline;
81 const char *initrd_filename;
82 } loaderparams;
83
84 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
85 const char *string, ...)
86 {
87 va_list ap;
88 int32_t table_addr;
89
90 if (index >= ENVP_NB_ENTRIES)
91 return;
92
93 if (string == NULL) {
94 prom_buf[index] = 0;
95 return;
96 }
97
98 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
99 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
100
101 va_start(ap, string);
102 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
103 va_end(ap);
104 }
105
106 static int64_t load_kernel (CPUMIPSState *env)
107 {
108 int64_t kernel_entry, kernel_low, kernel_high;
109 int index = 0;
110 long initrd_size;
111 ram_addr_t initrd_offset;
112 uint32_t *prom_buf;
113 long prom_size;
114
115 if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
116 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
117 (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
118 fprintf(stderr, "qemu: could not load kernel '%s'\n",
119 loaderparams.kernel_filename);
120 exit(1);
121 }
122
123 /* load initrd */
124 initrd_size = 0;
125 initrd_offset = 0;
126 if (loaderparams.initrd_filename) {
127 initrd_size = get_image_size (loaderparams.initrd_filename);
128 if (initrd_size > 0) {
129 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
130 if (initrd_offset + initrd_size > ram_size) {
131 fprintf(stderr,
132 "qemu: memory too small for initial ram disk '%s'\n",
133 loaderparams.initrd_filename);
134 exit(1);
135 }
136 initrd_size = load_image_targphys(loaderparams.initrd_filename,
137 initrd_offset, ram_size - initrd_offset);
138 }
139 if (initrd_size == (target_ulong) -1) {
140 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
141 loaderparams.initrd_filename);
142 exit(1);
143 }
144 }
145
146 /* Setup prom parameters. */
147 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
148 prom_buf = g_malloc(prom_size);
149
150 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
151 if (initrd_size > 0) {
152 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
153 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
154 loaderparams.kernel_cmdline);
155 } else {
156 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
157 }
158
159 /* Setup minimum environment variables */
160 prom_set(prom_buf, index++, "busclock=33000000");
161 prom_set(prom_buf, index++, "cpuclock=100000000");
162 prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
163 prom_set(prom_buf, index++, "modetty0=38400n8r");
164 prom_set(prom_buf, index++, NULL);
165
166 rom_add_blob_fixed("prom", prom_buf, prom_size,
167 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
168
169 return kernel_entry;
170 }
171
172 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
173 {
174 uint32_t *p;
175
176 /* Small bootloader */
177 p = (uint32_t *) base;
178
179 stl_raw(p++, 0x0bf00010); /* j 0x1fc00040 */
180 stl_raw(p++, 0x00000000); /* nop */
181
182 /* Second part of the bootloader */
183 p = (uint32_t *) (base + 0x040);
184
185 stl_raw(p++, 0x3c040000); /* lui a0, 0 */
186 stl_raw(p++, 0x34840002); /* ori a0, a0, 2 */
187 stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
188 stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
189 stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
190 stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
191 stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
192 stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
193 stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
194 stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
195 stl_raw(p++, 0x03e00008); /* jr ra */
196 stl_raw(p++, 0x00000000); /* nop */
197 }
198
199
200 static void main_cpu_reset(void *opaque)
201 {
202 MIPSCPU *cpu = opaque;
203 CPUMIPSState *env = &cpu->env;
204
205 cpu_reset(CPU(cpu));
206 /* TODO: 2E reset stuff */
207 if (loaderparams.kernel_filename) {
208 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
209 }
210 }
211
212 uint8_t eeprom_spd[0x80] = {
213 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
214 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
215 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
216 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
217 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
218 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
219 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
220 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
221 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
222 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
223 0x20,0x30,0x20
224 };
225
226 /* Audio support */
227 static void audio_init (PCIBus *pci_bus)
228 {
229 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
230 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
231 }
232
233 /* Network support */
234 static void network_init (void)
235 {
236 int i;
237
238 for(i = 0; i < nb_nics; i++) {
239 NICInfo *nd = &nd_table[i];
240 const char *default_devaddr = NULL;
241
242 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
243 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
244 default_devaddr = "07";
245 }
246
247 pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
248 }
249 }
250
251 static void cpu_request_exit(void *opaque, int irq, int level)
252 {
253 CPUMIPSState *env = cpu_single_env;
254
255 if (env && level) {
256 cpu_exit(env);
257 }
258 }
259
260 static void mips_fulong2e_init(QEMUMachineInitArgs *args)
261 {
262 ram_addr_t ram_size = args->ram_size;
263 const char *cpu_model = args->cpu_model;
264 const char *kernel_filename = args->kernel_filename;
265 const char *kernel_cmdline = args->kernel_cmdline;
266 const char *initrd_filename = args->initrd_filename;
267 char *filename;
268 MemoryRegion *address_space_mem = get_system_memory();
269 MemoryRegion *ram = g_new(MemoryRegion, 1);
270 MemoryRegion *bios = g_new(MemoryRegion, 1);
271 long bios_size;
272 int64_t kernel_entry;
273 qemu_irq *i8259;
274 qemu_irq *cpu_exit_irq;
275 PCIBus *pci_bus;
276 ISABus *isa_bus;
277 i2c_bus *smbus;
278 int i;
279 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
280 MIPSCPU *cpu;
281 CPUMIPSState *env;
282
283 /* init CPUs */
284 if (cpu_model == NULL) {
285 cpu_model = "Loongson-2E";
286 }
287 cpu = cpu_mips_init(cpu_model);
288 if (cpu == NULL) {
289 fprintf(stderr, "Unable to find CPU definition\n");
290 exit(1);
291 }
292 env = &cpu->env;
293
294 qemu_register_reset(main_cpu_reset, cpu);
295
296 /* fulong 2e has 256M ram. */
297 ram_size = 256 * 1024 * 1024;
298
299 /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
300 bios_size = 1024 * 1024;
301
302 /* allocate RAM */
303 memory_region_init_ram(ram, "fulong2e.ram", ram_size);
304 vmstate_register_ram_global(ram);
305 memory_region_init_ram(bios, "fulong2e.bios", bios_size);
306 vmstate_register_ram_global(bios);
307 memory_region_set_readonly(bios, true);
308
309 memory_region_add_subregion(address_space_mem, 0, ram);
310 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
311
312 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
313 * Please use -L to set the BIOS path and -bios to set bios name. */
314
315 if (kernel_filename) {
316 loaderparams.ram_size = ram_size;
317 loaderparams.kernel_filename = kernel_filename;
318 loaderparams.kernel_cmdline = kernel_cmdline;
319 loaderparams.initrd_filename = initrd_filename;
320 kernel_entry = load_kernel (env);
321 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
322 } else {
323 if (bios_name == NULL) {
324 bios_name = FULONG_BIOSNAME;
325 }
326 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
327 if (filename) {
328 bios_size = load_image_targphys(filename, 0x1fc00000LL,
329 BIOS_SIZE);
330 g_free(filename);
331 } else {
332 bios_size = -1;
333 }
334
335 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
336 fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
337 exit(1);
338 }
339 }
340
341 /* Init internal devices */
342 cpu_mips_irq_init_cpu(env);
343 cpu_mips_clock_init(env);
344
345 /* North bridge, Bonito --> IP2 */
346 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
347
348 /* South bridge */
349 ide_drive_get(hd, MAX_IDE_BUS);
350
351 isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
352 if (!isa_bus) {
353 fprintf(stderr, "vt82c686b_init error\n");
354 exit(1);
355 }
356
357 /* Interrupt controller */
358 /* The 8259 -> IP5 */
359 i8259 = i8259_init(isa_bus, env->irq[5]);
360 isa_bus_irqs(isa_bus, i8259);
361
362 vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
363 pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
364 "vt82c686b-usb-uhci");
365 pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
366 "vt82c686b-usb-uhci");
367
368 smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
369 0xeee1, NULL);
370 /* TODO: Populate SPD eeprom data. */
371 smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
372
373 /* init other devices */
374 pit = pit_init(isa_bus, 0x40, 0, NULL);
375 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
376 DMA_init(0, cpu_exit_irq);
377
378 /* Super I/O */
379 isa_create_simple(isa_bus, "i8042");
380
381 rtc_init(isa_bus, 2000, NULL);
382
383 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
384 if (serial_hds[i]) {
385 serial_isa_init(isa_bus, i, serial_hds[i]);
386 }
387 }
388
389 if (parallel_hds[0]) {
390 parallel_init(isa_bus, 0, parallel_hds[0]);
391 }
392
393 /* Sound card */
394 audio_init(pci_bus);
395 /* Network card */
396 network_init();
397 }
398
399 static QEMUMachine mips_fulong2e_machine = {
400 .name = "fulong2e",
401 .desc = "Fulong 2e mini pc",
402 .init = mips_fulong2e_init,
403 DEFAULT_MACHINE_OPTIONS,
404 };
405
406 static void mips_fulong2e_machine_init(void)
407 {
408 qemu_register_machine(&mips_fulong2e_machine);
409 }
410
411 machine_init(mips_fulong2e_machine_init);
QEmu