hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32
  33 #include "hw/boards.h"
  34 #include "hw/ppc.h"
  35 #include "hw/loader.h"
  36
  37 #include "hw/spapr.h"
  38 #include "hw/spapr_vio.h"
  39 #include "hw/xics.h"
  40
  41 #include "kvm.h"
  42 #include "kvm_ppc.h"
  43
  44 #include "exec-memory.h"
  45
  46 #include <libfdt.h>
  47
  48 #define KERNEL_LOAD_ADDR        0x00000000
  49 #define INITRD_LOAD_ADDR        0x02800000
  50 #define FDT_MAX_SIZE            0x10000
  51 #define RTAS_MAX_SIZE           0x10000
  52 #define FW_MAX_SIZE             0x400000
  53 #define FW_FILE_NAME            "slof.bin"
  54
  55 #define MIN_RAM_SLOF            512UL
  56
  57 #define TIMEBASE_FREQ           512000000ULL
  58
  59 #define MAX_CPUS                256
  60 #define XICS_IRQS               1024
  61
  62 #define PHANDLE_XICP            0x00001111
  63
  64 sPAPREnvironment *spapr;
  65
  66 qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)
  67 {
  68     uint32_t irq;
  69     qemu_irq qirq;
  70
  71     if (hint) {
  72         irq = hint;
  73         /* FIXME: we should probably check for collisions somehow */
  74     } else {
  75         irq = spapr->next_irq++;
  76     }
  77
  78     qirq = xics_find_qirq(spapr->icp, irq);
  79     if (!qirq) {
  80         return NULL;
  81     }
  82
  83     if (irq_num) {
  84         *irq_num = irq;
  85     }
  86
  87     return qirq;
  88 }
  89
  90 static void *spapr_create_fdt_skel(const char *cpu_model,
  91                                    target_phys_addr_t initrd_base,
  92                                    target_phys_addr_t initrd_size,
  93                                    const char *boot_device,
  94                                    const char *kernel_cmdline,
  95                                    long hash_shift)
  96 {
  97     void *fdt;
  98     CPUState *env;
  99     uint64_t mem_reg_property[] = { 0, cpu_to_be64(ram_size) };
 100     uint32_t start_prop = cpu_to_be32(initrd_base);
 101     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 102     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
 103     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 104         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 105     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 106     int i;
 107     char *modelname;
 108
 109 #define _FDT(exp) \
 110     do { \
 111         int ret = (exp);                                           \
 112         if (ret < 0) {                                             \
 113             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 114                     #exp, fdt_strerror(ret));                      \
 115             exit(1);                                               \
 116         }                                                          \
 117     } while (0)
 118
 119     fdt = g_malloc0(FDT_MAX_SIZE);
 120     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 121
 122     _FDT((fdt_finish_reservemap(fdt)));
 123
 124     /* Root node */
 125     _FDT((fdt_begin_node(fdt, "")));
 126     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 127     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 128
 129     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 130     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 131
 132     /* /chosen */
 133     _FDT((fdt_begin_node(fdt, "chosen")));
 134
 135     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 136     _FDT((fdt_property(fdt, "linux,initrd-start",
 137                        &start_prop, sizeof(start_prop))));
 138     _FDT((fdt_property(fdt, "linux,initrd-end",
 139                        &end_prop, sizeof(end_prop))));
 140     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 141
 142     _FDT((fdt_end_node(fdt)));
 143
 144     /* memory node */
 145     _FDT((fdt_begin_node(fdt, "memory@0")));
 146
 147     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 148     _FDT((fdt_property(fdt, "reg",
 149                        mem_reg_property, sizeof(mem_reg_property))));
 150
 151     _FDT((fdt_end_node(fdt)));
 152
 153     /* cpus */
 154     _FDT((fdt_begin_node(fdt, "cpus")));
 155
 156     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 157     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 158
 159     modelname = g_strdup(cpu_model);
 160
 161     for (i = 0; i < strlen(modelname); i++) {
 162         modelname[i] = toupper(modelname[i]);
 163     }
 164
 165     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 166         int index = env->cpu_index;
 167         uint32_t gserver_prop[] = {cpu_to_be32(index), 0}; /* HACK! */
 168         char *nodename;
 169         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 170                            0xffffffff, 0xffffffff};
 171         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 172         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 173
 174         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 175             fprintf(stderr, "Allocation failure\n");
 176             exit(1);
 177         }
 178
 179         _FDT((fdt_begin_node(fdt, nodename)));
 180
 181         free(nodename);
 182
 183         _FDT((fdt_property_cell(fdt, "reg", index)));
 184         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 185
 186         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 187         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 188                                 env->dcache_line_size)));
 189         _FDT((fdt_property_cell(fdt, "icache-block-size",
 190                                 env->icache_line_size)));
 191         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 192         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 193         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 194         _FDT((fdt_property(fdt, "ibm,pft-size",
 195                            pft_size_prop, sizeof(pft_size_prop))));
 196         _FDT((fdt_property_string(fdt, "status", "okay")));
 197         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 198         _FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", index)));
 199         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 200                            gserver_prop, sizeof(gserver_prop))));
 201
 202         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 203             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 204                                segs, sizeof(segs))));
 205         }
 206
 207         _FDT((fdt_end_node(fdt)));
 208     }
 209
 210     g_free(modelname);
 211
 212     _FDT((fdt_end_node(fdt)));
 213
 214     /* RTAS */
 215     _FDT((fdt_begin_node(fdt, "rtas")));
 216
 217     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 218                        sizeof(hypertas_prop))));
 219
 220     _FDT((fdt_end_node(fdt)));
 221
 222     /* interrupt controller */
 223     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 224
 225     _FDT((fdt_property_string(fdt, "device_type",
 226                               "PowerPC-External-Interrupt-Presentation")));
 227     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 228     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 229     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 230                        interrupt_server_ranges_prop,
 231                        sizeof(interrupt_server_ranges_prop))));
 232     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 233     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 234     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 235
 236     _FDT((fdt_end_node(fdt)));
 237
 238     /* vdevice */
 239     _FDT((fdt_begin_node(fdt, "vdevice")));
 240
 241     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 242     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 243     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 244     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 245     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 246     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 247
 248     _FDT((fdt_end_node(fdt)));
 249
 250     _FDT((fdt_end_node(fdt))); /* close root node */
 251     _FDT((fdt_finish(fdt)));
 252
 253     return fdt;
 254 }
 255
 256 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 257                                target_phys_addr_t fdt_addr,
 258                                target_phys_addr_t rtas_addr,
 259                                target_phys_addr_t rtas_size)
 260 {
 261     int ret;
 262     void *fdt;
 263
 264     fdt = g_malloc(FDT_MAX_SIZE);
 265
 266     /* open out the base tree into a temp buffer for the final tweaks */
 267     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 268
 269     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 270     if (ret < 0) {
 271         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 272         exit(1);
 273     }
 274
 275     /* RTAS */
 276     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 277     if (ret < 0) {
 278         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 279     }
 280
 281     _FDT((fdt_pack(fdt)));
 282
 283     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 284
 285     g_free(fdt);
 286 }
 287
 288 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 289 {
 290     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 291 }
 292
 293 static void emulate_spapr_hypercall(CPUState *env)
 294 {
 295     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 296 }
 297
 298 static void spapr_reset(void *opaque)
 299 {
 300     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 301
 302     fprintf(stderr, "sPAPR reset\n");
 303
 304     /* flush out the hash table */
 305     memset(spapr->htab, 0, spapr->htab_size);
 306
 307     /* Load the fdt */
 308     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 309                        spapr->rtas_size);
 310
 311     /* Set up the entry state */
 312     first_cpu->gpr[3] = spapr->fdt_addr;
 313     first_cpu->gpr[5] = 0;
 314     first_cpu->halted = 0;
 315     first_cpu->nip = spapr->entry_point;
 316
 317 }
 318
 319 /* pSeries LPAR / sPAPR hardware init */
 320 static void ppc_spapr_init(ram_addr_t ram_size,
 321                            const char *boot_device,
 322                            const char *kernel_filename,
 323                            const char *kernel_cmdline,
 324                            const char *initrd_filename,
 325                            const char *cpu_model)
 326 {
 327     CPUState *env;
 328     int i;
 329     MemoryRegion *sysmem = get_system_memory();
 330     MemoryRegion *ram = g_new(MemoryRegion, 1);
 331     uint32_t initrd_base;
 332     long kernel_size, initrd_size, fw_size;
 333     long pteg_shift = 17;
 334     char *filename;
 335
 336     spapr = g_malloc(sizeof(*spapr));
 337     cpu_ppc_hypercall = emulate_spapr_hypercall;
 338
 339     /* We place the device tree just below either the top of RAM, or
 340      * 2GB, so that it can be processed with 32-bit code if
 341      * necessary */
 342     spapr->fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
 343     spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE;
 344
 345     /* init CPUs */
 346     if (cpu_model == NULL) {
 347         cpu_model = "POWER7";
 348     }
 349     for (i = 0; i < smp_cpus; i++) {
 350         env = cpu_init(cpu_model);
 351
 352         if (!env) {
 353             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 354             exit(1);
 355         }
 356         /* Set time-base frequency to 512 MHz */
 357         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 358         qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
 359
 360         env->hreset_vector = 0x60;
 361         env->hreset_excp_prefix = 0;
 362         env->gpr[3] = env->cpu_index;
 363     }
 364
 365     /* allocate RAM */
 366     spapr->ram_limit = ram_size;
 367     memory_region_init_ram(ram, NULL, "ppc_spapr.ram", spapr->ram_limit);
 368     memory_region_add_subregion(sysmem, 0, ram);
 369
 370     /* allocate hash page table.  For now we always make this 16mb,
 371      * later we should probably make it scale to the size of guest
 372      * RAM */
 373     spapr->htab_size = 1ULL << (pteg_shift + 7);
 374     spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
 375
 376     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 377         env->external_htab = spapr->htab;
 378         env->htab_base = -1;
 379         env->htab_mask = spapr->htab_size - 1;
 380
 381         /* Tell KVM that we're in PAPR mode */
 382         env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 383                              ((pteg_shift + 7) - 18);
 384         env->spr[SPR_HIOR] = 0;
 385
 386         if (kvm_enabled()) {
 387             kvmppc_set_papr(env);
 388         }
 389     }
 390
 391     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 392     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 393                                            ram_size - spapr->rtas_addr);
 394     if (spapr->rtas_size < 0) {
 395         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 396         exit(1);
 397     }
 398     g_free(filename);
 399
 400     /* Set up Interrupt Controller */
 401     spapr->icp = xics_system_init(XICS_IRQS);
 402     spapr->next_irq = 16;
 403
 404     /* Set up VIO bus */
 405     spapr->vio_bus = spapr_vio_bus_init();
 406
 407     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 408         if (serial_hds[i]) {
 409             spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i,
 410                              serial_hds[i]);
 411         }
 412     }
 413
 414     for (i = 0; i < nb_nics; i++) {
 415         NICInfo *nd = &nd_table[i];
 416
 417         if (!nd->model) {
 418             nd->model = g_strdup("ibmveth");
 419         }
 420
 421         if (strcmp(nd->model, "ibmveth") == 0) {
 422             spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
 423         } else {
 424             fprintf(stderr, "pSeries (sPAPR) platform does not support "
 425                     "NIC model '%s' (only ibmveth is supported)\n",
 426                     nd->model);
 427             exit(1);
 428         }
 429     }
 430
 431     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 432         spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
 433     }
 434
 435     if (kernel_filename) {
 436         uint64_t lowaddr = 0;
 437
 438         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 439                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 440         if (kernel_size < 0) {
 441             kernel_size = load_image_targphys(kernel_filename,
 442                                               KERNEL_LOAD_ADDR,
 443                                               ram_size - KERNEL_LOAD_ADDR);
 444         }
 445         if (kernel_size < 0) {
 446             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 447                     kernel_filename);
 448             exit(1);
 449         }
 450
 451         /* load initrd */
 452         if (initrd_filename) {
 453             initrd_base = INITRD_LOAD_ADDR;
 454             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 455                                               ram_size - initrd_base);
 456             if (initrd_size < 0) {
 457                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 458                         initrd_filename);
 459                 exit(1);
 460             }
 461         } else {
 462             initrd_base = 0;
 463             initrd_size = 0;
 464         }
 465
 466         spapr->entry_point = KERNEL_LOAD_ADDR;
 467     } else {
 468         if (ram_size < (MIN_RAM_SLOF << 20)) {
 469             fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 470                     "%ldM guest RAM\n", MIN_RAM_SLOF);
 471             exit(1);
 472         }
 473         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 474         fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 475         if (fw_size < 0) {
 476             hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 477             exit(1);
 478         }
 479         g_free(filename);
 480         spapr->entry_point = 0x100;
 481         initrd_base = 0;
 482         initrd_size = 0;
 483
 484         /* SLOF will startup the secondary CPUs using RTAS,
 485            rather than expecting a kexec() style entry */
 486         for (env = first_cpu; env != NULL; env = env->next_cpu) {
 487             env->halted = 1;
 488         }
 489     }
 490
 491     /* Prepare the device tree */
 492     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
 493                                             initrd_base, initrd_size,
 494                                             boot_device, kernel_cmdline,
 495                                             pteg_shift + 7);
 496     assert(spapr->fdt_skel != NULL);
 497
 498     qemu_register_reset(spapr_reset, spapr);
 499 }
 500
 501 static QEMUMachine spapr_machine = {
 502     .name = "pseries",
 503     .desc = "pSeries Logical Partition (PAPR compliant)",
 504     .init = ppc_spapr_init,
 505     .max_cpus = MAX_CPUS,
 506     .no_vga = 1,
 507     .no_parallel = 1,
 508     .use_scsi = 1,
 509 };
 510
 511 static void spapr_machine_init(void)
 512 {
 513     qemu_register_machine(&spapr_machine);
 514 }
 515
 516 machine_init(spapr_machine_init);