tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "tcg.h"
  26 #include "exec/helper-proto.h"
  27 #include "exec/helper-gen.h"
  28
  29 /* Basic output routines.  Not for general consumption.  */
  30
  31 void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg);
  32 void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg);
  33 void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg);
  34 void tcg_gen_op4(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  35 void tcg_gen_op5(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  36                  TCGArg, TCGArg);
  37 void tcg_gen_op6(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  38                  TCGArg, TCGArg, TCGArg);
  39
  40
  41 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  42 {
  43     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I32(a1));
  44 }
  45
  46 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  47 {
  48     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I64(a1));
  49 }
  50
  51 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  52 {
  53     tcg_gen_op1(&tcg_ctx, opc, a1);
  54 }
  55
  56 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  57 {
  58     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2));
  59 }
  60
  61 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  62 {
  63     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2));
  64 }
  65
  66 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  67 {
  68     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), a2);
  69 }
  70
  71 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  72 {
  73     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), a2);
  74 }
  75
  76 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  77 {
  78     tcg_gen_op2(&tcg_ctx, opc, a1, a2);
  79 }
  80
  81 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  82                                    TCGv_i32 a2, TCGv_i32 a3)
  83 {
  84     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1),
  85                 GET_TCGV_I32(a2), GET_TCGV_I32(a3));
  86 }
  87
  88 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  89                                    TCGv_i64 a2, TCGv_i64 a3)
  90 {
  91     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1),
  92                 GET_TCGV_I64(a2), GET_TCGV_I64(a3));
  93 }
  94
  95 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  96                                     TCGv_i32 a2, TCGArg a3)
  97 {
  98     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3);
  99 }
 100
 101 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
 102                                     TCGv_i64 a2, TCGArg a3)
 103 {
 104     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3);
 105 }
 106
 107 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 108                                        TCGv_ptr base, TCGArg offset)
 109 {
 110     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset);
 111 }
 112
 113 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 114                                        TCGv_ptr base, TCGArg offset)
 115 {
 116     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset);
 117 }
 118
 119 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 120                                    TCGv_i32 a3, TCGv_i32 a4)
 121 {
 122     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 123                 GET_TCGV_I32(a3), GET_TCGV_I32(a4));
 124 }
 125
 126 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 127                                    TCGv_i64 a3, TCGv_i64 a4)
 128 {
 129     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 130                 GET_TCGV_I64(a3), GET_TCGV_I64(a4));
 131 }
 132
 133 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 134                                     TCGv_i32 a3, TCGArg a4)
 135 {
 136     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 137                 GET_TCGV_I32(a3), a4);
 138 }
 139
 140 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 141                                     TCGv_i64 a3, TCGArg a4)
 142 {
 143     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 144                 GET_TCGV_I64(a3), a4);
 145 }
 146
 147 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 148                                      TCGArg a3, TCGArg a4)
 149 {
 150     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4);
 151 }
 152
 153 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 154                                      TCGArg a3, TCGArg a4)
 155 {
 156     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4);
 157 }
 158
 159 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 160                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 161 {
 162     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 163                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5));
 164 }
 165
 166 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 167                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 168 {
 169     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 170                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5));
 171 }
 172
 173 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 174                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 175 {
 176     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 177                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5);
 178 }
 179
 180 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 181                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 182 {
 183     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 184                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5);
 185 }
 186
 187 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 188                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 189 {
 190     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 191                 GET_TCGV_I32(a3), a4, a5);
 192 }
 193
 194 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 195                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 196 {
 197     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 198                 GET_TCGV_I64(a3), a4, a5);
 199 }
 200
 201 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 202                                    TCGv_i32 a3, TCGv_i32 a4,
 203                                    TCGv_i32 a5, TCGv_i32 a6)
 204 {
 205     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 206                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5),
 207                 GET_TCGV_I32(a6));
 208 }
 209
 210 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 211                                    TCGv_i64 a3, TCGv_i64 a4,
 212                                    TCGv_i64 a5, TCGv_i64 a6)
 213 {
 214     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 215                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5),
 216                 GET_TCGV_I64(a6));
 217 }
 218
 219 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 220                                     TCGv_i32 a3, TCGv_i32 a4,
 221                                     TCGv_i32 a5, TCGArg a6)
 222 {
 223     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 224                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6);
 225 }
 226
 227 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 228                                     TCGv_i64 a3, TCGv_i64 a4,
 229                                     TCGv_i64 a5, TCGArg a6)
 230 {
 231     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 232                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6);
 233 }
 234
 235 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 236                                      TCGv_i32 a3, TCGv_i32 a4,
 237                                      TCGArg a5, TCGArg a6)
 238 {
 239     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 240                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6);
 241 }
 242
 243 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 244                                      TCGv_i64 a3, TCGv_i64 a4,
 245                                      TCGArg a5, TCGArg a6)
 246 {
 247     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 248                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6);
 249 }
 250
 251
 252 /* Generic ops.  */
 253
 254 static inline void gen_set_label(TCGLabel *l)
 255 {
 256     tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, label_arg(l));
 257 }
 258
 259 static inline void tcg_gen_br(TCGLabel *l)
 260 {
 261     tcg_gen_op1(&tcg_ctx, INDEX_op_br, label_arg(l));
 262 }
 263
 264 void tcg_gen_mb(TCGBar);
 265
 266 /* Helper calls. */
 267
 268 /* 32 bit ops */
 269
 270 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 271 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 272 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 273 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 274 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 275 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 276 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 277 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 278 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 279 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 280 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 281 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 282 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 283 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 284 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 287 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 288 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 289 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 290 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 291 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 292 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 293 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 294 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 295 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 296 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 297 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 298                          unsigned int ofs, unsigned int len);
 299 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
 300                            unsigned int ofs, unsigned int len);
 301 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
 302                          unsigned int ofs, unsigned int len);
 303 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
 304                           unsigned int ofs, unsigned int len);
 305 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
 306 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
 307 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 308                          TCGv_i32 arg1, TCGv_i32 arg2);
 309 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 310                           TCGv_i32 arg1, int32_t arg2);
 311 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 312                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 313 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 314                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 315 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 316                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 317 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 318 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 319 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 320 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 321 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 322 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 323 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 324 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 325 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 326
 327 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 328 {
 329     tcg_gen_op1_i32(INDEX_op_discard, arg);
 330 }
 331
 332 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 333 {
 334     if (!TCGV_EQUAL_I32(ret, arg)) {
 335         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 336     }
 337 }
 338
 339 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 340 {
 341     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 342 }
 343
 344 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 345                                     tcg_target_long offset)
 346 {
 347     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 348 }
 349
 350 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 351                                     tcg_target_long offset)
 352 {
 353     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 354 }
 355
 356 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 357                                      tcg_target_long offset)
 358 {
 359     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 360 }
 361
 362 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 363                                      tcg_target_long offset)
 364 {
 365     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 366 }
 367
 368 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 369                                   tcg_target_long offset)
 370 {
 371     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 372 }
 373
 374 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 375                                    tcg_target_long offset)
 376 {
 377     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 378 }
 379
 380 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 381                                     tcg_target_long offset)
 382 {
 383     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 384 }
 385
 386 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 387                                   tcg_target_long offset)
 388 {
 389     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 390 }
 391
 392 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 393 {
 394     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 395 }
 396
 397 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 398 {
 399     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 400 }
 401
 402 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 403 {
 404     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 405 }
 406
 407 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 408 {
 409     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 410 }
 411
 412 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 413 {
 414     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 415 }
 416
 417 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 418 {
 419     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 420 }
 421
 422 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 423 {
 424     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 425 }
 426
 427 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 428 {
 429     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 430 }
 431
 432 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 433 {
 434     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 435 }
 436
 437 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 438 {
 439     if (TCG_TARGET_HAS_neg_i32) {
 440         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 441     } else {
 442         tcg_gen_subfi_i32(ret, 0, arg);
 443     }
 444 }
 445
 446 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 447 {
 448     if (TCG_TARGET_HAS_not_i32) {
 449         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 450     } else {
 451         tcg_gen_xori_i32(ret, arg, -1);
 452     }
 453 }
 454
 455 /* 64 bit ops */
 456
 457 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 458 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 459 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 460 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 461 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 462 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 463 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 464 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 465 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 466 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 467 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 468 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 469 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 470 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 471 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 472 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 473 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 474 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 475 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 476 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 477 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 478 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 479 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 480 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 481 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 482 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 483 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 484 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 485                          unsigned int ofs, unsigned int len);
 486 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
 487                            unsigned int ofs, unsigned int len);
 488 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
 489                          unsigned int ofs, unsigned int len);
 490 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
 491                           unsigned int ofs, unsigned int len);
 492 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
 493 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
 494 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 495                          TCGv_i64 arg1, TCGv_i64 arg2);
 496 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 497                           TCGv_i64 arg1, int64_t arg2);
 498 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 499                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 500 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 501                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 502 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 503                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 504 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 505 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 506 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 507 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 508 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 509 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 510 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 511 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 512 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 513 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 514 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 515 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 516 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 517
 518 #if TCG_TARGET_REG_BITS == 64
 519 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 520 {
 521     tcg_gen_op1_i64(INDEX_op_discard, arg);
 522 }
 523
 524 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 525 {
 526     if (!TCGV_EQUAL_I64(ret, arg)) {
 527         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 528     }
 529 }
 530
 531 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 532 {
 533     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 534 }
 535
 536 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 537                                     tcg_target_long offset)
 538 {
 539     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 540 }
 541
 542 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 543                                     tcg_target_long offset)
 544 {
 545     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 546 }
 547
 548 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 549                                      tcg_target_long offset)
 550 {
 551     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 552 }
 553
 554 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 555                                      tcg_target_long offset)
 556 {
 557     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 558 }
 559
 560 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 561                                      tcg_target_long offset)
 562 {
 563     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 564 }
 565
 566 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 567                                      tcg_target_long offset)
 568 {
 569     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 570 }
 571
 572 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 573                                   tcg_target_long offset)
 574 {
 575     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 576 }
 577
 578 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 579                                    tcg_target_long offset)
 580 {
 581     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 582 }
 583
 584 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 585                                     tcg_target_long offset)
 586 {
 587     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 588 }
 589
 590 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 591                                     tcg_target_long offset)
 592 {
 593     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 594 }
 595
 596 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 597                                   tcg_target_long offset)
 598 {
 599     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 600 }
 601
 602 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 603 {
 604     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 605 }
 606
 607 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 608 {
 609     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 610 }
 611
 612 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 613 {
 614     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 615 }
 616
 617 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 618 {
 619     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 620 }
 621
 622 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 623 {
 624     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 625 }
 626
 627 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 628 {
 629     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 630 }
 631
 632 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 633 {
 634     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 635 }
 636
 637 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 638 {
 639     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 640 }
 641
 642 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 643 {
 644     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 645 }
 646 #else /* TCG_TARGET_REG_BITS == 32 */
 647 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 648                                    tcg_target_long offset)
 649 {
 650     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 651 }
 652
 653 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 654                                     tcg_target_long offset)
 655 {
 656     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 657 }
 658
 659 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 660                                     tcg_target_long offset)
 661 {
 662     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 663 }
 664
 665 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 666 {
 667     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 668                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 669 }
 670
 671 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 672 {
 673     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 674                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 675 }
 676
 677 void tcg_gen_discard_i64(TCGv_i64 arg);
 678 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 679 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 680 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 681 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 682 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 683 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 684 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 685 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 686 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 687 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 688 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 689 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 690 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 691 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 692 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 693 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 694 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 695 #endif /* TCG_TARGET_REG_BITS */
 696
 697 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 698 {
 699     if (TCG_TARGET_HAS_neg_i64) {
 700         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 701     } else {
 702         tcg_gen_subfi_i64(ret, 0, arg);
 703     }
 704 }
 705
 706 /* Size changing operations.  */
 707
 708 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 709 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 710 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 711 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 712 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 713 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 714 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 715
 716 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 717 {
 718     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 719 }
 720
 721 /* QEMU specific operations.  */
 722
 723 #ifndef TARGET_LONG_BITS
 724 #error must include QEMU headers
 725 #endif
 726
 727 #if TARGET_INSN_START_WORDS == 1
 728 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 729 static inline void tcg_gen_insn_start(target_ulong pc)
 730 {
 731     tcg_gen_op1(&tcg_ctx, INDEX_op_insn_start, pc);
 732 }
 733 # else
 734 static inline void tcg_gen_insn_start(target_ulong pc)
 735 {
 736     tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start,
 737                 (uint32_t)pc, (uint32_t)(pc >> 32));
 738 }
 739 # endif
 740 #elif TARGET_INSN_START_WORDS == 2
 741 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 742 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 743 {
 744     tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, pc, a1);
 745 }
 746 # else
 747 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 748 {
 749     tcg_gen_op4(&tcg_ctx, INDEX_op_insn_start,
 750                 (uint32_t)pc, (uint32_t)(pc >> 32),
 751                 (uint32_t)a1, (uint32_t)(a1 >> 32));
 752 }
 753 # endif
 754 #elif TARGET_INSN_START_WORDS == 3
 755 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 756 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 757                                       target_ulong a2)
 758 {
 759     tcg_gen_op3(&tcg_ctx, INDEX_op_insn_start, pc, a1, a2);
 760 }
 761 # else
 762 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 763                                       target_ulong a2)
 764 {
 765     tcg_gen_op6(&tcg_ctx, INDEX_op_insn_start,
 766                 (uint32_t)pc, (uint32_t)(pc >> 32),
 767                 (uint32_t)a1, (uint32_t)(a1 >> 32),
 768                 (uint32_t)a2, (uint32_t)(a2 >> 32));
 769 }
 770 # endif
 771 #else
 772 # error "Unhandled number of operands to insn_start"
 773 #endif
 774
 775 static inline void tcg_gen_exit_tb(uintptr_t val)
 776 {
 777     tcg_gen_op1i(INDEX_op_exit_tb, val);
 778 }
 779
 780 /**
 781  * tcg_gen_goto_tb() - output goto_tb TCG operation
 782  * @idx: Direct jump slot index (0 or 1)
 783  *
 784  * See tcg/README for more info about this TCG operation.
 785  *
 786  * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
 787  * the pages this TB resides in because we don't take care of direct jumps when
 788  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
 789  * static address translation, so the destination address is always valid, TBs
 790  * are always invalidated properly, and direct jumps are reset when mapping
 791  * changes.
 792  */
 793 void tcg_gen_goto_tb(unsigned idx);
 794
 795 #if TARGET_LONG_BITS == 32
 796 #define tcg_temp_new() tcg_temp_new_i32()
 797 #define tcg_global_reg_new tcg_global_reg_new_i32
 798 #define tcg_global_mem_new tcg_global_mem_new_i32
 799 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 800 #define tcg_temp_free tcg_temp_free_i32
 801 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
 802 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I32(x)
 803 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
 804 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 805 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 806 #else
 807 #define tcg_temp_new() tcg_temp_new_i64()
 808 #define tcg_global_reg_new tcg_global_reg_new_i64
 809 #define tcg_global_mem_new tcg_global_mem_new_i64
 810 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 811 #define tcg_temp_free tcg_temp_free_i64
 812 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
 813 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I64(x)
 814 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
 815 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 816 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 817 #endif
 818
 819 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 820 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 821 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 822 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 823
 824 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 825 {
 826     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 827 }
 828
 829 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 830 {
 831     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 832 }
 833
 834 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 835 {
 836     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 837 }
 838
 839 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 840 {
 841     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 842 }
 843
 844 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 845 {
 846     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 847 }
 848
 849 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 850 {
 851     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 852 }
 853
 854 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 855 {
 856     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 857 }
 858
 859 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 860 {
 861     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 862 }
 863
 864 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 865 {
 866     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 867 }
 868
 869 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 870 {
 871     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 872 }
 873
 874 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 875 {
 876     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 877 }
 878
 879 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
 880                                 TCGArg, TCGMemOp);
 881 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
 882                                 TCGArg, TCGMemOp);
 883
 884 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 885 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 886 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 887 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 888 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 889 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 890 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 891 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 892 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 893 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 894 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 895 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 896 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 897 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 898 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 899 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 900 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 901 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 902
 903 #if TARGET_LONG_BITS == 64
 904 #define tcg_gen_movi_tl tcg_gen_movi_i64
 905 #define tcg_gen_mov_tl tcg_gen_mov_i64
 906 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 907 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 908 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 909 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 910 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 911 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
 912 #define tcg_gen_ld_tl tcg_gen_ld_i64
 913 #define tcg_gen_st8_tl tcg_gen_st8_i64
 914 #define tcg_gen_st16_tl tcg_gen_st16_i64
 915 #define tcg_gen_st32_tl tcg_gen_st32_i64
 916 #define tcg_gen_st_tl tcg_gen_st_i64
 917 #define tcg_gen_add_tl tcg_gen_add_i64
 918 #define tcg_gen_addi_tl tcg_gen_addi_i64
 919 #define tcg_gen_sub_tl tcg_gen_sub_i64
 920 #define tcg_gen_neg_tl tcg_gen_neg_i64
 921 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
 922 #define tcg_gen_subi_tl tcg_gen_subi_i64
 923 #define tcg_gen_and_tl tcg_gen_and_i64
 924 #define tcg_gen_andi_tl tcg_gen_andi_i64
 925 #define tcg_gen_or_tl tcg_gen_or_i64
 926 #define tcg_gen_ori_tl tcg_gen_ori_i64
 927 #define tcg_gen_xor_tl tcg_gen_xor_i64
 928 #define tcg_gen_xori_tl tcg_gen_xori_i64
 929 #define tcg_gen_not_tl tcg_gen_not_i64
 930 #define tcg_gen_shl_tl tcg_gen_shl_i64
 931 #define tcg_gen_shli_tl tcg_gen_shli_i64
 932 #define tcg_gen_shr_tl tcg_gen_shr_i64
 933 #define tcg_gen_shri_tl tcg_gen_shri_i64
 934 #define tcg_gen_sar_tl tcg_gen_sar_i64
 935 #define tcg_gen_sari_tl tcg_gen_sari_i64
 936 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
 937 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
 938 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
 939 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
 940 #define tcg_gen_mul_tl tcg_gen_mul_i64
 941 #define tcg_gen_muli_tl tcg_gen_muli_i64
 942 #define tcg_gen_div_tl tcg_gen_div_i64
 943 #define tcg_gen_rem_tl tcg_gen_rem_i64
 944 #define tcg_gen_divu_tl tcg_gen_divu_i64
 945 #define tcg_gen_remu_tl tcg_gen_remu_i64
 946 #define tcg_gen_discard_tl tcg_gen_discard_i64
 947 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
 948 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
 949 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
 950 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
 951 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
 952 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
 953 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
 954 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
 955 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
 956 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
 957 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
 958 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
 959 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
 960 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
 961 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
 962 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
 963 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
 964 #define tcg_gen_andc_tl tcg_gen_andc_i64
 965 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
 966 #define tcg_gen_nand_tl tcg_gen_nand_i64
 967 #define tcg_gen_nor_tl tcg_gen_nor_i64
 968 #define tcg_gen_orc_tl tcg_gen_orc_i64
 969 #define tcg_gen_clz_tl tcg_gen_clz_i64
 970 #define tcg_gen_ctz_tl tcg_gen_ctz_i64
 971 #define tcg_gen_clzi_tl tcg_gen_clzi_i64
 972 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
 973 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
 974 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
 975 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
 976 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
 977 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
 978 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
 979 #define tcg_gen_extract_tl tcg_gen_extract_i64
 980 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
 981 #define tcg_const_tl tcg_const_i64
 982 #define tcg_const_local_tl tcg_const_local_i64
 983 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
 984 #define tcg_gen_add2_tl tcg_gen_add2_i64
 985 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
 986 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
 987 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
 988 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
 989 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
 990 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
 991 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
 992 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
 993 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
 994 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
 995 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
 996 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
 997 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
 998 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
 999 #else
1000 #define tcg_gen_movi_tl tcg_gen_movi_i32
1001 #define tcg_gen_mov_tl tcg_gen_mov_i32
1002 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1003 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1004 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1005 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1006 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1007 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1008 #define tcg_gen_ld_tl tcg_gen_ld_i32
1009 #define tcg_gen_st8_tl tcg_gen_st8_i32
1010 #define tcg_gen_st16_tl tcg_gen_st16_i32
1011 #define tcg_gen_st32_tl tcg_gen_st_i32
1012 #define tcg_gen_st_tl tcg_gen_st_i32
1013 #define tcg_gen_add_tl tcg_gen_add_i32
1014 #define tcg_gen_addi_tl tcg_gen_addi_i32
1015 #define tcg_gen_sub_tl tcg_gen_sub_i32
1016 #define tcg_gen_neg_tl tcg_gen_neg_i32
1017 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1018 #define tcg_gen_subi_tl tcg_gen_subi_i32
1019 #define tcg_gen_and_tl tcg_gen_and_i32
1020 #define tcg_gen_andi_tl tcg_gen_andi_i32
1021 #define tcg_gen_or_tl tcg_gen_or_i32
1022 #define tcg_gen_ori_tl tcg_gen_ori_i32
1023 #define tcg_gen_xor_tl tcg_gen_xor_i32
1024 #define tcg_gen_xori_tl tcg_gen_xori_i32
1025 #define tcg_gen_not_tl tcg_gen_not_i32
1026 #define tcg_gen_shl_tl tcg_gen_shl_i32
1027 #define tcg_gen_shli_tl tcg_gen_shli_i32
1028 #define tcg_gen_shr_tl tcg_gen_shr_i32
1029 #define tcg_gen_shri_tl tcg_gen_shri_i32
1030 #define tcg_gen_sar_tl tcg_gen_sar_i32
1031 #define tcg_gen_sari_tl tcg_gen_sari_i32
1032 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1033 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1034 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1035 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1036 #define tcg_gen_mul_tl tcg_gen_mul_i32
1037 #define tcg_gen_muli_tl tcg_gen_muli_i32
1038 #define tcg_gen_div_tl tcg_gen_div_i32
1039 #define tcg_gen_rem_tl tcg_gen_rem_i32
1040 #define tcg_gen_divu_tl tcg_gen_divu_i32
1041 #define tcg_gen_remu_tl tcg_gen_remu_i32
1042 #define tcg_gen_discard_tl tcg_gen_discard_i32
1043 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1044 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1045 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1046 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1047 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1048 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1049 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1050 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1051 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1052 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1053 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1054 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1055 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1056 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1057 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1058 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1059 #define tcg_gen_andc_tl tcg_gen_andc_i32
1060 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1061 #define tcg_gen_nand_tl tcg_gen_nand_i32
1062 #define tcg_gen_nor_tl tcg_gen_nor_i32
1063 #define tcg_gen_orc_tl tcg_gen_orc_i32
1064 #define tcg_gen_clz_tl tcg_gen_clz_i32
1065 #define tcg_gen_ctz_tl tcg_gen_ctz_i32
1066 #define tcg_gen_clzi_tl tcg_gen_clzi_i32
1067 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1068 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1069 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1070 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1071 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1072 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1073 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1074 #define tcg_gen_extract_tl tcg_gen_extract_i32
1075 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
1076 #define tcg_const_tl tcg_const_i32
1077 #define tcg_const_local_tl tcg_const_local_i32
1078 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1079 #define tcg_gen_add2_tl tcg_gen_add2_i32
1080 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1081 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1082 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1083 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1084 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1085 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1086 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1087 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1088 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1089 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1090 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1091 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1092 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1093 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1094 #endif
1095
1096 #if UINTPTR_MAX == UINT32_MAX
1097 # define tcg_gen_ld_ptr(R, A, O) \
1098     tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
1099 # define tcg_gen_discard_ptr(A) \
1100     tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
1101 # define tcg_gen_add_ptr(R, A, B) \
1102     tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1103 # define tcg_gen_addi_ptr(R, A, B) \
1104     tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1105 # define tcg_gen_ext_i32_ptr(R, A) \
1106     tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
1107 #else
1108 # define tcg_gen_ld_ptr(R, A, O) \
1109     tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
1110 # define tcg_gen_discard_ptr(A) \
1111     tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
1112 # define tcg_gen_add_ptr(R, A, B) \
1113     tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1114 # define tcg_gen_addi_ptr(R, A, B) \
1115     tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1116 # define tcg_gen_ext_i32_ptr(R, A) \
1117     tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
1118 #endif /* UINTPTR_MAX == UINT32_MAX */