m68k: fix usp processing on interrupt entry and exception exit
[qemu.git] / target-m68k / op_helper.c
blob1af0ca647b81ef5b18060760dcfd27ef067fb0d4
1 /*
2 * M68K helper routines
4 * Copyright (c) 2007 CodeSourcery
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "cpu.h"
20 #include "exec/helper-proto.h"
21 #include "exec/cpu_ldst.h"
22 #include "exec/semihost.h"
24 #if defined(CONFIG_USER_ONLY)
26 void m68k_cpu_do_interrupt(CPUState *cs)
28 cs->exception_index = -1;
31 static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
35 #else
37 /* Try to fill the TLB and return an exception if error. If retaddr is
38 NULL, it means that the function was called in C code (i.e. not
39 from generated code or from helper.c) */
40 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
41 uintptr_t retaddr)
43 int ret;
45 ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
46 if (unlikely(ret)) {
47 if (retaddr) {
48 /* now we have a real cpu fault */
49 cpu_restore_state(cs, retaddr);
51 cpu_loop_exit(cs);
55 static void do_rte(CPUM68KState *env)
57 uint32_t sp;
58 uint32_t fmt;
60 sp = env->aregs[7];
61 fmt = cpu_ldl_kernel(env, sp);
62 env->pc = cpu_ldl_kernel(env, sp + 4);
63 sp |= (fmt >> 28) & 3;
64 env->sr = fmt & 0xffff;
65 env->aregs[7] = sp + 8;
66 m68k_switch_sp(env);
69 static void do_interrupt_all(CPUM68KState *env, int is_hw)
71 CPUState *cs = CPU(m68k_env_get_cpu(env));
72 uint32_t sp;
73 uint32_t fmt;
74 uint32_t retaddr;
75 uint32_t vector;
77 fmt = 0;
78 retaddr = env->pc;
80 if (!is_hw) {
81 switch (cs->exception_index) {
82 case EXCP_RTE:
83 /* Return from an exception. */
84 do_rte(env);
85 return;
86 case EXCP_HALT_INSN:
87 if (semihosting_enabled()
88 && (env->sr & SR_S) != 0
89 && (env->pc & 3) == 0
90 && cpu_lduw_code(env, env->pc - 4) == 0x4e71
91 && cpu_ldl_code(env, env->pc) == 0x4e7bf000) {
92 env->pc += 4;
93 do_m68k_semihosting(env, env->dregs[0]);
94 return;
96 cs->halted = 1;
97 cs->exception_index = EXCP_HLT;
98 cpu_loop_exit(cs);
99 return;
101 if (cs->exception_index >= EXCP_TRAP0
102 && cs->exception_index <= EXCP_TRAP15) {
103 /* Move the PC after the trap instruction. */
104 retaddr += 2;
108 vector = cs->exception_index << 2;
110 fmt |= 0x40000000;
111 fmt |= vector << 16;
112 fmt |= env->sr;
114 env->sr |= SR_S;
115 if (is_hw) {
116 env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
117 env->sr &= ~SR_M;
119 m68k_switch_sp(env);
120 sp = env->aregs[7];
121 fmt |= (sp & 3) << 28;
123 /* ??? This could cause MMU faults. */
124 sp &= ~3;
125 sp -= 4;
126 cpu_stl_kernel(env, sp, retaddr);
127 sp -= 4;
128 cpu_stl_kernel(env, sp, fmt);
129 env->aregs[7] = sp;
130 /* Jump to vector. */
131 env->pc = cpu_ldl_kernel(env, env->vbr + vector);
134 void m68k_cpu_do_interrupt(CPUState *cs)
136 M68kCPU *cpu = M68K_CPU(cs);
137 CPUM68KState *env = &cpu->env;
139 do_interrupt_all(env, 0);
142 static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
144 do_interrupt_all(env, 1);
146 #endif
148 bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
150 M68kCPU *cpu = M68K_CPU(cs);
151 CPUM68KState *env = &cpu->env;
153 if (interrupt_request & CPU_INTERRUPT_HARD
154 && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
155 /* Real hardware gets the interrupt vector via an IACK cycle
156 at this point. Current emulated hardware doesn't rely on
157 this, so we provide/save the vector when the interrupt is
158 first signalled. */
159 cs->exception_index = env->pending_vector;
160 do_interrupt_m68k_hardirq(env);
161 return true;
163 return false;
166 static void raise_exception(CPUM68KState *env, int tt)
168 CPUState *cs = CPU(m68k_env_get_cpu(env));
170 cs->exception_index = tt;
171 cpu_loop_exit(cs);
174 void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
176 raise_exception(env, tt);
179 void HELPER(divu)(CPUM68KState *env, uint32_t word)
181 uint32_t num;
182 uint32_t den;
183 uint32_t quot;
184 uint32_t rem;
185 uint32_t flags;
187 num = env->div1;
188 den = env->div2;
189 /* ??? This needs to make sure the throwing location is accurate. */
190 if (den == 0) {
191 raise_exception(env, EXCP_DIV0);
193 quot = num / den;
194 rem = num % den;
195 flags = 0;
196 if (word && quot > 0xffff)
197 flags |= CCF_V;
198 if (quot == 0)
199 flags |= CCF_Z;
200 else if ((int32_t)quot < 0)
201 flags |= CCF_N;
202 env->div1 = quot;
203 env->div2 = rem;
204 env->cc_dest = flags;
207 void HELPER(divs)(CPUM68KState *env, uint32_t word)
209 int32_t num;
210 int32_t den;
211 int32_t quot;
212 int32_t rem;
213 int32_t flags;
215 num = env->div1;
216 den = env->div2;
217 if (den == 0) {
218 raise_exception(env, EXCP_DIV0);
220 quot = num / den;
221 rem = num % den;
222 flags = 0;
223 if (word && quot != (int16_t)quot)
224 flags |= CCF_V;
225 if (quot == 0)
226 flags |= CCF_Z;
227 else if (quot < 0)
228 flags |= CCF_N;
229 env->div1 = quot;
230 env->div2 = rem;
231 env->cc_dest = flags;