2 * S/390 condition code helper routines
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 /* #define DEBUG_HELPER */
26 #define HELPER_LOG(x...) qemu_log(x)
28 #define HELPER_LOG(x...)
31 static inline uint32_t cc_calc_ltgt_32(CPUS390XState
*env
, int32_t src
,
36 } else if (src
< dst
) {
43 static inline uint32_t cc_calc_ltgt0_32(CPUS390XState
*env
, int32_t dst
)
45 return cc_calc_ltgt_32(env
, dst
, 0);
48 static inline uint32_t cc_calc_ltgt_64(CPUS390XState
*env
, int64_t src
,
53 } else if (src
< dst
) {
60 static inline uint32_t cc_calc_ltgt0_64(CPUS390XState
*env
, int64_t dst
)
62 return cc_calc_ltgt_64(env
, dst
, 0);
65 static inline uint32_t cc_calc_ltugtu_32(CPUS390XState
*env
, uint32_t src
,
70 } else if (src
< dst
) {
77 static inline uint32_t cc_calc_ltugtu_64(CPUS390XState
*env
, uint64_t src
,
82 } else if (src
< dst
) {
89 static inline uint32_t cc_calc_tm_32(CPUS390XState
*env
, uint32_t val
,
92 uint16_t r
= val
& mask
;
94 HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__
, val
, mask
);
95 if (r
== 0 || mask
== 0) {
97 } else if (r
== mask
) {
104 /* set condition code for test under mask */
105 static inline uint32_t cc_calc_tm_64(CPUS390XState
*env
, uint64_t val
,
108 uint16_t r
= val
& mask
;
110 HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__
, val
, mask
, r
);
111 if (r
== 0 || mask
== 0) {
113 } else if (r
== mask
) {
116 while (!(mask
& 0x8000)) {
128 static inline uint32_t cc_calc_nz(CPUS390XState
*env
, uint64_t dst
)
133 static inline uint32_t cc_calc_add_64(CPUS390XState
*env
, int64_t a1
,
134 int64_t a2
, int64_t ar
)
136 if ((a1
> 0 && a2
> 0 && ar
< 0) || (a1
< 0 && a2
< 0 && ar
> 0)) {
137 return 3; /* overflow */
149 static inline uint32_t cc_calc_addu_64(CPUS390XState
*env
, uint64_t a1
,
150 uint64_t a2
, uint64_t ar
)
159 if (ar
< a1
|| ar
< a2
) {
167 static inline uint32_t cc_calc_sub_64(CPUS390XState
*env
, int64_t a1
,
168 int64_t a2
, int64_t ar
)
170 if ((a1
> 0 && a2
< 0 && ar
< 0) || (a1
< 0 && a2
> 0 && ar
> 0)) {
171 return 3; /* overflow */
183 static inline uint32_t cc_calc_subu_64(CPUS390XState
*env
, uint64_t a1
,
184 uint64_t a2
, uint64_t ar
)
197 static inline uint32_t cc_calc_abs_64(CPUS390XState
*env
, int64_t dst
)
199 if ((uint64_t)dst
== 0x8000000000000000ULL
) {
208 static inline uint32_t cc_calc_nabs_64(CPUS390XState
*env
, int64_t dst
)
213 static inline uint32_t cc_calc_comp_64(CPUS390XState
*env
, int64_t dst
)
215 if ((uint64_t)dst
== 0x8000000000000000ULL
) {
217 } else if (dst
< 0) {
219 } else if (dst
> 0) {
227 static inline uint32_t cc_calc_add_32(CPUS390XState
*env
, int32_t a1
,
228 int32_t a2
, int32_t ar
)
230 if ((a1
> 0 && a2
> 0 && ar
< 0) || (a1
< 0 && a2
< 0 && ar
> 0)) {
231 return 3; /* overflow */
243 static inline uint32_t cc_calc_addu_32(CPUS390XState
*env
, uint32_t a1
,
244 uint32_t a2
, uint32_t ar
)
253 if (ar
< a1
|| ar
< a2
) {
261 static inline uint32_t cc_calc_sub_32(CPUS390XState
*env
, int32_t a1
,
262 int32_t a2
, int32_t ar
)
264 if ((a1
> 0 && a2
< 0 && ar
< 0) || (a1
< 0 && a2
> 0 && ar
> 0)) {
265 return 3; /* overflow */
277 static inline uint32_t cc_calc_subu_32(CPUS390XState
*env
, uint32_t a1
,
278 uint32_t a2
, uint32_t ar
)
291 static inline uint32_t cc_calc_abs_32(CPUS390XState
*env
, int32_t dst
)
293 if ((uint32_t)dst
== 0x80000000UL
) {
302 static inline uint32_t cc_calc_nabs_32(CPUS390XState
*env
, int32_t dst
)
307 static inline uint32_t cc_calc_comp_32(CPUS390XState
*env
, int32_t dst
)
309 if ((uint32_t)dst
== 0x80000000UL
) {
311 } else if (dst
< 0) {
313 } else if (dst
> 0) {
320 /* calculate condition code for insert character under mask insn */
321 static inline uint32_t cc_calc_icm_32(CPUS390XState
*env
, uint32_t mask
,
326 HELPER_LOG("%s: mask 0x%x val %d\n", __func__
, mask
, val
);
330 } else if (val
& 0x80000000) {
353 static inline uint32_t cc_calc_slag(CPUS390XState
*env
, uint64_t src
,
356 uint64_t mask
= ((1ULL << shift
) - 1ULL) << (64 - shift
);
359 /* check if the sign bit stays the same */
360 if (src
& (1ULL << 63)) {
366 if ((src
& mask
) != match
) {
371 r
= ((src
<< shift
) & ((1ULL << 63) - 1)) | (src
& (1ULL << 63));
373 if ((int64_t)r
== 0) {
375 } else if ((int64_t)r
< 0) {
383 static inline uint32_t do_calc_cc(CPUS390XState
*env
, uint32_t cc_op
,
384 uint64_t src
, uint64_t dst
, uint64_t vr
)
393 /* cc_op value _is_ cc */
397 r
= cc_calc_ltgt0_32(env
, dst
);
400 r
= cc_calc_ltgt0_64(env
, dst
);
403 r
= cc_calc_ltgt_32(env
, src
, dst
);
406 r
= cc_calc_ltgt_64(env
, src
, dst
);
408 case CC_OP_LTUGTU_32
:
409 r
= cc_calc_ltugtu_32(env
, src
, dst
);
411 case CC_OP_LTUGTU_64
:
412 r
= cc_calc_ltugtu_64(env
, src
, dst
);
415 r
= cc_calc_tm_32(env
, src
, dst
);
418 r
= cc_calc_tm_64(env
, src
, dst
);
421 r
= cc_calc_nz(env
, dst
);
424 r
= cc_calc_add_64(env
, src
, dst
, vr
);
427 r
= cc_calc_addu_64(env
, src
, dst
, vr
);
430 r
= cc_calc_sub_64(env
, src
, dst
, vr
);
433 r
= cc_calc_subu_64(env
, src
, dst
, vr
);
436 r
= cc_calc_abs_64(env
, dst
);
439 r
= cc_calc_nabs_64(env
, dst
);
442 r
= cc_calc_comp_64(env
, dst
);
446 r
= cc_calc_add_32(env
, src
, dst
, vr
);
449 r
= cc_calc_addu_32(env
, src
, dst
, vr
);
452 r
= cc_calc_sub_32(env
, src
, dst
, vr
);
455 r
= cc_calc_subu_32(env
, src
, dst
, vr
);
458 r
= cc_calc_abs_64(env
, dst
);
461 r
= cc_calc_nabs_64(env
, dst
);
464 r
= cc_calc_comp_32(env
, dst
);
468 r
= cc_calc_icm_32(env
, src
, dst
);
471 r
= cc_calc_slag(env
, src
, dst
);
475 r
= set_cc_f32(env
, src
, dst
);
478 r
= set_cc_f64(env
, src
, dst
);
481 r
= set_cc_nz_f32(dst
);
484 r
= set_cc_nz_f64(dst
);
488 cpu_abort(env
, "Unknown CC operation: %s\n", cc_name(cc_op
));
491 HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__
,
492 cc_name(cc_op
), src
, dst
, vr
, r
);
496 uint32_t calc_cc(CPUS390XState
*env
, uint32_t cc_op
, uint64_t src
, uint64_t dst
,
499 return do_calc_cc(env
, cc_op
, src
, dst
, vr
);
502 uint32_t HELPER(calc_cc
)(CPUS390XState
*env
, uint32_t cc_op
, uint64_t src
,
503 uint64_t dst
, uint64_t vr
)
505 return do_calc_cc(env
, cc_op
, src
, dst
, vr
);
508 /* insert psw mask and condition code into r1 */
509 void HELPER(ipm
)(CPUS390XState
*env
, uint32_t cc
, uint32_t r1
)
511 uint64_t r
= env
->regs
[r1
];
513 r
&= 0xffffffff00ffffffULL
;
514 r
|= (cc
<< 28) | ((env
->psw
.mask
>> 40) & 0xf);
516 HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__
,
517 cc
, env
->psw
.mask
, r
);
520 #ifndef CONFIG_USER_ONLY
521 void HELPER(load_psw
)(CPUS390XState
*env
, uint64_t mask
, uint64_t addr
)
523 load_psw(env
, mask
, addr
);
527 void HELPER(sacf
)(CPUS390XState
*env
, uint64_t a1
)
529 HELPER_LOG("%s: %16" PRIx64
"\n", __func__
, a1
);
531 switch (a1
& 0xf00) {
533 env
->psw
.mask
&= ~PSW_MASK_ASC
;
534 env
->psw
.mask
|= PSW_ASC_PRIMARY
;
537 env
->psw
.mask
&= ~PSW_MASK_ASC
;
538 env
->psw
.mask
|= PSW_ASC_SECONDARY
;
541 env
->psw
.mask
&= ~PSW_MASK_ASC
;
542 env
->psw
.mask
|= PSW_ASC_HOME
;
545 qemu_log("unknown sacf mode: %" PRIx64
"\n", a1
);
546 program_interrupt(env
, PGM_SPECIFICATION
, 2);