target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "exec-all.h"
   7
   8 static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
   9 {
  10     qemu_put_be32(f, dt->selector);
  11     qemu_put_betl(f, dt->base);
  12     qemu_put_be32(f, dt->limit);
  13     qemu_put_be32(f, dt->flags);
  14 }
  15
  16 static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
  17 {
  18     dt->selector = qemu_get_be32(f);
  19     dt->base = qemu_get_betl(f);
  20     dt->limit = qemu_get_be32(f);
  21     dt->flags = qemu_get_be32(f);
  22 }
  23
  24 void cpu_save(QEMUFile *f, void *opaque)
  25 {
  26     CPUState *env = opaque;
  27     uint16_t fptag, fpus, fpuc, fpregs_format;
  28     uint32_t hflags;
  29     int32_t a20_mask;
  30     int i;
  31
  32     for(i = 0; i < CPU_NB_REGS; i++)
  33         qemu_put_betls(f, &env->regs[i]);
  34     qemu_put_betls(f, &env->eip);
  35     qemu_put_betls(f, &env->eflags);
  36     hflags = env->hflags; /* XXX: suppress most of the redundant hflags */
  37     qemu_put_be32s(f, &hflags);
  38
  39     /* FPU */
  40     fpuc = env->fpuc;
  41     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
  42     fptag = 0;
  43     for(i = 0; i < 8; i++) {
  44         fptag |= ((!env->fptags[i]) << i);
  45     }
  46
  47     qemu_put_be16s(f, &fpuc);
  48     qemu_put_be16s(f, &fpus);
  49     qemu_put_be16s(f, &fptag);
  50
  51 #ifdef USE_X86LDOUBLE
  52     fpregs_format = 0;
  53 #else
  54     fpregs_format = 1;
  55 #endif
  56     qemu_put_be16s(f, &fpregs_format);
  57
  58     for(i = 0; i < 8; i++) {
  59 #ifdef USE_X86LDOUBLE
  60         {
  61             uint64_t mant;
  62             uint16_t exp;
  63             /* we save the real CPU data (in case of MMX usage only 'mant'
  64                contains the MMX register */
  65             cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
  66             qemu_put_be64(f, mant);
  67             qemu_put_be16(f, exp);
  68         }
  69 #else
  70         /* if we use doubles for float emulation, we save the doubles to
  71            avoid losing information in case of MMX usage. It can give
  72            problems if the image is restored on a CPU where long
  73            doubles are used instead. */
  74         qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
  75 #endif
  76     }
  77
  78     for(i = 0; i < 6; i++)
  79         cpu_put_seg(f, &env->segs[i]);
  80     cpu_put_seg(f, &env->ldt);
  81     cpu_put_seg(f, &env->tr);
  82     cpu_put_seg(f, &env->gdt);
  83     cpu_put_seg(f, &env->idt);
  84
  85     qemu_put_be32s(f, &env->sysenter_cs);
  86     qemu_put_betls(f, &env->sysenter_esp);
  87     qemu_put_betls(f, &env->sysenter_eip);
  88
  89     qemu_put_betls(f, &env->cr[0]);
  90     qemu_put_betls(f, &env->cr[2]);
  91     qemu_put_betls(f, &env->cr[3]);
  92     qemu_put_betls(f, &env->cr[4]);
  93
  94     for(i = 0; i < 8; i++)
  95         qemu_put_betls(f, &env->dr[i]);
  96
  97     /* MMU */
  98     a20_mask = (int32_t) env->a20_mask;
  99     qemu_put_sbe32s(f, &a20_mask);
 100
 101     /* XMM */
 102     qemu_put_be32s(f, &env->mxcsr);
 103     for(i = 0; i < CPU_NB_REGS; i++) {
 104         qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0));
 105         qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1));
 106     }
 107
 108 #ifdef TARGET_X86_64
 109     qemu_put_be64s(f, &env->efer);
 110     qemu_put_be64s(f, &env->star);
 111     qemu_put_be64s(f, &env->lstar);
 112     qemu_put_be64s(f, &env->cstar);
 113     qemu_put_be64s(f, &env->fmask);
 114     qemu_put_be64s(f, &env->kernelgsbase);
 115 #endif
 116     qemu_put_be32s(f, &env->smbase);
 117
 118     qemu_put_be64s(f, &env->pat);
 119     qemu_put_be32s(f, &env->hflags2);
 120
 121     qemu_put_be64s(f, &env->vm_hsave);
 122     qemu_put_be64s(f, &env->vm_vmcb);
 123     qemu_put_be64s(f, &env->tsc_offset);
 124     qemu_put_be64s(f, &env->intercept);
 125     qemu_put_be16s(f, &env->intercept_cr_read);
 126     qemu_put_be16s(f, &env->intercept_cr_write);
 127     qemu_put_be16s(f, &env->intercept_dr_read);
 128     qemu_put_be16s(f, &env->intercept_dr_write);
 129     qemu_put_be32s(f, &env->intercept_exceptions);
 130     qemu_put_8s(f, &env->v_tpr);
 131
 132     /* MTRRs */
 133     for(i = 0; i < 11; i++)
 134         qemu_put_be64s(f, &env->mtrr_fixed[i]);
 135     qemu_put_be64s(f, &env->mtrr_deftype);
 136     for(i = 0; i < 8; i++) {
 137         qemu_put_be64s(f, &env->mtrr_var[i].base);
 138         qemu_put_be64s(f, &env->mtrr_var[i].mask);
 139     }
 140 }
 141
 142 #ifdef USE_X86LDOUBLE
 143 /* XXX: add that in a FPU generic layer */
 144 union x86_longdouble {
 145     uint64_t mant;
 146     uint16_t exp;
 147 };
 148
 149 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
 150 #define EXPBIAS1 1023
 151 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
 152 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
 153
 154 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
 155 {
 156     int e;
 157     /* mantissa */
 158     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
 159     /* exponent + sign */
 160     e = EXPD1(temp) - EXPBIAS1 + 16383;
 161     e |= SIGND1(temp) >> 16;
 162     p->exp = e;
 163 }
 164 #endif
 165
 166 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 167 {
 168     CPUState *env = opaque;
 169     int i, guess_mmx;
 170     uint32_t hflags;
 171     uint16_t fpus, fpuc, fptag, fpregs_format;
 172     int32_t a20_mask;
 173
 174     if (version_id != 3 && version_id != 4 && version_id != 5
 175         && version_id != 6 && version_id != 7 && version_id != 8)
 176         return -EINVAL;
 177     for(i = 0; i < CPU_NB_REGS; i++)
 178         qemu_get_betls(f, &env->regs[i]);
 179     qemu_get_betls(f, &env->eip);
 180     qemu_get_betls(f, &env->eflags);
 181     qemu_get_be32s(f, &hflags);
 182
 183     qemu_get_be16s(f, &fpuc);
 184     qemu_get_be16s(f, &fpus);
 185     qemu_get_be16s(f, &fptag);
 186     qemu_get_be16s(f, &fpregs_format);
 187
 188     /* NOTE: we cannot always restore the FPU state if the image come
 189        from a host with a different 'USE_X86LDOUBLE' define. We guess
 190        if we are in an MMX state to restore correctly in that case. */
 191     guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0);
 192     for(i = 0; i < 8; i++) {
 193         uint64_t mant;
 194         uint16_t exp;
 195
 196         switch(fpregs_format) {
 197         case 0:
 198             mant = qemu_get_be64(f);
 199             exp = qemu_get_be16(f);
 200 #ifdef USE_X86LDOUBLE
 201             env->fpregs[i].d = cpu_set_fp80(mant, exp);
 202 #else
 203             /* difficult case */
 204             if (guess_mmx)
 205                 env->fpregs[i].mmx.MMX_Q(0) = mant;
 206             else
 207                 env->fpregs[i].d = cpu_set_fp80(mant, exp);
 208 #endif
 209             break;
 210         case 1:
 211             mant = qemu_get_be64(f);
 212 #ifdef USE_X86LDOUBLE
 213             {
 214                 union x86_longdouble *p;
 215                 /* difficult case */
 216                 p = (void *)&env->fpregs[i];
 217                 if (guess_mmx) {
 218                     p->mant = mant;
 219                     p->exp = 0xffff;
 220                 } else {
 221                     fp64_to_fp80(p, mant);
 222                 }
 223             }
 224 #else
 225             env->fpregs[i].mmx.MMX_Q(0) = mant;
 226 #endif
 227             break;
 228         default:
 229             return -EINVAL;
 230         }
 231     }
 232
 233     env->fpuc = fpuc;
 234     /* XXX: restore FPU round state */
 235     env->fpstt = (fpus >> 11) & 7;
 236     env->fpus = fpus & ~0x3800;
 237     fptag ^= 0xff;
 238     for(i = 0; i < 8; i++) {
 239         env->fptags[i] = (fptag >> i) & 1;
 240     }
 241
 242     for(i = 0; i < 6; i++)
 243         cpu_get_seg(f, &env->segs[i]);
 244     cpu_get_seg(f, &env->ldt);
 245     cpu_get_seg(f, &env->tr);
 246     cpu_get_seg(f, &env->gdt);
 247     cpu_get_seg(f, &env->idt);
 248
 249     qemu_get_be32s(f, &env->sysenter_cs);
 250     if (version_id >= 7) {
 251         qemu_get_betls(f, &env->sysenter_esp);
 252         qemu_get_betls(f, &env->sysenter_eip);
 253     } else {
 254         env->sysenter_esp = qemu_get_be32(f);
 255         env->sysenter_eip = qemu_get_be32(f);
 256     }
 257
 258     qemu_get_betls(f, &env->cr[0]);
 259     qemu_get_betls(f, &env->cr[2]);
 260     qemu_get_betls(f, &env->cr[3]);
 261     qemu_get_betls(f, &env->cr[4]);
 262
 263     for(i = 0; i < 8; i++)
 264         qemu_get_betls(f, &env->dr[i]);
 265     cpu_breakpoint_remove_all(env, BP_CPU);
 266     cpu_watchpoint_remove_all(env, BP_CPU);
 267     for (i = 0; i < 4; i++)
 268         hw_breakpoint_insert(env, i);
 269
 270     /* MMU */
 271     qemu_get_sbe32s(f, &a20_mask);
 272     env->a20_mask = a20_mask;
 273
 274     qemu_get_be32s(f, &env->mxcsr);
 275     for(i = 0; i < CPU_NB_REGS; i++) {
 276         qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0));
 277         qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1));
 278     }
 279
 280 #ifdef TARGET_X86_64
 281     qemu_get_be64s(f, &env->efer);
 282     qemu_get_be64s(f, &env->star);
 283     qemu_get_be64s(f, &env->lstar);
 284     qemu_get_be64s(f, &env->cstar);
 285     qemu_get_be64s(f, &env->fmask);
 286     qemu_get_be64s(f, &env->kernelgsbase);
 287 #endif
 288     if (version_id >= 4) {
 289         qemu_get_be32s(f, &env->smbase);
 290     }
 291     if (version_id >= 5) {
 292         qemu_get_be64s(f, &env->pat);
 293         qemu_get_be32s(f, &env->hflags2);
 294         if (version_id < 6)
 295             qemu_get_be32s(f, &env->halted);
 296
 297         qemu_get_be64s(f, &env->vm_hsave);
 298         qemu_get_be64s(f, &env->vm_vmcb);
 299         qemu_get_be64s(f, &env->tsc_offset);
 300         qemu_get_be64s(f, &env->intercept);
 301         qemu_get_be16s(f, &env->intercept_cr_read);
 302         qemu_get_be16s(f, &env->intercept_cr_write);
 303         qemu_get_be16s(f, &env->intercept_dr_read);
 304         qemu_get_be16s(f, &env->intercept_dr_write);
 305         qemu_get_be32s(f, &env->intercept_exceptions);
 306         qemu_get_8s(f, &env->v_tpr);
 307     }
 308
 309     if (version_id >= 8) {
 310         /* MTRRs */
 311         for(i = 0; i < 11; i++)
 312             qemu_get_be64s(f, &env->mtrr_fixed[i]);
 313         qemu_get_be64s(f, &env->mtrr_deftype);
 314         for(i = 0; i < 8; i++) {
 315             qemu_get_be64s(f, &env->mtrr_var[i].base);
 316             qemu_get_be64s(f, &env->mtrr_var[i].mask);
 317         }
 318     }
 319
 320     /* XXX: ensure compatiblity for halted bit ? */
 321     /* XXX: compute redundant hflags bits */
 322     env->hflags = hflags;
 323     tlb_flush(env, 1);
 324     return 0;
 325 }