include/hw/bt.h

   1 /*
   2  * QEMU Bluetooth HCI helpers.
   3  *
   4  * Copyright (C) 2007 OpenMoko, Inc.
   5  * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6  *
   7  * Useful definitions taken from BlueZ project's headers.
   8  * Copyright (C) 2000-2001  Qualcomm Incorporated
   9  * Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
  10  * Copyright (C) 2002-2006  Marcel Holtmann <marcel@holtmann.org>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  24  */
  25
  26 #ifndef HW_BT_H
  27 #define HW_BT_H 1
  28
  29 #include "hw/irq.h"
  30
  31 /* BD Address */
  32 typedef struct {
  33     uint8_t b[6];
  34 } QEMU_PACKED bdaddr_t;
  35
  36 #define BDADDR_ANY      (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}})
  37 #define BDADDR_ALL      (&(bdaddr_t) {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}})
  38 #define BDADDR_LOCAL    (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}})
  39
  40 /* Copy, swap, convert BD Address */
  41 static inline int bacmp(const bdaddr_t *ba1, const bdaddr_t *ba2)
  42 {
  43     return memcmp(ba1, ba2, sizeof(bdaddr_t));
  44 }
  45 static inline void bacpy(bdaddr_t *dst, const bdaddr_t *src)
  46 {
  47     memcpy(dst, src, sizeof(bdaddr_t));
  48 }
  49
  50 #define BAINIT(orig)    { .b = {                \
  51     (orig)->b[0], (orig)->b[1], (orig)->b[2],   \
  52     (orig)->b[3], (orig)->b[4], (orig)->b[5],   \
  53 }, }
  54
  55 /* The twisted structures of a bluetooth environment */
  56 struct bt_device_s;
  57 struct bt_scatternet_s;
  58 struct bt_piconet_s;
  59 struct bt_link_s;
  60
  61 struct bt_scatternet_s {
  62     struct bt_device_s *slave;
  63 };
  64
  65 struct bt_link_s {
  66     struct bt_device_s *slave, *host;
  67     uint16_t handle;            /* Master (host) side handle */
  68     uint16_t acl_interval;
  69     enum {
  70         acl_active,
  71         acl_hold,
  72         acl_sniff,
  73         acl_parked,
  74     } acl_mode;
  75 };
  76
  77 struct bt_device_s {
  78     int lt_addr;
  79     bdaddr_t bd_addr;
  80     int mtu;
  81     int setup;
  82     struct bt_scatternet_s *net;
  83
  84     uint8_t key[16];
  85     int key_present;
  86     uint8_t class[3];
  87
  88     uint8_t reject_reason;
  89
  90     uint64_t lmp_caps;
  91     const char *lmp_name;
  92     void (*lmp_connection_request)(struct bt_link_s *link);
  93     void (*lmp_connection_complete)(struct bt_link_s *link);
  94     void (*lmp_disconnect_master)(struct bt_link_s *link);
  95     void (*lmp_disconnect_slave)(struct bt_link_s *link);
  96     void (*lmp_acl_data)(struct bt_link_s *link, const uint8_t *data,
  97                     int start, int len);
  98     void (*lmp_acl_resp)(struct bt_link_s *link, const uint8_t *data,
  99                     int start, int len);
 100     void (*lmp_mode_change)(struct bt_link_s *link);
 101
 102     void (*handle_destroy)(struct bt_device_s *device);
 103     struct bt_device_s *next;   /* Next in the piconet/scatternet */
 104
 105     int inquiry_scan;
 106     int page_scan;
 107
 108     uint16_t clkoff;    /* Note: Always little-endian */
 109 };
 110
 111 extern struct HCIInfo null_hci;
 112 /* bt.c */
 113 void bt_device_init(struct bt_device_s *dev, struct bt_scatternet_s *net);
 114 void bt_device_done(struct bt_device_s *dev);
 115 struct bt_scatternet_s *qemu_find_bt_vlan(int id);
 116
 117 /* bt-hci.c */
 118 struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net);
 119 struct HCIInfo *hci_init(const char *str);
 120
 121 /* bt-vhci.c */
 122 void bt_vhci_init(struct HCIInfo *info);
 123
 124 /* bt-hci-csr.c */
 125 enum {
 126     csrhci_pin_reset,
 127     csrhci_pin_wakeup,
 128     __csrhci_pins,
 129 };
 130 qemu_irq *csrhci_pins_get(CharDriverState *chr);
 131 CharDriverState *uart_hci_init(qemu_irq wakeup);
 132
 133 /* bt-l2cap.c */
 134 struct bt_l2cap_device_s;
 135 struct bt_l2cap_conn_params_s;
 136 struct bt_l2cap_psm_s;
 137 void bt_l2cap_device_init(struct bt_l2cap_device_s *dev,
 138                 struct bt_scatternet_s *net);
 139 void bt_l2cap_device_done(struct bt_l2cap_device_s *dev);
 140 void bt_l2cap_psm_register(struct bt_l2cap_device_s *dev, int psm,
 141                 int min_mtu, int (*new_channel)(struct bt_l2cap_device_s *dev,
 142                         struct bt_l2cap_conn_params_s *params));
 143
 144 struct bt_l2cap_device_s {
 145     struct bt_device_s device;
 146     struct bt_l2cap_psm_s *first_psm;
 147 };
 148
 149 struct bt_l2cap_conn_params_s {
 150     /* Input */
 151     uint8_t *(*sdu_out)(struct bt_l2cap_conn_params_s *chan, int len);
 152     void (*sdu_submit)(struct bt_l2cap_conn_params_s *chan);
 153     int remote_mtu;
 154     /* Output */
 155     void *opaque;
 156     void (*sdu_in)(void *opaque, const uint8_t *data, int len);
 157     void (*close)(void *opaque);
 158 };
 159
 160 enum bt_l2cap_psm_predef {
 161     BT_PSM_SDP          = 0x0001,
 162     BT_PSM_RFCOMM       = 0x0003,
 163     BT_PSM_TELEPHONY    = 0x0005,
 164     BT_PSM_TCS          = 0x0007,
 165     BT_PSM_BNEP         = 0x000f,
 166     BT_PSM_HID_CTRL     = 0x0011,
 167     BT_PSM_HID_INTR     = 0x0013,
 168     BT_PSM_UPNP         = 0x0015,
 169     BT_PSM_AVCTP        = 0x0017,
 170     BT_PSM_AVDTP        = 0x0019,
 171 };
 172
 173 /* bt-sdp.c */
 174 void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev);
 175
 176 /* bt-hid.c */
 177 struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net);
 178 struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net);
 179 struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net);
 180
 181 /* Link Management Protocol layer defines */
 182
 183 #define LLID_ACLU_CONT          0x1
 184 #define LLID_ACLU_START         0x2
 185 #define LLID_ACLC               0x3
 186
 187 enum lmp_pdu_type {
 188     LMP_NAME_REQ                = 0x0001,
 189     LMP_NAME_RES                = 0x0002,
 190     LMP_ACCEPTED                = 0x0003,
 191     LMP_NOT_ACCEPTED            = 0x0004,
 192     LMP_CLKOFFSET_REQ           = 0x0005,
 193     LMP_CLKOFFSET_RES           = 0x0006,
 194     LMP_DETACH                  = 0x0007,
 195     LMP_IN_RAND                 = 0x0008,
 196     LMP_COMB_KEY                = 0x0009,
 197     LMP_UNIT_KEY                = 0x000a,
 198     LMP_AU_RAND                 = 0x000b,
 199     LMP_SRES                    = 0x000c,
 200     LMP_TEMP_RAND               = 0x000d,
 201     LMP_TEMP_KEY                = 0x000e,
 202     LMP_CRYPT_MODE_REQ          = 0x000f,
 203     LMP_CRYPT_KEY_SIZE_REQ      = 0x0010,
 204     LMP_START_ENCRYPT_REQ       = 0x0011,
 205     LMP_STOP_ENCRYPT_REQ        = 0x0012,
 206     LMP_SWITCH_REQ              = 0x0013,
 207     LMP_HOLD                    = 0x0014,
 208     LMP_HOLD_REQ                = 0x0015,
 209     LMP_SNIFF_REQ               = 0x0017,
 210     LMP_UNSNIFF_REQ             = 0x0018,
 211     LMP_LMP_PARK_REQ            = 0x0019,
 212     LMP_SET_BCAST_SCAN_WND      = 0x001b,
 213     LMP_MODIFY_BEACON           = 0x001c,
 214     LMP_UNPARK_BD_ADDR_REQ      = 0x001d,
 215     LMP_UNPARK_PM_ADDR_REQ      = 0x001e,
 216     LMP_INCR_POWER_REQ          = 0x001f,
 217     LMP_DECR_POWER_REQ          = 0x0020,
 218     LMP_MAX_POWER               = 0x0021,
 219     LMP_MIN_POWER               = 0x0022,
 220     LMP_AUTO_RATE               = 0x0023,
 221     LMP_PREFERRED_RATE          = 0x0024,
 222     LMP_VERSION_REQ             = 0x0025,
 223     LMP_VERSION_RES             = 0x0026,
 224     LMP_FEATURES_REQ            = 0x0027,
 225     LMP_FEATURES_RES            = 0x0028,
 226     LMP_QUALITY_OF_SERVICE      = 0x0029,
 227     LMP_QOS_REQ                 = 0x002a,
 228     LMP_RM_SCO_LINK_REQ         = 0x002b,
 229     LMP_SCO_LINK_REQ            = 0x002c,
 230     LMP_MAX_SLOT                = 0x002d,
 231     LMP_MAX_SLOT_REQ            = 0x002e,
 232     LMP_TIMING_ACCURACY_REQ     = 0x002f,
 233     LMP_TIMING_ACCURACY_RES     = 0x0030,
 234     LMP_SETUP_COMPLETE          = 0x0031,
 235     LMP_USE_SEMIPERM_KEY        = 0x0032,
 236     LMP_HOST_CONNECTION_REQ     = 0x0033,
 237     LMP_SLOT_OFFSET             = 0x0034,
 238     LMP_PAGE_MODE_REQ           = 0x0035,
 239     LMP_PAGE_SCAN_MODE_REQ      = 0x0036,
 240     LMP_SUPERVISION_TIMEOUT     = 0x0037,
 241     LMP_TEST_ACTIVATE           = 0x0038,
 242     LMP_TEST_CONTROL            = 0x0039,
 243     LMP_CRYPT_KEY_MASK_REQ      = 0x003a,
 244     LMP_CRYPT_KEY_MASK_RES      = 0x003b,
 245     LMP_SET_AFH                 = 0x003c,
 246     LMP_ACCEPTED_EXT            = 0x7f01,
 247     LMP_NOT_ACCEPTED_EXT        = 0x7f02,
 248     LMP_FEATURES_REQ_EXT        = 0x7f03,
 249     LMP_FEATURES_RES_EXT        = 0x7f04,
 250     LMP_PACKET_TYPE_TBL_REQ     = 0x7f0b,
 251     LMP_ESCO_LINK_REQ           = 0x7f0c,
 252     LMP_RM_ESCO_LINK_REQ        = 0x7f0d,
 253     LMP_CHANNEL_CLASS_REQ       = 0x7f10,
 254     LMP_CHANNEL_CLASS           = 0x7f11,
 255 };
 256
 257 /* Host Controller Interface layer defines */
 258
 259 enum hci_packet_type {
 260     HCI_COMMAND_PKT             = 0x01,
 261     HCI_ACLDATA_PKT             = 0x02,
 262     HCI_SCODATA_PKT             = 0x03,
 263     HCI_EVENT_PKT               = 0x04,
 264     HCI_VENDOR_PKT              = 0xff,
 265 };
 266
 267 enum bt_packet_type {
 268     HCI_2DH1    = 1 << 1,
 269     HCI_3DH1    = 1 << 2,
 270     HCI_DM1     = 1 << 3,
 271     HCI_DH1     = 1 << 4,
 272     HCI_2DH3    = 1 << 8,
 273     HCI_3DH3    = 1 << 9,
 274     HCI_DM3     = 1 << 10,
 275     HCI_DH3     = 1 << 11,
 276     HCI_2DH5    = 1 << 12,
 277     HCI_3DH5    = 1 << 13,
 278     HCI_DM5     = 1 << 14,
 279     HCI_DH5     = 1 << 15,
 280 };
 281
 282 enum sco_packet_type {
 283     HCI_HV1     = 1 << 5,
 284     HCI_HV2     = 1 << 6,
 285     HCI_HV3     = 1 << 7,
 286 };
 287
 288 enum ev_packet_type {
 289     HCI_EV3     = 1 << 3,
 290     HCI_EV4     = 1 << 4,
 291     HCI_EV5     = 1 << 5,
 292     HCI_2EV3    = 1 << 6,
 293     HCI_3EV3    = 1 << 7,
 294     HCI_2EV5    = 1 << 8,
 295     HCI_3EV5    = 1 << 9,
 296 };
 297
 298 enum hci_error_code {
 299     HCI_SUCCESS                         = 0x00,
 300     HCI_UNKNOWN_COMMAND                 = 0x01,
 301     HCI_NO_CONNECTION                   = 0x02,
 302     HCI_HARDWARE_FAILURE                = 0x03,
 303     HCI_PAGE_TIMEOUT                    = 0x04,
 304     HCI_AUTHENTICATION_FAILURE          = 0x05,
 305     HCI_PIN_OR_KEY_MISSING              = 0x06,
 306     HCI_MEMORY_FULL                     = 0x07,
 307     HCI_CONNECTION_TIMEOUT              = 0x08,
 308     HCI_MAX_NUMBER_OF_CONNECTIONS       = 0x09,
 309     HCI_MAX_NUMBER_OF_SCO_CONNECTIONS   = 0x0a,
 310     HCI_ACL_CONNECTION_EXISTS           = 0x0b,
 311     HCI_COMMAND_DISALLOWED              = 0x0c,
 312     HCI_REJECTED_LIMITED_RESOURCES      = 0x0d,
 313     HCI_REJECTED_SECURITY               = 0x0e,
 314     HCI_REJECTED_PERSONAL               = 0x0f,
 315     HCI_HOST_TIMEOUT                    = 0x10,
 316     HCI_UNSUPPORTED_FEATURE             = 0x11,
 317     HCI_INVALID_PARAMETERS              = 0x12,
 318     HCI_OE_USER_ENDED_CONNECTION        = 0x13,
 319     HCI_OE_LOW_RESOURCES                = 0x14,
 320     HCI_OE_POWER_OFF                    = 0x15,
 321     HCI_CONNECTION_TERMINATED           = 0x16,
 322     HCI_REPEATED_ATTEMPTS               = 0x17,
 323     HCI_PAIRING_NOT_ALLOWED             = 0x18,
 324     HCI_UNKNOWN_LMP_PDU                 = 0x19,
 325     HCI_UNSUPPORTED_REMOTE_FEATURE      = 0x1a,
 326     HCI_SCO_OFFSET_REJECTED             = 0x1b,
 327     HCI_SCO_INTERVAL_REJECTED           = 0x1c,
 328     HCI_AIR_MODE_REJECTED               = 0x1d,
 329     HCI_INVALID_LMP_PARAMETERS          = 0x1e,
 330     HCI_UNSPECIFIED_ERROR               = 0x1f,
 331     HCI_UNSUPPORTED_LMP_PARAMETER_VALUE = 0x20,
 332     HCI_ROLE_CHANGE_NOT_ALLOWED         = 0x21,
 333     HCI_LMP_RESPONSE_TIMEOUT            = 0x22,
 334     HCI_LMP_ERROR_TRANSACTION_COLLISION = 0x23,
 335     HCI_LMP_PDU_NOT_ALLOWED             = 0x24,
 336     HCI_ENCRYPTION_MODE_NOT_ACCEPTED    = 0x25,
 337     HCI_UNIT_LINK_KEY_USED              = 0x26,
 338     HCI_QOS_NOT_SUPPORTED               = 0x27,
 339     HCI_INSTANT_PASSED                  = 0x28,
 340     HCI_PAIRING_NOT_SUPPORTED           = 0x29,
 341     HCI_TRANSACTION_COLLISION           = 0x2a,
 342     HCI_QOS_UNACCEPTABLE_PARAMETER      = 0x2c,
 343     HCI_QOS_REJECTED                    = 0x2d,
 344     HCI_CLASSIFICATION_NOT_SUPPORTED    = 0x2e,
 345     HCI_INSUFFICIENT_SECURITY           = 0x2f,
 346     HCI_PARAMETER_OUT_OF_RANGE          = 0x30,
 347     HCI_ROLE_SWITCH_PENDING             = 0x32,
 348     HCI_SLOT_VIOLATION                  = 0x34,
 349     HCI_ROLE_SWITCH_FAILED              = 0x35,
 350 };
 351
 352 enum acl_flag_bits {
 353     ACL_CONT            = 1 << 0,
 354     ACL_START           = 1 << 1,
 355     ACL_ACTIVE_BCAST    = 1 << 2,
 356     ACL_PICO_BCAST      = 1 << 3,
 357 };
 358
 359 enum baseband_link_type {
 360     SCO_LINK            = 0x00,
 361     ACL_LINK            = 0x01,
 362 };
 363
 364 enum lmp_feature_bits0 {
 365     LMP_3SLOT           = 1 << 0,
 366     LMP_5SLOT           = 1 << 1,
 367     LMP_ENCRYPT         = 1 << 2,
 368     LMP_SOFFSET         = 1 << 3,
 369     LMP_TACCURACY       = 1 << 4,
 370     LMP_RSWITCH         = 1 << 5,
 371     LMP_HOLD_MODE       = 1 << 6,
 372     LMP_SNIFF_MODE      = 1 << 7,
 373 };
 374
 375 enum lmp_feature_bits1 {
 376     LMP_PARK            = 1 << 0,
 377     LMP_RSSI            = 1 << 1,
 378     LMP_QUALITY         = 1 << 2,
 379     LMP_SCO             = 1 << 3,
 380     LMP_HV2             = 1 << 4,
 381     LMP_HV3             = 1 << 5,
 382     LMP_ULAW            = 1 << 6,
 383     LMP_ALAW            = 1 << 7,
 384 };
 385
 386 enum lmp_feature_bits2 {
 387     LMP_CVSD            = 1 << 0,
 388     LMP_PSCHEME         = 1 << 1,
 389     LMP_PCONTROL        = 1 << 2,
 390     LMP_TRSP_SCO        = 1 << 3,
 391     LMP_BCAST_ENC       = 1 << 7,
 392 };
 393
 394 enum lmp_feature_bits3 {
 395     LMP_EDR_ACL_2M      = 1 << 1,
 396     LMP_EDR_ACL_3M      = 1 << 2,
 397     LMP_ENH_ISCAN       = 1 << 3,
 398     LMP_ILACE_ISCAN     = 1 << 4,
 399     LMP_ILACE_PSCAN     = 1 << 5,
 400     LMP_RSSI_INQ        = 1 << 6,
 401     LMP_ESCO            = 1 << 7,
 402 };
 403
 404 enum lmp_feature_bits4 {
 405     LMP_EV4             = 1 << 0,
 406     LMP_EV5             = 1 << 1,
 407     LMP_AFH_CAP_SLV     = 1 << 3,
 408     LMP_AFH_CLS_SLV     = 1 << 4,
 409     LMP_EDR_3SLOT       = 1 << 7,
 410 };
 411
 412 enum lmp_feature_bits5 {
 413     LMP_EDR_5SLOT       = 1 << 0,
 414     LMP_SNIFF_SUBR      = 1 << 1,
 415     LMP_AFH_CAP_MST     = 1 << 3,
 416     LMP_AFH_CLS_MST     = 1 << 4,
 417     LMP_EDR_ESCO_2M     = 1 << 5,
 418     LMP_EDR_ESCO_3M     = 1 << 6,
 419     LMP_EDR_3S_ESCO     = 1 << 7,
 420 };
 421
 422 enum lmp_feature_bits6 {
 423     LMP_EXT_INQ         = 1 << 0,
 424 };
 425
 426 enum lmp_feature_bits7 {
 427     LMP_EXT_FEAT        = 1 << 7,
 428 };
 429
 430 enum hci_link_policy {
 431     HCI_LP_RSWITCH      = 1 << 0,
 432     HCI_LP_HOLD         = 1 << 1,
 433     HCI_LP_SNIFF        = 1 << 2,
 434     HCI_LP_PARK         = 1 << 3,
 435 };
 436
 437 enum hci_link_mode {
 438     HCI_LM_ACCEPT       = 1 << 15,
 439     HCI_LM_MASTER       = 1 << 0,
 440     HCI_LM_AUTH         = 1 << 1,
 441     HCI_LM_ENCRYPT      = 1 << 2,
 442     HCI_LM_TRUSTED      = 1 << 3,
 443     HCI_LM_RELIABLE     = 1 << 4,
 444     HCI_LM_SECURE       = 1 << 5,
 445 };
 446
 447 /* HCI Commands */
 448
 449 /* Link Control */
 450 #define OGF_LINK_CTL            0x01
 451
 452 #define OCF_INQUIRY                     0x0001
 453 typedef struct {
 454     uint8_t     lap[3];
 455     uint8_t     length;         /* 1.28s units */
 456     uint8_t     num_rsp;
 457 } QEMU_PACKED inquiry_cp;
 458 #define INQUIRY_CP_SIZE 5
 459
 460 typedef struct {
 461     uint8_t             status;
 462     bdaddr_t    bdaddr;
 463 } QEMU_PACKED status_bdaddr_rp;
 464 #define STATUS_BDADDR_RP_SIZE 7
 465
 466 #define OCF_INQUIRY_CANCEL              0x0002
 467
 468 #define OCF_PERIODIC_INQUIRY            0x0003
 469 typedef struct {
 470     uint16_t    max_period;     /* 1.28s units */
 471     uint16_t    min_period;     /* 1.28s units */
 472     uint8_t     lap[3];
 473     uint8_t     length;         /* 1.28s units */
 474     uint8_t     num_rsp;
 475 } QEMU_PACKED periodic_inquiry_cp;
 476 #define PERIODIC_INQUIRY_CP_SIZE 9
 477
 478 #define OCF_EXIT_PERIODIC_INQUIRY       0x0004
 479
 480 #define OCF_CREATE_CONN                 0x0005
 481 typedef struct {
 482     bdaddr_t    bdaddr;
 483     uint16_t    pkt_type;
 484     uint8_t     pscan_rep_mode;
 485     uint8_t     pscan_mode;
 486     uint16_t    clock_offset;
 487     uint8_t     role_switch;
 488 } QEMU_PACKED create_conn_cp;
 489 #define CREATE_CONN_CP_SIZE 13
 490
 491 #define OCF_DISCONNECT                  0x0006
 492 typedef struct {
 493     uint16_t    handle;
 494     uint8_t     reason;
 495 } QEMU_PACKED disconnect_cp;
 496 #define DISCONNECT_CP_SIZE 3
 497
 498 #define OCF_ADD_SCO                     0x0007
 499 typedef struct {
 500     uint16_t    handle;
 501     uint16_t    pkt_type;
 502 } QEMU_PACKED add_sco_cp;
 503 #define ADD_SCO_CP_SIZE 4
 504
 505 #define OCF_CREATE_CONN_CANCEL          0x0008
 506 typedef struct {
 507     bdaddr_t    bdaddr;
 508 } QEMU_PACKED create_conn_cancel_cp;
 509 #define CREATE_CONN_CANCEL_CP_SIZE 6
 510
 511 typedef struct {
 512     uint8_t     status;
 513     bdaddr_t    bdaddr;
 514 } QEMU_PACKED create_conn_cancel_rp;
 515 #define CREATE_CONN_CANCEL_RP_SIZE 7
 516
 517 #define OCF_ACCEPT_CONN_REQ             0x0009
 518 typedef struct {
 519     bdaddr_t    bdaddr;
 520     uint8_t     role;
 521 } QEMU_PACKED accept_conn_req_cp;
 522 #define ACCEPT_CONN_REQ_CP_SIZE 7
 523
 524 #define OCF_REJECT_CONN_REQ             0x000A
 525 typedef struct {
 526     bdaddr_t    bdaddr;
 527     uint8_t     reason;
 528 } QEMU_PACKED reject_conn_req_cp;
 529 #define REJECT_CONN_REQ_CP_SIZE 7
 530
 531 #define OCF_LINK_KEY_REPLY              0x000B
 532 typedef struct {
 533     bdaddr_t    bdaddr;
 534     uint8_t     link_key[16];
 535 } QEMU_PACKED link_key_reply_cp;
 536 #define LINK_KEY_REPLY_CP_SIZE 22
 537
 538 #define OCF_LINK_KEY_NEG_REPLY          0x000C
 539
 540 #define OCF_PIN_CODE_REPLY              0x000D
 541 typedef struct {
 542     bdaddr_t    bdaddr;
 543     uint8_t     pin_len;
 544     uint8_t     pin_code[16];
 545 } QEMU_PACKED pin_code_reply_cp;
 546 #define PIN_CODE_REPLY_CP_SIZE 23
 547
 548 #define OCF_PIN_CODE_NEG_REPLY          0x000E
 549
 550 #define OCF_SET_CONN_PTYPE              0x000F
 551 typedef struct {
 552     uint16_t     handle;
 553     uint16_t     pkt_type;
 554 } QEMU_PACKED set_conn_ptype_cp;
 555 #define SET_CONN_PTYPE_CP_SIZE 4
 556
 557 #define OCF_AUTH_REQUESTED              0x0011
 558 typedef struct {
 559     uint16_t     handle;
 560 } QEMU_PACKED auth_requested_cp;
 561 #define AUTH_REQUESTED_CP_SIZE 2
 562
 563 #define OCF_SET_CONN_ENCRYPT            0x0013
 564 typedef struct {
 565     uint16_t    handle;
 566     uint8_t     encrypt;
 567 } QEMU_PACKED set_conn_encrypt_cp;
 568 #define SET_CONN_ENCRYPT_CP_SIZE 3
 569
 570 #define OCF_CHANGE_CONN_LINK_KEY        0x0015
 571 typedef struct {
 572     uint16_t    handle;
 573 } QEMU_PACKED change_conn_link_key_cp;
 574 #define CHANGE_CONN_LINK_KEY_CP_SIZE 2
 575
 576 #define OCF_MASTER_LINK_KEY             0x0017
 577 typedef struct {
 578     uint8_t     key_flag;
 579 } QEMU_PACKED master_link_key_cp;
 580 #define MASTER_LINK_KEY_CP_SIZE 1
 581
 582 #define OCF_REMOTE_NAME_REQ             0x0019
 583 typedef struct {
 584     bdaddr_t    bdaddr;
 585     uint8_t     pscan_rep_mode;
 586     uint8_t     pscan_mode;
 587     uint16_t    clock_offset;
 588 } QEMU_PACKED remote_name_req_cp;
 589 #define REMOTE_NAME_REQ_CP_SIZE 10
 590
 591 #define OCF_REMOTE_NAME_REQ_CANCEL      0x001A
 592 typedef struct {
 593     bdaddr_t    bdaddr;
 594 } QEMU_PACKED remote_name_req_cancel_cp;
 595 #define REMOTE_NAME_REQ_CANCEL_CP_SIZE 6
 596
 597 typedef struct {
 598     uint8_t             status;
 599     bdaddr_t    bdaddr;
 600 } QEMU_PACKED remote_name_req_cancel_rp;
 601 #define REMOTE_NAME_REQ_CANCEL_RP_SIZE 7
 602
 603 #define OCF_READ_REMOTE_FEATURES        0x001B
 604 typedef struct {
 605     uint16_t    handle;
 606 } QEMU_PACKED read_remote_features_cp;
 607 #define READ_REMOTE_FEATURES_CP_SIZE 2
 608
 609 #define OCF_READ_REMOTE_EXT_FEATURES    0x001C
 610 typedef struct {
 611     uint16_t    handle;
 612     uint8_t     page_num;
 613 } QEMU_PACKED read_remote_ext_features_cp;
 614 #define READ_REMOTE_EXT_FEATURES_CP_SIZE 3
 615
 616 #define OCF_READ_REMOTE_VERSION         0x001D
 617 typedef struct {
 618     uint16_t    handle;
 619 } QEMU_PACKED read_remote_version_cp;
 620 #define READ_REMOTE_VERSION_CP_SIZE 2
 621
 622 #define OCF_READ_CLOCK_OFFSET           0x001F
 623 typedef struct {
 624     uint16_t    handle;
 625 } QEMU_PACKED read_clock_offset_cp;
 626 #define READ_CLOCK_OFFSET_CP_SIZE 2
 627
 628 #define OCF_READ_LMP_HANDLE             0x0020
 629 typedef struct {
 630     uint16_t    handle;
 631 } QEMU_PACKED read_lmp_handle_cp;
 632 #define READ_LMP_HANDLE_CP_SIZE 2
 633
 634 typedef struct {
 635     uint8_t     status;
 636     uint16_t    handle;
 637     uint8_t     lmp_handle;
 638     uint32_t    reserved;
 639 } QEMU_PACKED read_lmp_handle_rp;
 640 #define READ_LMP_HANDLE_RP_SIZE 8
 641
 642 #define OCF_SETUP_SYNC_CONN             0x0028
 643 typedef struct {
 644     uint16_t    handle;
 645     uint32_t    tx_bandwidth;
 646     uint32_t    rx_bandwidth;
 647     uint16_t    max_latency;
 648     uint16_t    voice_setting;
 649     uint8_t     retrans_effort;
 650     uint16_t    pkt_type;
 651 } QEMU_PACKED setup_sync_conn_cp;
 652 #define SETUP_SYNC_CONN_CP_SIZE 17
 653
 654 #define OCF_ACCEPT_SYNC_CONN_REQ        0x0029
 655 typedef struct {
 656     bdaddr_t    bdaddr;
 657     uint32_t    tx_bandwidth;
 658     uint32_t    rx_bandwidth;
 659     uint16_t    max_latency;
 660     uint16_t    voice_setting;
 661     uint8_t     retrans_effort;
 662     uint16_t    pkt_type;
 663 } QEMU_PACKED accept_sync_conn_req_cp;
 664 #define ACCEPT_SYNC_CONN_REQ_CP_SIZE 21
 665
 666 #define OCF_REJECT_SYNC_CONN_REQ        0x002A
 667 typedef struct {
 668     bdaddr_t    bdaddr;
 669     uint8_t     reason;
 670 } QEMU_PACKED reject_sync_conn_req_cp;
 671 #define REJECT_SYNC_CONN_REQ_CP_SIZE 7
 672
 673 /* Link Policy */
 674 #define OGF_LINK_POLICY         0x02
 675
 676 #define OCF_HOLD_MODE                   0x0001
 677 typedef struct {
 678     uint16_t    handle;
 679     uint16_t    max_interval;
 680     uint16_t    min_interval;
 681 } QEMU_PACKED hold_mode_cp;
 682 #define HOLD_MODE_CP_SIZE 6
 683
 684 #define OCF_SNIFF_MODE                  0x0003
 685 typedef struct {
 686     uint16_t    handle;
 687     uint16_t    max_interval;
 688     uint16_t    min_interval;
 689     uint16_t    attempt;
 690     uint16_t    timeout;
 691 } QEMU_PACKED sniff_mode_cp;
 692 #define SNIFF_MODE_CP_SIZE 10
 693
 694 #define OCF_EXIT_SNIFF_MODE             0x0004
 695 typedef struct {
 696     uint16_t    handle;
 697 } QEMU_PACKED exit_sniff_mode_cp;
 698 #define EXIT_SNIFF_MODE_CP_SIZE 2
 699
 700 #define OCF_PARK_MODE                   0x0005
 701 typedef struct {
 702     uint16_t    handle;
 703     uint16_t    max_interval;
 704     uint16_t    min_interval;
 705 } QEMU_PACKED park_mode_cp;
 706 #define PARK_MODE_CP_SIZE 6
 707
 708 #define OCF_EXIT_PARK_MODE              0x0006
 709 typedef struct {
 710     uint16_t    handle;
 711 } QEMU_PACKED exit_park_mode_cp;
 712 #define EXIT_PARK_MODE_CP_SIZE 2
 713
 714 #define OCF_QOS_SETUP                   0x0007
 715 typedef struct {
 716     uint8_t     service_type;           /* 1 = best effort */
 717     uint32_t    token_rate;             /* Byte per seconds */
 718     uint32_t    peak_bandwidth;         /* Byte per seconds */
 719     uint32_t    latency;                /* Microseconds */
 720     uint32_t    delay_variation;        /* Microseconds */
 721 } QEMU_PACKED hci_qos;
 722 #define HCI_QOS_CP_SIZE 17
 723 typedef struct {
 724     uint16_t    handle;
 725     uint8_t     flags;                  /* Reserved */
 726     hci_qos     qos;
 727 } QEMU_PACKED qos_setup_cp;
 728 #define QOS_SETUP_CP_SIZE (3 + HCI_QOS_CP_SIZE)
 729
 730 #define OCF_ROLE_DISCOVERY              0x0009
 731 typedef struct {
 732     uint16_t    handle;
 733 } QEMU_PACKED role_discovery_cp;
 734 #define ROLE_DISCOVERY_CP_SIZE 2
 735 typedef struct {
 736     uint8_t     status;
 737     uint16_t    handle;
 738     uint8_t     role;
 739 } QEMU_PACKED role_discovery_rp;
 740 #define ROLE_DISCOVERY_RP_SIZE 4
 741
 742 #define OCF_SWITCH_ROLE                 0x000B
 743 typedef struct {
 744     bdaddr_t    bdaddr;
 745     uint8_t     role;
 746 } QEMU_PACKED switch_role_cp;
 747 #define SWITCH_ROLE_CP_SIZE 7
 748
 749 #define OCF_READ_LINK_POLICY            0x000C
 750 typedef struct {
 751     uint16_t    handle;
 752 } QEMU_PACKED read_link_policy_cp;
 753 #define READ_LINK_POLICY_CP_SIZE 2
 754 typedef struct {
 755     uint8_t     status;
 756     uint16_t    handle;
 757     uint16_t    policy;
 758 } QEMU_PACKED read_link_policy_rp;
 759 #define READ_LINK_POLICY_RP_SIZE 5
 760
 761 #define OCF_WRITE_LINK_POLICY           0x000D
 762 typedef struct {
 763     uint16_t    handle;
 764     uint16_t    policy;
 765 } QEMU_PACKED write_link_policy_cp;
 766 #define WRITE_LINK_POLICY_CP_SIZE 4
 767 typedef struct {
 768     uint8_t     status;
 769     uint16_t    handle;
 770 } QEMU_PACKED write_link_policy_rp;
 771 #define WRITE_LINK_POLICY_RP_SIZE 3
 772
 773 #define OCF_READ_DEFAULT_LINK_POLICY    0x000E
 774
 775 #define OCF_WRITE_DEFAULT_LINK_POLICY   0x000F
 776
 777 #define OCF_FLOW_SPECIFICATION          0x0010
 778
 779 #define OCF_SNIFF_SUBRATE               0x0011
 780 typedef struct {
 781     uint16_t    handle;
 782     uint16_t    max_remote_latency;
 783     uint16_t    max_local_latency;
 784     uint16_t    min_remote_timeout;
 785     uint16_t    min_local_timeout;
 786 } QEMU_PACKED sniff_subrate_cp;
 787 #define SNIFF_SUBRATE_CP_SIZE 10
 788
 789 /* Host Controller and Baseband */
 790 #define OGF_HOST_CTL            0x03
 791
 792 #define OCF_SET_EVENT_MASK              0x0001
 793 typedef struct {
 794     uint8_t     mask[8];
 795 } QEMU_PACKED set_event_mask_cp;
 796 #define SET_EVENT_MASK_CP_SIZE 8
 797
 798 #define OCF_RESET                       0x0003
 799
 800 #define OCF_SET_EVENT_FLT               0x0005
 801 typedef struct {
 802     uint8_t     flt_type;
 803     uint8_t     cond_type;
 804     uint8_t     condition[0];
 805 } QEMU_PACKED set_event_flt_cp;
 806 #define SET_EVENT_FLT_CP_SIZE 2
 807
 808 enum bt_filter_type {
 809     FLT_CLEAR_ALL               = 0x00,
 810     FLT_INQ_RESULT              = 0x01,
 811     FLT_CONN_SETUP              = 0x02,
 812 };
 813 enum inq_result_cond_type {
 814     INQ_RESULT_RETURN_ALL       = 0x00,
 815     INQ_RESULT_RETURN_CLASS     = 0x01,
 816     INQ_RESULT_RETURN_BDADDR    = 0x02,
 817 };
 818 enum conn_setup_cond_type {
 819     CONN_SETUP_ALLOW_ALL        = 0x00,
 820     CONN_SETUP_ALLOW_CLASS      = 0x01,
 821     CONN_SETUP_ALLOW_BDADDR     = 0x02,
 822 };
 823 enum conn_setup_cond {
 824     CONN_SETUP_AUTO_OFF         = 0x01,
 825     CONN_SETUP_AUTO_ON          = 0x02,
 826 };
 827
 828 #define OCF_FLUSH                       0x0008
 829 typedef struct {
 830     uint16_t    handle;
 831 } QEMU_PACKED flush_cp;
 832 #define FLUSH_CP_SIZE 2
 833
 834 typedef struct {
 835     uint8_t     status;
 836     uint16_t    handle;
 837 } QEMU_PACKED flush_rp;
 838 #define FLUSH_RP_SIZE 3
 839
 840 #define OCF_READ_PIN_TYPE               0x0009
 841 typedef struct {
 842     uint8_t     status;
 843     uint8_t     pin_type;
 844 } QEMU_PACKED read_pin_type_rp;
 845 #define READ_PIN_TYPE_RP_SIZE 2
 846
 847 #define OCF_WRITE_PIN_TYPE              0x000A
 848 typedef struct {
 849     uint8_t     pin_type;
 850 } QEMU_PACKED write_pin_type_cp;
 851 #define WRITE_PIN_TYPE_CP_SIZE 1
 852
 853 #define OCF_CREATE_NEW_UNIT_KEY         0x000B
 854
 855 #define OCF_READ_STORED_LINK_KEY        0x000D
 856 typedef struct {
 857     bdaddr_t    bdaddr;
 858     uint8_t     read_all;
 859 } QEMU_PACKED read_stored_link_key_cp;
 860 #define READ_STORED_LINK_KEY_CP_SIZE 7
 861 typedef struct {
 862     uint8_t     status;
 863     uint16_t    max_keys;
 864     uint16_t    num_keys;
 865 } QEMU_PACKED read_stored_link_key_rp;
 866 #define READ_STORED_LINK_KEY_RP_SIZE 5
 867
 868 #define OCF_WRITE_STORED_LINK_KEY       0x0011
 869 typedef struct {
 870     uint8_t     num_keys;
 871     /* variable length part */
 872 } QEMU_PACKED write_stored_link_key_cp;
 873 #define WRITE_STORED_LINK_KEY_CP_SIZE 1
 874 typedef struct {
 875     uint8_t     status;
 876     uint8_t     num_keys;
 877 } QEMU_PACKED write_stored_link_key_rp;
 878 #define READ_WRITE_LINK_KEY_RP_SIZE 2
 879
 880 #define OCF_DELETE_STORED_LINK_KEY      0x0012
 881 typedef struct {
 882     bdaddr_t    bdaddr;
 883     uint8_t     delete_all;
 884 } QEMU_PACKED delete_stored_link_key_cp;
 885 #define DELETE_STORED_LINK_KEY_CP_SIZE 7
 886 typedef struct {
 887     uint8_t     status;
 888     uint16_t    num_keys;
 889 } QEMU_PACKED delete_stored_link_key_rp;
 890 #define DELETE_STORED_LINK_KEY_RP_SIZE 3
 891
 892 #define OCF_CHANGE_LOCAL_NAME           0x0013
 893 typedef struct {
 894     char        name[248];
 895 } QEMU_PACKED change_local_name_cp;
 896 #define CHANGE_LOCAL_NAME_CP_SIZE 248
 897
 898 #define OCF_READ_LOCAL_NAME             0x0014
 899 typedef struct {
 900     uint8_t     status;
 901     char        name[248];
 902 } QEMU_PACKED read_local_name_rp;
 903 #define READ_LOCAL_NAME_RP_SIZE 249
 904
 905 #define OCF_READ_CONN_ACCEPT_TIMEOUT    0x0015
 906 typedef struct {
 907     uint8_t     status;
 908     uint16_t    timeout;
 909 } QEMU_PACKED read_conn_accept_timeout_rp;
 910 #define READ_CONN_ACCEPT_TIMEOUT_RP_SIZE 3
 911
 912 #define OCF_WRITE_CONN_ACCEPT_TIMEOUT   0x0016
 913 typedef struct {
 914     uint16_t    timeout;
 915 } QEMU_PACKED write_conn_accept_timeout_cp;
 916 #define WRITE_CONN_ACCEPT_TIMEOUT_CP_SIZE 2
 917
 918 #define OCF_READ_PAGE_TIMEOUT           0x0017
 919 typedef struct {
 920     uint8_t     status;
 921     uint16_t    timeout;
 922 } QEMU_PACKED read_page_timeout_rp;
 923 #define READ_PAGE_TIMEOUT_RP_SIZE 3
 924
 925 #define OCF_WRITE_PAGE_TIMEOUT          0x0018
 926 typedef struct {
 927     uint16_t    timeout;
 928 } QEMU_PACKED write_page_timeout_cp;
 929 #define WRITE_PAGE_TIMEOUT_CP_SIZE 2
 930
 931 #define OCF_READ_SCAN_ENABLE            0x0019
 932 typedef struct {
 933     uint8_t     status;
 934     uint8_t     enable;
 935 } QEMU_PACKED read_scan_enable_rp;
 936 #define READ_SCAN_ENABLE_RP_SIZE 2
 937
 938 #define OCF_WRITE_SCAN_ENABLE           0x001A
 939 typedef struct {
 940     uint8_t     scan_enable;
 941 } QEMU_PACKED write_scan_enable_cp;
 942 #define WRITE_SCAN_ENABLE_CP_SIZE 1
 943
 944 enum scan_enable_bits {
 945     SCAN_DISABLED               = 0,
 946     SCAN_INQUIRY                = 1 << 0,
 947     SCAN_PAGE                   = 1 << 1,
 948 };
 949
 950 #define OCF_READ_PAGE_ACTIVITY          0x001B
 951 typedef struct {
 952     uint8_t     status;
 953     uint16_t    interval;
 954     uint16_t    window;
 955 } QEMU_PACKED read_page_activity_rp;
 956 #define READ_PAGE_ACTIVITY_RP_SIZE 5
 957
 958 #define OCF_WRITE_PAGE_ACTIVITY         0x001C
 959 typedef struct {
 960     uint16_t    interval;
 961     uint16_t    window;
 962 } QEMU_PACKED write_page_activity_cp;
 963 #define WRITE_PAGE_ACTIVITY_CP_SIZE 4
 964
 965 #define OCF_READ_INQ_ACTIVITY           0x001D
 966 typedef struct {
 967     uint8_t     status;
 968     uint16_t    interval;
 969     uint16_t    window;
 970 } QEMU_PACKED read_inq_activity_rp;
 971 #define READ_INQ_ACTIVITY_RP_SIZE 5
 972
 973 #define OCF_WRITE_INQ_ACTIVITY          0x001E
 974 typedef struct {
 975     uint16_t    interval;
 976     uint16_t    window;
 977 } QEMU_PACKED write_inq_activity_cp;
 978 #define WRITE_INQ_ACTIVITY_CP_SIZE 4
 979
 980 #define OCF_READ_AUTH_ENABLE            0x001F
 981
 982 #define OCF_WRITE_AUTH_ENABLE           0x0020
 983
 984 #define AUTH_DISABLED           0x00
 985 #define AUTH_ENABLED            0x01
 986
 987 #define OCF_READ_ENCRYPT_MODE           0x0021
 988
 989 #define OCF_WRITE_ENCRYPT_MODE          0x0022
 990
 991 #define ENCRYPT_DISABLED        0x00
 992 #define ENCRYPT_P2P             0x01
 993 #define ENCRYPT_BOTH            0x02
 994
 995 #define OCF_READ_CLASS_OF_DEV           0x0023
 996 typedef struct {
 997     uint8_t     status;
 998     uint8_t     dev_class[3];
 999 } QEMU_PACKED read_class_of_dev_rp;
1000 #define READ_CLASS_OF_DEV_RP_SIZE 4
1001
1002 #define OCF_WRITE_CLASS_OF_DEV          0x0024
1003 typedef struct {
1004     uint8_t     dev_class[3];
1005 } QEMU_PACKED write_class_of_dev_cp;
1006 #define WRITE_CLASS_OF_DEV_CP_SIZE 3
1007
1008 #define OCF_READ_VOICE_SETTING          0x0025
1009 typedef struct {
1010     uint8_t     status;
1011     uint16_t    voice_setting;
1012 } QEMU_PACKED read_voice_setting_rp;
1013 #define READ_VOICE_SETTING_RP_SIZE 3
1014
1015 #define OCF_WRITE_VOICE_SETTING         0x0026
1016 typedef struct {
1017     uint16_t    voice_setting;
1018 } QEMU_PACKED write_voice_setting_cp;
1019 #define WRITE_VOICE_SETTING_CP_SIZE 2
1020
1021 #define OCF_READ_AUTOMATIC_FLUSH_TIMEOUT        0x0027
1022
1023 #define OCF_WRITE_AUTOMATIC_FLUSH_TIMEOUT       0x0028
1024
1025 #define OCF_READ_NUM_BROADCAST_RETRANS  0x0029
1026
1027 #define OCF_WRITE_NUM_BROADCAST_RETRANS 0x002A
1028
1029 #define OCF_READ_HOLD_MODE_ACTIVITY     0x002B
1030
1031 #define OCF_WRITE_HOLD_MODE_ACTIVITY    0x002C
1032
1033 #define OCF_READ_TRANSMIT_POWER_LEVEL   0x002D
1034 typedef struct {
1035     uint16_t    handle;
1036     uint8_t     type;
1037 } QEMU_PACKED read_transmit_power_level_cp;
1038 #define READ_TRANSMIT_POWER_LEVEL_CP_SIZE 3
1039 typedef struct {
1040     uint8_t     status;
1041     uint16_t    handle;
1042     int8_t      level;
1043 } QEMU_PACKED read_transmit_power_level_rp;
1044 #define READ_TRANSMIT_POWER_LEVEL_RP_SIZE 4
1045
1046 #define OCF_HOST_BUFFER_SIZE            0x0033
1047 typedef struct {
1048     uint16_t    acl_mtu;
1049     uint8_t     sco_mtu;
1050     uint16_t    acl_max_pkt;
1051     uint16_t    sco_max_pkt;
1052 } QEMU_PACKED host_buffer_size_cp;
1053 #define HOST_BUFFER_SIZE_CP_SIZE 7
1054
1055 #define OCF_HOST_NUMBER_OF_COMPLETED_PACKETS    0x0035
1056
1057 #define OCF_READ_LINK_SUPERVISION_TIMEOUT       0x0036
1058 typedef struct {
1059     uint8_t     status;
1060     uint16_t    handle;
1061     uint16_t    link_sup_to;
1062 } QEMU_PACKED read_link_supervision_timeout_rp;
1063 #define READ_LINK_SUPERVISION_TIMEOUT_RP_SIZE 5
1064
1065 #define OCF_WRITE_LINK_SUPERVISION_TIMEOUT      0x0037
1066 typedef struct {
1067     uint16_t    handle;
1068     uint16_t    link_sup_to;
1069 } QEMU_PACKED write_link_supervision_timeout_cp;
1070 #define WRITE_LINK_SUPERVISION_TIMEOUT_CP_SIZE 4
1071 typedef struct {
1072     uint8_t     status;
1073     uint16_t    handle;
1074 } QEMU_PACKED write_link_supervision_timeout_rp;
1075 #define WRITE_LINK_SUPERVISION_TIMEOUT_RP_SIZE 3
1076
1077 #define OCF_READ_NUM_SUPPORTED_IAC      0x0038
1078
1079 #define MAX_IAC_LAP 0x40
1080 #define OCF_READ_CURRENT_IAC_LAP        0x0039
1081 typedef struct {
1082     uint8_t     status;
1083     uint8_t     num_current_iac;
1084     uint8_t     lap[MAX_IAC_LAP][3];
1085 } QEMU_PACKED read_current_iac_lap_rp;
1086 #define READ_CURRENT_IAC_LAP_RP_SIZE 2+3*MAX_IAC_LAP
1087
1088 #define OCF_WRITE_CURRENT_IAC_LAP       0x003A
1089 typedef struct {
1090     uint8_t     num_current_iac;
1091     uint8_t     lap[MAX_IAC_LAP][3];
1092 } QEMU_PACKED write_current_iac_lap_cp;
1093 #define WRITE_CURRENT_IAC_LAP_CP_SIZE 1+3*MAX_IAC_LAP
1094
1095 #define OCF_READ_PAGE_SCAN_PERIOD_MODE  0x003B
1096
1097 #define OCF_WRITE_PAGE_SCAN_PERIOD_MODE 0x003C
1098
1099 #define OCF_READ_PAGE_SCAN_MODE         0x003D
1100
1101 #define OCF_WRITE_PAGE_SCAN_MODE        0x003E
1102
1103 #define OCF_SET_AFH_CLASSIFICATION      0x003F
1104 typedef struct {
1105     uint8_t     map[10];
1106 } QEMU_PACKED set_afh_classification_cp;
1107 #define SET_AFH_CLASSIFICATION_CP_SIZE 10
1108 typedef struct {
1109     uint8_t     status;
1110 } QEMU_PACKED set_afh_classification_rp;
1111 #define SET_AFH_CLASSIFICATION_RP_SIZE 1
1112
1113 #define OCF_READ_INQUIRY_SCAN_TYPE      0x0042
1114 typedef struct {
1115     uint8_t     status;
1116     uint8_t     type;
1117 } QEMU_PACKED read_inquiry_scan_type_rp;
1118 #define READ_INQUIRY_SCAN_TYPE_RP_SIZE 2
1119
1120 #define OCF_WRITE_INQUIRY_SCAN_TYPE     0x0043
1121 typedef struct {
1122     uint8_t     type;
1123 } QEMU_PACKED write_inquiry_scan_type_cp;
1124 #define WRITE_INQUIRY_SCAN_TYPE_CP_SIZE 1
1125 typedef struct {
1126     uint8_t     status;
1127 } QEMU_PACKED write_inquiry_scan_type_rp;
1128 #define WRITE_INQUIRY_SCAN_TYPE_RP_SIZE 1
1129
1130 #define OCF_READ_INQUIRY_MODE           0x0044
1131 typedef struct {
1132     uint8_t     status;
1133     uint8_t     mode;
1134 } QEMU_PACKED read_inquiry_mode_rp;
1135 #define READ_INQUIRY_MODE_RP_SIZE 2
1136
1137 #define OCF_WRITE_INQUIRY_MODE          0x0045
1138 typedef struct {
1139     uint8_t     mode;
1140 } QEMU_PACKED write_inquiry_mode_cp;
1141 #define WRITE_INQUIRY_MODE_CP_SIZE 1
1142 typedef struct {
1143     uint8_t     status;
1144 } QEMU_PACKED write_inquiry_mode_rp;
1145 #define WRITE_INQUIRY_MODE_RP_SIZE 1
1146
1147 #define OCF_READ_PAGE_SCAN_TYPE         0x0046
1148
1149 #define OCF_WRITE_PAGE_SCAN_TYPE        0x0047
1150
1151 #define OCF_READ_AFH_MODE               0x0048
1152 typedef struct {
1153     uint8_t     status;
1154     uint8_t     mode;
1155 } QEMU_PACKED read_afh_mode_rp;
1156 #define READ_AFH_MODE_RP_SIZE 2
1157
1158 #define OCF_WRITE_AFH_MODE              0x0049
1159 typedef struct {
1160     uint8_t     mode;
1161 } QEMU_PACKED write_afh_mode_cp;
1162 #define WRITE_AFH_MODE_CP_SIZE 1
1163 typedef struct {
1164     uint8_t     status;
1165 } QEMU_PACKED write_afh_mode_rp;
1166 #define WRITE_AFH_MODE_RP_SIZE 1
1167
1168 #define OCF_READ_EXT_INQUIRY_RESPONSE   0x0051
1169 typedef struct {
1170     uint8_t     status;
1171     uint8_t     fec;
1172     uint8_t     data[240];
1173 } QEMU_PACKED read_ext_inquiry_response_rp;
1174 #define READ_EXT_INQUIRY_RESPONSE_RP_SIZE 242
1175
1176 #define OCF_WRITE_EXT_INQUIRY_RESPONSE  0x0052
1177 typedef struct {
1178     uint8_t     fec;
1179     uint8_t     data[240];
1180 } QEMU_PACKED write_ext_inquiry_response_cp;
1181 #define WRITE_EXT_INQUIRY_RESPONSE_CP_SIZE 241
1182 typedef struct {
1183     uint8_t     status;
1184 } QEMU_PACKED write_ext_inquiry_response_rp;
1185 #define WRITE_EXT_INQUIRY_RESPONSE_RP_SIZE 1
1186
1187 /* Informational Parameters */
1188 #define OGF_INFO_PARAM          0x04
1189
1190 #define OCF_READ_LOCAL_VERSION          0x0001
1191 typedef struct {
1192     uint8_t     status;
1193     uint8_t     hci_ver;
1194     uint16_t    hci_rev;
1195     uint8_t     lmp_ver;
1196     uint16_t    manufacturer;
1197     uint16_t    lmp_subver;
1198 } QEMU_PACKED read_local_version_rp;
1199 #define READ_LOCAL_VERSION_RP_SIZE 9
1200
1201 #define OCF_READ_LOCAL_COMMANDS         0x0002
1202 typedef struct {
1203     uint8_t     status;
1204     uint8_t     commands[64];
1205 } QEMU_PACKED read_local_commands_rp;
1206 #define READ_LOCAL_COMMANDS_RP_SIZE 65
1207
1208 #define OCF_READ_LOCAL_FEATURES         0x0003
1209 typedef struct {
1210     uint8_t     status;
1211     uint8_t     features[8];
1212 } QEMU_PACKED read_local_features_rp;
1213 #define READ_LOCAL_FEATURES_RP_SIZE 9
1214
1215 #define OCF_READ_LOCAL_EXT_FEATURES     0x0004
1216 typedef struct {
1217     uint8_t     page_num;
1218 } QEMU_PACKED read_local_ext_features_cp;
1219 #define READ_LOCAL_EXT_FEATURES_CP_SIZE 1
1220 typedef struct {
1221     uint8_t     status;
1222     uint8_t     page_num;
1223     uint8_t     max_page_num;
1224     uint8_t     features[8];
1225 } QEMU_PACKED read_local_ext_features_rp;
1226 #define READ_LOCAL_EXT_FEATURES_RP_SIZE 11
1227
1228 #define OCF_READ_BUFFER_SIZE            0x0005
1229 typedef struct {
1230     uint8_t     status;
1231     uint16_t    acl_mtu;
1232     uint8_t     sco_mtu;
1233     uint16_t    acl_max_pkt;
1234     uint16_t    sco_max_pkt;
1235 } QEMU_PACKED read_buffer_size_rp;
1236 #define READ_BUFFER_SIZE_RP_SIZE 8
1237
1238 #define OCF_READ_COUNTRY_CODE           0x0007
1239 typedef struct {
1240     uint8_t     status;
1241     uint8_t     country_code;
1242 } QEMU_PACKED read_country_code_rp;
1243 #define READ_COUNTRY_CODE_RP_SIZE 2
1244
1245 #define OCF_READ_BD_ADDR                0x0009
1246 typedef struct {
1247     uint8_t     status;
1248     bdaddr_t    bdaddr;
1249 } QEMU_PACKED read_bd_addr_rp;
1250 #define READ_BD_ADDR_RP_SIZE 7
1251
1252 /* Status params */
1253 #define OGF_STATUS_PARAM        0x05
1254
1255 #define OCF_READ_FAILED_CONTACT_COUNTER         0x0001
1256 typedef struct {
1257     uint8_t     status;
1258     uint16_t    handle;
1259     uint8_t     counter;
1260 } QEMU_PACKED read_failed_contact_counter_rp;
1261 #define READ_FAILED_CONTACT_COUNTER_RP_SIZE 4
1262
1263 #define OCF_RESET_FAILED_CONTACT_COUNTER        0x0002
1264 typedef struct {
1265     uint8_t     status;
1266     uint16_t    handle;
1267 } QEMU_PACKED reset_failed_contact_counter_rp;
1268 #define RESET_FAILED_CONTACT_COUNTER_RP_SIZE 3
1269
1270 #define OCF_READ_LINK_QUALITY           0x0003
1271 typedef struct {
1272     uint16_t    handle;
1273 } QEMU_PACKED read_link_quality_cp;
1274 #define READ_LINK_QUALITY_CP_SIZE 2
1275
1276 typedef struct {
1277     uint8_t     status;
1278     uint16_t    handle;
1279     uint8_t     link_quality;
1280 } QEMU_PACKED read_link_quality_rp;
1281 #define READ_LINK_QUALITY_RP_SIZE 4
1282
1283 #define OCF_READ_RSSI                   0x0005
1284 typedef struct {
1285     uint8_t     status;
1286     uint16_t    handle;
1287     int8_t      rssi;
1288 } QEMU_PACKED read_rssi_rp;
1289 #define READ_RSSI_RP_SIZE 4
1290
1291 #define OCF_READ_AFH_MAP                0x0006
1292 typedef struct {
1293     uint8_t     status;
1294     uint16_t    handle;
1295     uint8_t     mode;
1296     uint8_t     map[10];
1297 } QEMU_PACKED read_afh_map_rp;
1298 #define READ_AFH_MAP_RP_SIZE 14
1299
1300 #define OCF_READ_CLOCK                  0x0007
1301 typedef struct {
1302     uint16_t    handle;
1303     uint8_t     which_clock;
1304 } QEMU_PACKED read_clock_cp;
1305 #define READ_CLOCK_CP_SIZE 3
1306 typedef struct {
1307     uint8_t     status;
1308     uint16_t    handle;
1309     uint32_t    clock;
1310     uint16_t    accuracy;
1311 } QEMU_PACKED read_clock_rp;
1312 #define READ_CLOCK_RP_SIZE 9
1313
1314 /* Testing commands */
1315 #define OGF_TESTING_CMD         0x3e
1316
1317 /* Vendor specific commands */
1318 #define OGF_VENDOR_CMD          0x3f
1319
1320 /* HCI Events */
1321
1322 #define EVT_INQUIRY_COMPLETE            0x01
1323
1324 #define EVT_INQUIRY_RESULT              0x02
1325 typedef struct {
1326     uint8_t     num_responses;
1327     bdaddr_t    bdaddr;
1328     uint8_t     pscan_rep_mode;
1329     uint8_t     pscan_period_mode;
1330     uint8_t     pscan_mode;
1331     uint8_t     dev_class[3];
1332     uint16_t    clock_offset;
1333 } QEMU_PACKED inquiry_info;
1334 #define INQUIRY_INFO_SIZE 15
1335
1336 #define EVT_CONN_COMPLETE               0x03
1337 typedef struct {
1338     uint8_t     status;
1339     uint16_t    handle;
1340     bdaddr_t    bdaddr;
1341     uint8_t     link_type;
1342     uint8_t     encr_mode;
1343 } QEMU_PACKED evt_conn_complete;
1344 #define EVT_CONN_COMPLETE_SIZE 11
1345
1346 #define EVT_CONN_REQUEST                0x04
1347 typedef struct {
1348     bdaddr_t    bdaddr;
1349     uint8_t     dev_class[3];
1350     uint8_t     link_type;
1351 } QEMU_PACKED evt_conn_request;
1352 #define EVT_CONN_REQUEST_SIZE 10
1353
1354 #define EVT_DISCONN_COMPLETE            0x05
1355 typedef struct {
1356     uint8_t     status;
1357     uint16_t    handle;
1358     uint8_t     reason;
1359 } QEMU_PACKED evt_disconn_complete;
1360 #define EVT_DISCONN_COMPLETE_SIZE 4
1361
1362 #define EVT_AUTH_COMPLETE               0x06
1363 typedef struct {
1364     uint8_t     status;
1365     uint16_t    handle;
1366 } QEMU_PACKED evt_auth_complete;
1367 #define EVT_AUTH_COMPLETE_SIZE 3
1368
1369 #define EVT_REMOTE_NAME_REQ_COMPLETE    0x07
1370 typedef struct {
1371     uint8_t     status;
1372     bdaddr_t    bdaddr;
1373     char        name[248];
1374 } QEMU_PACKED evt_remote_name_req_complete;
1375 #define EVT_REMOTE_NAME_REQ_COMPLETE_SIZE 255
1376
1377 #define EVT_ENCRYPT_CHANGE              0x08
1378 typedef struct {
1379     uint8_t     status;
1380     uint16_t    handle;
1381     uint8_t     encrypt;
1382 } QEMU_PACKED evt_encrypt_change;
1383 #define EVT_ENCRYPT_CHANGE_SIZE 4
1384
1385 #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE       0x09
1386 typedef struct {
1387     uint8_t     status;
1388     uint16_t    handle;
1389 }  QEMU_PACKED evt_change_conn_link_key_complete;
1390 #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE_SIZE 3
1391
1392 #define EVT_MASTER_LINK_KEY_COMPLETE            0x0A
1393 typedef struct {
1394     uint8_t     status;
1395     uint16_t    handle;
1396     uint8_t     key_flag;
1397 } QEMU_PACKED evt_master_link_key_complete;
1398 #define EVT_MASTER_LINK_KEY_COMPLETE_SIZE 4
1399
1400 #define EVT_READ_REMOTE_FEATURES_COMPLETE       0x0B
1401 typedef struct {
1402     uint8_t     status;
1403     uint16_t    handle;
1404     uint8_t     features[8];
1405 } QEMU_PACKED evt_read_remote_features_complete;
1406 #define EVT_READ_REMOTE_FEATURES_COMPLETE_SIZE 11
1407
1408 #define EVT_READ_REMOTE_VERSION_COMPLETE        0x0C
1409 typedef struct {
1410     uint8_t     status;
1411     uint16_t    handle;
1412     uint8_t     lmp_ver;
1413     uint16_t    manufacturer;
1414     uint16_t    lmp_subver;
1415 } QEMU_PACKED evt_read_remote_version_complete;
1416 #define EVT_READ_REMOTE_VERSION_COMPLETE_SIZE 8
1417
1418 #define EVT_QOS_SETUP_COMPLETE          0x0D
1419 typedef struct {
1420     uint8_t     status;
1421     uint16_t    handle;
1422     uint8_t     flags;                  /* Reserved */
1423     hci_qos     qos;
1424 } QEMU_PACKED evt_qos_setup_complete;
1425 #define EVT_QOS_SETUP_COMPLETE_SIZE (4 + HCI_QOS_CP_SIZE)
1426
1427 #define EVT_CMD_COMPLETE                0x0E
1428 typedef struct {
1429     uint8_t     ncmd;
1430     uint16_t    opcode;
1431 } QEMU_PACKED evt_cmd_complete;
1432 #define EVT_CMD_COMPLETE_SIZE 3
1433
1434 #define EVT_CMD_STATUS                  0x0F
1435 typedef struct {
1436     uint8_t     status;
1437     uint8_t     ncmd;
1438     uint16_t    opcode;
1439 } QEMU_PACKED evt_cmd_status;
1440 #define EVT_CMD_STATUS_SIZE 4
1441
1442 #define EVT_HARDWARE_ERROR              0x10
1443 typedef struct {
1444     uint8_t     code;
1445 } QEMU_PACKED evt_hardware_error;
1446 #define EVT_HARDWARE_ERROR_SIZE 1
1447
1448 #define EVT_FLUSH_OCCURRED              0x11
1449 typedef struct {
1450     uint16_t    handle;
1451 } QEMU_PACKED evt_flush_occurred;
1452 #define EVT_FLUSH_OCCURRED_SIZE 2
1453
1454 #define EVT_ROLE_CHANGE                 0x12
1455 typedef struct {
1456     uint8_t     status;
1457     bdaddr_t    bdaddr;
1458     uint8_t     role;
1459 } QEMU_PACKED evt_role_change;
1460 #define EVT_ROLE_CHANGE_SIZE 8
1461
1462 #define EVT_NUM_COMP_PKTS               0x13
1463 typedef struct {
1464     uint8_t     num_hndl;
1465     struct {
1466         uint16_t handle;
1467         uint16_t num_packets;
1468     } connection[0];
1469 } QEMU_PACKED evt_num_comp_pkts;
1470 #define EVT_NUM_COMP_PKTS_SIZE(num_hndl) (1 + 4 * (num_hndl))
1471
1472 #define EVT_MODE_CHANGE                 0x14
1473 typedef struct {
1474     uint8_t     status;
1475     uint16_t    handle;
1476     uint8_t     mode;
1477     uint16_t    interval;
1478 } QEMU_PACKED evt_mode_change;
1479 #define EVT_MODE_CHANGE_SIZE 6
1480
1481 #define EVT_RETURN_LINK_KEYS            0x15
1482 typedef struct {
1483     uint8_t     num_keys;
1484     /* variable length part */
1485 } QEMU_PACKED evt_return_link_keys;
1486 #define EVT_RETURN_LINK_KEYS_SIZE 1
1487
1488 #define EVT_PIN_CODE_REQ                0x16
1489 typedef struct {
1490     bdaddr_t    bdaddr;
1491 } QEMU_PACKED evt_pin_code_req;
1492 #define EVT_PIN_CODE_REQ_SIZE 6
1493
1494 #define EVT_LINK_KEY_REQ                0x17
1495 typedef struct {
1496     bdaddr_t    bdaddr;
1497 } QEMU_PACKED evt_link_key_req;
1498 #define EVT_LINK_KEY_REQ_SIZE 6
1499
1500 #define EVT_LINK_KEY_NOTIFY             0x18
1501 typedef struct {
1502     bdaddr_t    bdaddr;
1503     uint8_t     link_key[16];
1504     uint8_t     key_type;
1505 } QEMU_PACKED evt_link_key_notify;
1506 #define EVT_LINK_KEY_NOTIFY_SIZE 23
1507
1508 #define EVT_LOOPBACK_COMMAND            0x19
1509
1510 #define EVT_DATA_BUFFER_OVERFLOW        0x1A
1511 typedef struct {
1512     uint8_t     link_type;
1513 } QEMU_PACKED evt_data_buffer_overflow;
1514 #define EVT_DATA_BUFFER_OVERFLOW_SIZE 1
1515
1516 #define EVT_MAX_SLOTS_CHANGE            0x1B
1517 typedef struct {
1518     uint16_t    handle;
1519     uint8_t     max_slots;
1520 } QEMU_PACKED evt_max_slots_change;
1521 #define EVT_MAX_SLOTS_CHANGE_SIZE 3
1522
1523 #define EVT_READ_CLOCK_OFFSET_COMPLETE  0x1C
1524 typedef struct {
1525     uint8_t     status;
1526     uint16_t    handle;
1527     uint16_t    clock_offset;
1528 } QEMU_PACKED evt_read_clock_offset_complete;
1529 #define EVT_READ_CLOCK_OFFSET_COMPLETE_SIZE 5
1530
1531 #define EVT_CONN_PTYPE_CHANGED          0x1D
1532 typedef struct {
1533     uint8_t     status;
1534     uint16_t    handle;
1535     uint16_t    ptype;
1536 } QEMU_PACKED evt_conn_ptype_changed;
1537 #define EVT_CONN_PTYPE_CHANGED_SIZE 5
1538
1539 #define EVT_QOS_VIOLATION               0x1E
1540 typedef struct {
1541     uint16_t    handle;
1542 } QEMU_PACKED evt_qos_violation;
1543 #define EVT_QOS_VIOLATION_SIZE 2
1544
1545 #define EVT_PSCAN_REP_MODE_CHANGE       0x20
1546 typedef struct {
1547     bdaddr_t    bdaddr;
1548     uint8_t     pscan_rep_mode;
1549 } QEMU_PACKED evt_pscan_rep_mode_change;
1550 #define EVT_PSCAN_REP_MODE_CHANGE_SIZE 7
1551
1552 #define EVT_FLOW_SPEC_COMPLETE          0x21
1553 typedef struct {
1554     uint8_t     status;
1555     uint16_t    handle;
1556     uint8_t     flags;
1557     uint8_t     direction;
1558     hci_qos     qos;
1559 } QEMU_PACKED evt_flow_spec_complete;
1560 #define EVT_FLOW_SPEC_COMPLETE_SIZE (5 + HCI_QOS_CP_SIZE)
1561
1562 #define EVT_INQUIRY_RESULT_WITH_RSSI    0x22
1563 typedef struct {
1564     uint8_t     num_responses;
1565     bdaddr_t    bdaddr;
1566     uint8_t     pscan_rep_mode;
1567     uint8_t     pscan_period_mode;
1568     uint8_t     dev_class[3];
1569     uint16_t    clock_offset;
1570     int8_t      rssi;
1571 } QEMU_PACKED inquiry_info_with_rssi;
1572 #define INQUIRY_INFO_WITH_RSSI_SIZE 15
1573 typedef struct {
1574     uint8_t     num_responses;
1575     bdaddr_t    bdaddr;
1576     uint8_t     pscan_rep_mode;
1577     uint8_t     pscan_period_mode;
1578     uint8_t     pscan_mode;
1579     uint8_t     dev_class[3];
1580     uint16_t    clock_offset;
1581     int8_t      rssi;
1582 } QEMU_PACKED inquiry_info_with_rssi_and_pscan_mode;
1583 #define INQUIRY_INFO_WITH_RSSI_AND_PSCAN_MODE_SIZE 16
1584
1585 #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE   0x23
1586 typedef struct {
1587     uint8_t     status;
1588     uint16_t    handle;
1589     uint8_t     page_num;
1590     uint8_t     max_page_num;
1591     uint8_t     features[8];
1592 } QEMU_PACKED evt_read_remote_ext_features_complete;
1593 #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE_SIZE 13
1594
1595 #define EVT_SYNC_CONN_COMPLETE          0x2C
1596 typedef struct {
1597     uint8_t     status;
1598     uint16_t    handle;
1599     bdaddr_t    bdaddr;
1600     uint8_t     link_type;
1601     uint8_t     trans_interval;
1602     uint8_t     retrans_window;
1603     uint16_t    rx_pkt_len;
1604     uint16_t    tx_pkt_len;
1605     uint8_t     air_mode;
1606 } QEMU_PACKED evt_sync_conn_complete;
1607 #define EVT_SYNC_CONN_COMPLETE_SIZE 17
1608
1609 #define EVT_SYNC_CONN_CHANGED           0x2D
1610 typedef struct {
1611     uint8_t     status;
1612     uint16_t    handle;
1613     uint8_t     trans_interval;
1614     uint8_t     retrans_window;
1615     uint16_t    rx_pkt_len;
1616     uint16_t    tx_pkt_len;
1617 } QEMU_PACKED evt_sync_conn_changed;
1618 #define EVT_SYNC_CONN_CHANGED_SIZE 9
1619
1620 #define EVT_SNIFF_SUBRATE               0x2E
1621 typedef struct {
1622     uint8_t     status;
1623     uint16_t    handle;
1624     uint16_t    max_remote_latency;
1625     uint16_t    max_local_latency;
1626     uint16_t    min_remote_timeout;
1627     uint16_t    min_local_timeout;
1628 } QEMU_PACKED evt_sniff_subrate;
1629 #define EVT_SNIFF_SUBRATE_SIZE 11
1630
1631 #define EVT_TESTING                     0xFE
1632
1633 #define EVT_VENDOR                      0xFF
1634
1635 /* Command opcode pack/unpack */
1636 #define cmd_opcode_pack(ogf, ocf)       (uint16_t)((ocf & 0x03ff)|(ogf << 10))
1637 #define cmd_opcode_ogf(op)              (op >> 10)
1638 #define cmd_opcode_ocf(op)              (op & 0x03ff)
1639
1640 /* ACL handle and flags pack/unpack */
1641 #define acl_handle_pack(h, f)   (uint16_t)(((h) & 0x0fff)|((f) << 12))
1642 #define acl_handle(h)           ((h) & 0x0fff)
1643 #define acl_flags(h)            ((h) >> 12)
1644
1645 /* HCI Packet structures */
1646 #define HCI_COMMAND_HDR_SIZE    3
1647 #define HCI_EVENT_HDR_SIZE      2
1648 #define HCI_ACL_HDR_SIZE        4
1649 #define HCI_SCO_HDR_SIZE        3
1650
1651 struct hci_command_hdr {
1652     uint16_t    opcode;         /* OCF & OGF */
1653     uint8_t     plen;
1654 } QEMU_PACKED;
1655
1656 struct hci_event_hdr {
1657     uint8_t     evt;
1658     uint8_t     plen;
1659 } QEMU_PACKED;
1660
1661 struct hci_acl_hdr {
1662     uint16_t    handle;         /* Handle & Flags(PB, BC) */
1663     uint16_t    dlen;
1664 } QEMU_PACKED;
1665
1666 struct hci_sco_hdr {
1667     uint16_t    handle;
1668     uint8_t     dlen;
1669 } QEMU_PACKED;
1670
1671 /* L2CAP layer defines */
1672
1673 enum bt_l2cap_lm_bits {
1674     L2CAP_LM_MASTER     = 1 << 0,
1675     L2CAP_LM_AUTH       = 1 << 1,
1676     L2CAP_LM_ENCRYPT    = 1 << 2,
1677     L2CAP_LM_TRUSTED    = 1 << 3,
1678     L2CAP_LM_RELIABLE   = 1 << 4,
1679     L2CAP_LM_SECURE     = 1 << 5,
1680 };
1681
1682 enum bt_l2cap_cid_predef {
1683     L2CAP_CID_INVALID   = 0x0000,
1684     L2CAP_CID_SIGNALLING= 0x0001,
1685     L2CAP_CID_GROUP     = 0x0002,
1686     L2CAP_CID_ALLOC     = 0x0040,
1687 };
1688
1689 /* L2CAP command codes */
1690 enum bt_l2cap_cmd {
1691     L2CAP_COMMAND_REJ   = 1,
1692     L2CAP_CONN_REQ,
1693     L2CAP_CONN_RSP,
1694     L2CAP_CONF_REQ,
1695     L2CAP_CONF_RSP,
1696     L2CAP_DISCONN_REQ,
1697     L2CAP_DISCONN_RSP,
1698     L2CAP_ECHO_REQ,
1699     L2CAP_ECHO_RSP,
1700     L2CAP_INFO_REQ,
1701     L2CAP_INFO_RSP,
1702 };
1703
1704 enum bt_l2cap_sar_bits {
1705     L2CAP_SAR_NO_SEG    = 0,
1706     L2CAP_SAR_START,
1707     L2CAP_SAR_END,
1708     L2CAP_SAR_CONT,
1709 };
1710
1711 /* L2CAP structures */
1712 typedef struct {
1713     uint16_t    len;
1714     uint16_t    cid;
1715     uint8_t     data[0];
1716 } QEMU_PACKED l2cap_hdr;
1717 #define L2CAP_HDR_SIZE 4
1718
1719 typedef struct {
1720     uint8_t     code;
1721     uint8_t     ident;
1722     uint16_t    len;
1723 } QEMU_PACKED l2cap_cmd_hdr;
1724 #define L2CAP_CMD_HDR_SIZE 4
1725
1726 typedef struct {
1727     uint16_t    reason;
1728 } QEMU_PACKED l2cap_cmd_rej;
1729 #define L2CAP_CMD_REJ_SIZE 2
1730
1731 typedef struct {
1732     uint16_t    dcid;
1733     uint16_t    scid;
1734 } QEMU_PACKED l2cap_cmd_rej_cid;
1735 #define L2CAP_CMD_REJ_CID_SIZE 4
1736
1737 /* reject reason */
1738 enum bt_l2cap_rej_reason {
1739     L2CAP_REJ_CMD_NOT_UNDERSTOOD = 0,
1740     L2CAP_REJ_SIG_TOOBIG,
1741     L2CAP_REJ_CID_INVAL,
1742 };
1743
1744 typedef struct {
1745     uint16_t    psm;
1746     uint16_t    scid;
1747 } QEMU_PACKED l2cap_conn_req;
1748 #define L2CAP_CONN_REQ_SIZE 4
1749
1750 typedef struct {
1751     uint16_t    dcid;
1752     uint16_t    scid;
1753     uint16_t    result;
1754     uint16_t    status;
1755 } QEMU_PACKED l2cap_conn_rsp;
1756 #define L2CAP_CONN_RSP_SIZE 8
1757
1758 /* connect result */
1759 enum bt_l2cap_conn_res {
1760     L2CAP_CR_SUCCESS    = 0,
1761     L2CAP_CR_PEND,
1762     L2CAP_CR_BAD_PSM,
1763     L2CAP_CR_SEC_BLOCK,
1764     L2CAP_CR_NO_MEM,
1765 };
1766
1767 /* connect status */
1768 enum bt_l2cap_conn_stat {
1769     L2CAP_CS_NO_INFO    = 0,
1770     L2CAP_CS_AUTHEN_PEND,
1771     L2CAP_CS_AUTHOR_PEND,
1772 };
1773
1774 typedef struct {
1775     uint16_t    dcid;
1776     uint16_t    flags;
1777     uint8_t     data[0];
1778 } QEMU_PACKED l2cap_conf_req;
1779 #define L2CAP_CONF_REQ_SIZE(datalen) (4 + (datalen))
1780
1781 typedef struct {
1782     uint16_t    scid;
1783     uint16_t    flags;
1784     uint16_t    result;
1785     uint8_t     data[0];
1786 } QEMU_PACKED l2cap_conf_rsp;
1787 #define L2CAP_CONF_RSP_SIZE(datalen) (6 + datalen)
1788
1789 enum bt_l2cap_conf_res {
1790     L2CAP_CONF_SUCCESS  = 0,
1791     L2CAP_CONF_UNACCEPT,
1792     L2CAP_CONF_REJECT,
1793     L2CAP_CONF_UNKNOWN,
1794 };
1795
1796 typedef struct {
1797     uint8_t     type;
1798     uint8_t     len;
1799     uint8_t     val[0];
1800 } QEMU_PACKED l2cap_conf_opt;
1801 #define L2CAP_CONF_OPT_SIZE 2
1802
1803 enum bt_l2cap_conf_val {
1804     L2CAP_CONF_MTU      = 1,
1805     L2CAP_CONF_FLUSH_TO,
1806     L2CAP_CONF_QOS,
1807     L2CAP_CONF_RFC,
1808     L2CAP_CONF_RFC_MODE = L2CAP_CONF_RFC,
1809 };
1810
1811 typedef struct {
1812     uint8_t     flags;
1813     uint8_t     service_type;
1814     uint32_t    token_rate;
1815     uint32_t    token_bucket_size;
1816     uint32_t    peak_bandwidth;
1817     uint32_t    latency;
1818     uint32_t    delay_variation;
1819 } QEMU_PACKED l2cap_conf_opt_qos;
1820 #define L2CAP_CONF_OPT_QOS_SIZE 22
1821
1822 enum bt_l2cap_conf_opt_qos_st {
1823     L2CAP_CONF_QOS_NO_TRAFFIC = 0x00,
1824     L2CAP_CONF_QOS_BEST_EFFORT,
1825     L2CAP_CONF_QOS_GUARANTEED,
1826 };
1827
1828 #define L2CAP_CONF_QOS_WILDCARD 0xffffffff
1829
1830 enum bt_l2cap_mode {
1831     L2CAP_MODE_BASIC    = 0,
1832     L2CAP_MODE_RETRANS  = 1,
1833     L2CAP_MODE_FLOWCTL  = 2,
1834 };
1835
1836 typedef struct {
1837     uint16_t    dcid;
1838     uint16_t    scid;
1839 } QEMU_PACKED l2cap_disconn_req;
1840 #define L2CAP_DISCONN_REQ_SIZE 4
1841
1842 typedef struct {
1843     uint16_t    dcid;
1844     uint16_t    scid;
1845 } QEMU_PACKED l2cap_disconn_rsp;
1846 #define L2CAP_DISCONN_RSP_SIZE 4
1847
1848 typedef struct {
1849     uint16_t    type;
1850 } QEMU_PACKED l2cap_info_req;
1851 #define L2CAP_INFO_REQ_SIZE 2
1852
1853 typedef struct {
1854     uint16_t    type;
1855     uint16_t    result;
1856     uint8_t     data[0];
1857 } QEMU_PACKED l2cap_info_rsp;
1858 #define L2CAP_INFO_RSP_SIZE 4
1859
1860 /* info type */
1861 enum bt_l2cap_info_type {
1862     L2CAP_IT_CL_MTU     = 1,
1863     L2CAP_IT_FEAT_MASK,
1864 };
1865
1866 /* info result */
1867 enum bt_l2cap_info_result {
1868     L2CAP_IR_SUCCESS    = 0,
1869     L2CAP_IR_NOTSUPP,
1870 };
1871
1872 /* Service Discovery Protocol defines */
1873 /* Note that all multibyte values in lower layer protocols (above in this file)
1874  * are little-endian while SDP is big-endian.  */
1875
1876 /* Protocol UUIDs */
1877 enum sdp_proto_uuid {
1878     SDP_UUID            = 0x0001,
1879     UDP_UUID            = 0x0002,
1880     RFCOMM_UUID         = 0x0003,
1881     TCP_UUID            = 0x0004,
1882     TCS_BIN_UUID        = 0x0005,
1883     TCS_AT_UUID         = 0x0006,
1884     OBEX_UUID           = 0x0008,
1885     IP_UUID             = 0x0009,
1886     FTP_UUID            = 0x000a,
1887     HTTP_UUID           = 0x000c,
1888     WSP_UUID            = 0x000e,
1889     BNEP_UUID           = 0x000f,
1890     UPNP_UUID           = 0x0010,
1891     HIDP_UUID           = 0x0011,
1892     HCRP_CTRL_UUID      = 0x0012,
1893     HCRP_DATA_UUID      = 0x0014,
1894     HCRP_NOTE_UUID      = 0x0016,
1895     AVCTP_UUID          = 0x0017,
1896     AVDTP_UUID          = 0x0019,
1897     CMTP_UUID           = 0x001b,
1898     UDI_UUID            = 0x001d,
1899     MCAP_CTRL_UUID      = 0x001e,
1900     MCAP_DATA_UUID      = 0x001f,
1901     L2CAP_UUID          = 0x0100,
1902 };
1903
1904 /*
1905  * Service class identifiers of standard services and service groups
1906  */
1907 enum service_class_id {
1908     SDP_SERVER_SVCLASS_ID               = 0x1000,
1909     BROWSE_GRP_DESC_SVCLASS_ID          = 0x1001,
1910     PUBLIC_BROWSE_GROUP                 = 0x1002,
1911     SERIAL_PORT_SVCLASS_ID              = 0x1101,
1912     LAN_ACCESS_SVCLASS_ID               = 0x1102,
1913     DIALUP_NET_SVCLASS_ID               = 0x1103,
1914     IRMC_SYNC_SVCLASS_ID                = 0x1104,
1915     OBEX_OBJPUSH_SVCLASS_ID             = 0x1105,
1916     OBEX_FILETRANS_SVCLASS_ID           = 0x1106,
1917     IRMC_SYNC_CMD_SVCLASS_ID            = 0x1107,
1918     HEADSET_SVCLASS_ID                  = 0x1108,
1919     CORDLESS_TELEPHONY_SVCLASS_ID       = 0x1109,
1920     AUDIO_SOURCE_SVCLASS_ID             = 0x110a,
1921     AUDIO_SINK_SVCLASS_ID               = 0x110b,
1922     AV_REMOTE_TARGET_SVCLASS_ID         = 0x110c,
1923     ADVANCED_AUDIO_SVCLASS_ID           = 0x110d,
1924     AV_REMOTE_SVCLASS_ID                = 0x110e,
1925     VIDEO_CONF_SVCLASS_ID               = 0x110f,
1926     INTERCOM_SVCLASS_ID                 = 0x1110,
1927     FAX_SVCLASS_ID                      = 0x1111,
1928     HEADSET_AGW_SVCLASS_ID              = 0x1112,
1929     WAP_SVCLASS_ID                      = 0x1113,
1930     WAP_CLIENT_SVCLASS_ID               = 0x1114,
1931     PANU_SVCLASS_ID                     = 0x1115,
1932     NAP_SVCLASS_ID                      = 0x1116,
1933     GN_SVCLASS_ID                       = 0x1117,
1934     DIRECT_PRINTING_SVCLASS_ID          = 0x1118,
1935     REFERENCE_PRINTING_SVCLASS_ID       = 0x1119,
1936     IMAGING_SVCLASS_ID                  = 0x111a,
1937     IMAGING_RESPONDER_SVCLASS_ID        = 0x111b,
1938     IMAGING_ARCHIVE_SVCLASS_ID          = 0x111c,
1939     IMAGING_REFOBJS_SVCLASS_ID          = 0x111d,
1940     HANDSFREE_SVCLASS_ID                = 0x111e,
1941     HANDSFREE_AGW_SVCLASS_ID            = 0x111f,
1942     DIRECT_PRT_REFOBJS_SVCLASS_ID       = 0x1120,
1943     REFLECTED_UI_SVCLASS_ID             = 0x1121,
1944     BASIC_PRINTING_SVCLASS_ID           = 0x1122,
1945     PRINTING_STATUS_SVCLASS_ID          = 0x1123,
1946     HID_SVCLASS_ID                      = 0x1124,
1947     HCR_SVCLASS_ID                      = 0x1125,
1948     HCR_PRINT_SVCLASS_ID                = 0x1126,
1949     HCR_SCAN_SVCLASS_ID                 = 0x1127,
1950     CIP_SVCLASS_ID                      = 0x1128,
1951     VIDEO_CONF_GW_SVCLASS_ID            = 0x1129,
1952     UDI_MT_SVCLASS_ID                   = 0x112a,
1953     UDI_TA_SVCLASS_ID                   = 0x112b,
1954     AV_SVCLASS_ID                       = 0x112c,
1955     SAP_SVCLASS_ID                      = 0x112d,
1956     PBAP_PCE_SVCLASS_ID                 = 0x112e,
1957     PBAP_PSE_SVCLASS_ID                 = 0x112f,
1958     PBAP_SVCLASS_ID                     = 0x1130,
1959     PNP_INFO_SVCLASS_ID                 = 0x1200,
1960     GENERIC_NETWORKING_SVCLASS_ID       = 0x1201,
1961     GENERIC_FILETRANS_SVCLASS_ID        = 0x1202,
1962     GENERIC_AUDIO_SVCLASS_ID            = 0x1203,
1963     GENERIC_TELEPHONY_SVCLASS_ID        = 0x1204,
1964     UPNP_SVCLASS_ID                     = 0x1205,
1965     UPNP_IP_SVCLASS_ID                  = 0x1206,
1966     UPNP_PAN_SVCLASS_ID                 = 0x1300,
1967     UPNP_LAP_SVCLASS_ID                 = 0x1301,
1968     UPNP_L2CAP_SVCLASS_ID               = 0x1302,
1969     VIDEO_SOURCE_SVCLASS_ID             = 0x1303,
1970     VIDEO_SINK_SVCLASS_ID               = 0x1304,
1971     VIDEO_DISTRIBUTION_SVCLASS_ID       = 0x1305,
1972     MDP_SVCLASS_ID                      = 0x1400,
1973     MDP_SOURCE_SVCLASS_ID               = 0x1401,
1974     MDP_SINK_SVCLASS_ID                 = 0x1402,
1975     APPLE_AGENT_SVCLASS_ID              = 0x2112,
1976 };
1977
1978 /*
1979  * Standard profile descriptor identifiers; note these
1980  * may be identical to some of the service classes defined above
1981  */
1982 #define SDP_SERVER_PROFILE_ID           SDP_SERVER_SVCLASS_ID
1983 #define BROWSE_GRP_DESC_PROFILE_ID      BROWSE_GRP_DESC_SVCLASS_ID
1984 #define SERIAL_PORT_PROFILE_ID          SERIAL_PORT_SVCLASS_ID
1985 #define LAN_ACCESS_PROFILE_ID           LAN_ACCESS_SVCLASS_ID
1986 #define DIALUP_NET_PROFILE_ID           DIALUP_NET_SVCLASS_ID
1987 #define IRMC_SYNC_PROFILE_ID            IRMC_SYNC_SVCLASS_ID
1988 #define OBEX_OBJPUSH_PROFILE_ID         OBEX_OBJPUSH_SVCLASS_ID
1989 #define OBEX_FILETRANS_PROFILE_ID       OBEX_FILETRANS_SVCLASS_ID
1990 #define IRMC_SYNC_CMD_PROFILE_ID        IRMC_SYNC_CMD_SVCLASS_ID
1991 #define HEADSET_PROFILE_ID              HEADSET_SVCLASS_ID
1992 #define CORDLESS_TELEPHONY_PROFILE_ID   CORDLESS_TELEPHONY_SVCLASS_ID
1993 #define AUDIO_SOURCE_PROFILE_ID         AUDIO_SOURCE_SVCLASS_ID
1994 #define AUDIO_SINK_PROFILE_ID           AUDIO_SINK_SVCLASS_ID
1995 #define AV_REMOTE_TARGET_PROFILE_ID     AV_REMOTE_TARGET_SVCLASS_ID
1996 #define ADVANCED_AUDIO_PROFILE_ID       ADVANCED_AUDIO_SVCLASS_ID
1997 #define AV_REMOTE_PROFILE_ID            AV_REMOTE_SVCLASS_ID
1998 #define VIDEO_CONF_PROFILE_ID           VIDEO_CONF_SVCLASS_ID
1999 #define INTERCOM_PROFILE_ID             INTERCOM_SVCLASS_ID
2000 #define FAX_PROFILE_ID                  FAX_SVCLASS_ID
2001 #define HEADSET_AGW_PROFILE_ID          HEADSET_AGW_SVCLASS_ID
2002 #define WAP_PROFILE_ID                  WAP_SVCLASS_ID
2003 #define WAP_CLIENT_PROFILE_ID           WAP_CLIENT_SVCLASS_ID
2004 #define PANU_PROFILE_ID                 PANU_SVCLASS_ID
2005 #define NAP_PROFILE_ID                  NAP_SVCLASS_ID
2006 #define GN_PROFILE_ID                   GN_SVCLASS_ID
2007 #define DIRECT_PRINTING_PROFILE_ID      DIRECT_PRINTING_SVCLASS_ID
2008 #define REFERENCE_PRINTING_PROFILE_ID   REFERENCE_PRINTING_SVCLASS_ID
2009 #define IMAGING_PROFILE_ID              IMAGING_SVCLASS_ID
2010 #define IMAGING_RESPONDER_PROFILE_ID    IMAGING_RESPONDER_SVCLASS_ID
2011 #define IMAGING_ARCHIVE_PROFILE_ID      IMAGING_ARCHIVE_SVCLASS_ID
2012 #define IMAGING_REFOBJS_PROFILE_ID      IMAGING_REFOBJS_SVCLASS_ID
2013 #define HANDSFREE_PROFILE_ID            HANDSFREE_SVCLASS_ID
2014 #define HANDSFREE_AGW_PROFILE_ID        HANDSFREE_AGW_SVCLASS_ID
2015 #define DIRECT_PRT_REFOBJS_PROFILE_ID   DIRECT_PRT_REFOBJS_SVCLASS_ID
2016 #define REFLECTED_UI_PROFILE_ID         REFLECTED_UI_SVCLASS_ID
2017 #define BASIC_PRINTING_PROFILE_ID       BASIC_PRINTING_SVCLASS_ID
2018 #define PRINTING_STATUS_PROFILE_ID      PRINTING_STATUS_SVCLASS_ID
2019 #define HID_PROFILE_ID                  HID_SVCLASS_ID
2020 #define HCR_PROFILE_ID                  HCR_SCAN_SVCLASS_ID
2021 #define HCR_PRINT_PROFILE_ID            HCR_PRINT_SVCLASS_ID
2022 #define HCR_SCAN_PROFILE_ID             HCR_SCAN_SVCLASS_ID
2023 #define CIP_PROFILE_ID                  CIP_SVCLASS_ID
2024 #define VIDEO_CONF_GW_PROFILE_ID        VIDEO_CONF_GW_SVCLASS_ID
2025 #define UDI_MT_PROFILE_ID               UDI_MT_SVCLASS_ID
2026 #define UDI_TA_PROFILE_ID               UDI_TA_SVCLASS_ID
2027 #define AV_PROFILE_ID                   AV_SVCLASS_ID
2028 #define SAP_PROFILE_ID                  SAP_SVCLASS_ID
2029 #define PBAP_PCE_PROFILE_ID             PBAP_PCE_SVCLASS_ID
2030 #define PBAP_PSE_PROFILE_ID             PBAP_PSE_SVCLASS_ID
2031 #define PBAP_PROFILE_ID                 PBAP_SVCLASS_ID
2032 #define PNP_INFO_PROFILE_ID             PNP_INFO_SVCLASS_ID
2033 #define GENERIC_NETWORKING_PROFILE_ID   GENERIC_NETWORKING_SVCLASS_ID
2034 #define GENERIC_FILETRANS_PROFILE_ID    GENERIC_FILETRANS_SVCLASS_ID
2035 #define GENERIC_AUDIO_PROFILE_ID        GENERIC_AUDIO_SVCLASS_ID
2036 #define GENERIC_TELEPHONY_PROFILE_ID    GENERIC_TELEPHONY_SVCLASS_ID
2037 #define UPNP_PROFILE_ID                 UPNP_SVCLASS_ID
2038 #define UPNP_IP_PROFILE_ID              UPNP_IP_SVCLASS_ID
2039 #define UPNP_PAN_PROFILE_ID             UPNP_PAN_SVCLASS_ID
2040 #define UPNP_LAP_PROFILE_ID             UPNP_LAP_SVCLASS_ID
2041 #define UPNP_L2CAP_PROFILE_ID           UPNP_L2CAP_SVCLASS_ID
2042 #define VIDEO_SOURCE_PROFILE_ID         VIDEO_SOURCE_SVCLASS_ID
2043 #define VIDEO_SINK_PROFILE_ID           VIDEO_SINK_SVCLASS_ID
2044 #define VIDEO_DISTRIBUTION_PROFILE_ID   VIDEO_DISTRIBUTION_SVCLASS_ID
2045 #define MDP_PROFILE_ID                  MDP_SVCLASS_ID
2046 #define MDP_SOURCE_PROFILE_ID           MDP_SROUCE_SVCLASS_ID
2047 #define MDP_SINK_PROFILE_ID             MDP_SINK_SVCLASS_ID
2048 #define APPLE_AGENT_PROFILE_ID          APPLE_AGENT_SVCLASS_ID
2049
2050 /* Data Representation */
2051 enum bt_sdp_data_type {
2052     SDP_DTYPE_NIL       = 0 << 3,
2053     SDP_DTYPE_UINT      = 1 << 3,
2054     SDP_DTYPE_SINT      = 2 << 3,
2055     SDP_DTYPE_UUID      = 3 << 3,
2056     SDP_DTYPE_STRING    = 4 << 3,
2057     SDP_DTYPE_BOOL      = 5 << 3,
2058     SDP_DTYPE_SEQ       = 6 << 3,
2059     SDP_DTYPE_ALT       = 7 << 3,
2060     SDP_DTYPE_URL       = 8 << 3,
2061 };
2062
2063 enum bt_sdp_data_size {
2064     SDP_DSIZE_1         = 0,
2065     SDP_DSIZE_2,
2066     SDP_DSIZE_4,
2067     SDP_DSIZE_8,
2068     SDP_DSIZE_16,
2069     SDP_DSIZE_NEXT1,
2070     SDP_DSIZE_NEXT2,
2071     SDP_DSIZE_NEXT4,
2072     SDP_DSIZE_MASK = SDP_DSIZE_NEXT4,
2073 };
2074
2075 enum bt_sdp_cmd {
2076     SDP_ERROR_RSP               = 0x01,
2077     SDP_SVC_SEARCH_REQ          = 0x02,
2078     SDP_SVC_SEARCH_RSP          = 0x03,
2079     SDP_SVC_ATTR_REQ            = 0x04,
2080     SDP_SVC_ATTR_RSP            = 0x05,
2081     SDP_SVC_SEARCH_ATTR_REQ     = 0x06,
2082     SDP_SVC_SEARCH_ATTR_RSP     = 0x07,
2083 };
2084
2085 enum bt_sdp_errorcode {
2086     SDP_INVALID_VERSION         = 0x0001,
2087     SDP_INVALID_RECORD_HANDLE   = 0x0002,
2088     SDP_INVALID_SYNTAX          = 0x0003,
2089     SDP_INVALID_PDU_SIZE        = 0x0004,
2090     SDP_INVALID_CSTATE          = 0x0005,
2091 };
2092
2093 /*
2094  * String identifiers are based on the SDP spec stating that
2095  * "base attribute id of the primary (universal) language must be 0x0100"
2096  *
2097  * Other languages should have their own offset; e.g.:
2098  * #define XXXLangBase yyyy
2099  * #define AttrServiceName_XXX  0x0000+XXXLangBase
2100  */
2101 #define SDP_PRIMARY_LANG_BASE           0x0100
2102
2103 enum bt_sdp_attribute_id {
2104     SDP_ATTR_RECORD_HANDLE                      = 0x0000,
2105     SDP_ATTR_SVCLASS_ID_LIST                    = 0x0001,
2106     SDP_ATTR_RECORD_STATE                       = 0x0002,
2107     SDP_ATTR_SERVICE_ID                         = 0x0003,
2108     SDP_ATTR_PROTO_DESC_LIST                    = 0x0004,
2109     SDP_ATTR_BROWSE_GRP_LIST                    = 0x0005,
2110     SDP_ATTR_LANG_BASE_ATTR_ID_LIST             = 0x0006,
2111     SDP_ATTR_SVCINFO_TTL                        = 0x0007,
2112     SDP_ATTR_SERVICE_AVAILABILITY               = 0x0008,
2113     SDP_ATTR_PFILE_DESC_LIST                    = 0x0009,
2114     SDP_ATTR_DOC_URL                            = 0x000a,
2115     SDP_ATTR_CLNT_EXEC_URL                      = 0x000b,
2116     SDP_ATTR_ICON_URL                           = 0x000c,
2117     SDP_ATTR_ADD_PROTO_DESC_LIST                = 0x000d,
2118
2119     SDP_ATTR_SVCNAME_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 0,
2120     SDP_ATTR_SVCDESC_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 1,
2121     SDP_ATTR_SVCPROV_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 2,
2122
2123     SDP_ATTR_GROUP_ID                           = 0x0200,
2124     SDP_ATTR_IP_SUBNET                          = 0x0200,
2125
2126     /* SDP */
2127     SDP_ATTR_VERSION_NUM_LIST                   = 0x0200,
2128     SDP_ATTR_SVCDB_STATE                        = 0x0201,
2129
2130     SDP_ATTR_SERVICE_VERSION                    = 0x0300,
2131     SDP_ATTR_EXTERNAL_NETWORK                   = 0x0301,
2132     SDP_ATTR_SUPPORTED_DATA_STORES_LIST         = 0x0301,
2133     SDP_ATTR_FAX_CLASS1_SUPPORT                 = 0x0302,
2134     SDP_ATTR_REMOTE_AUDIO_VOLUME_CONTROL        = 0x0302,
2135     SDP_ATTR_FAX_CLASS20_SUPPORT                = 0x0303,
2136     SDP_ATTR_SUPPORTED_FORMATS_LIST             = 0x0303,
2137     SDP_ATTR_FAX_CLASS2_SUPPORT                 = 0x0304,
2138     SDP_ATTR_AUDIO_FEEDBACK_SUPPORT             = 0x0305,
2139     SDP_ATTR_NETWORK_ADDRESS                    = 0x0306,
2140     SDP_ATTR_WAP_GATEWAY                        = 0x0307,
2141     SDP_ATTR_HOMEPAGE_URL                       = 0x0308,
2142     SDP_ATTR_WAP_STACK_TYPE                     = 0x0309,
2143     SDP_ATTR_SECURITY_DESC                      = 0x030a,
2144     SDP_ATTR_NET_ACCESS_TYPE                    = 0x030b,
2145     SDP_ATTR_MAX_NET_ACCESSRATE                 = 0x030c,
2146     SDP_ATTR_IP4_SUBNET                         = 0x030d,
2147     SDP_ATTR_IP6_SUBNET                         = 0x030e,
2148     SDP_ATTR_SUPPORTED_CAPABILITIES             = 0x0310,
2149     SDP_ATTR_SUPPORTED_FEATURES                 = 0x0311,
2150     SDP_ATTR_SUPPORTED_FUNCTIONS                = 0x0312,
2151     SDP_ATTR_TOTAL_IMAGING_DATA_CAPACITY        = 0x0313,
2152     SDP_ATTR_SUPPORTED_REPOSITORIES             = 0x0314,
2153
2154     /* PnP Information */
2155     SDP_ATTR_SPECIFICATION_ID                   = 0x0200,
2156     SDP_ATTR_VENDOR_ID                          = 0x0201,
2157     SDP_ATTR_PRODUCT_ID                         = 0x0202,
2158     SDP_ATTR_VERSION                            = 0x0203,
2159     SDP_ATTR_PRIMARY_RECORD                     = 0x0204,
2160     SDP_ATTR_VENDOR_ID_SOURCE                   = 0x0205,
2161
2162     /* BT HID */
2163     SDP_ATTR_DEVICE_RELEASE_NUMBER              = 0x0200,
2164     SDP_ATTR_PARSER_VERSION                     = 0x0201,
2165     SDP_ATTR_DEVICE_SUBCLASS                    = 0x0202,
2166     SDP_ATTR_COUNTRY_CODE                       = 0x0203,
2167     SDP_ATTR_VIRTUAL_CABLE                      = 0x0204,
2168     SDP_ATTR_RECONNECT_INITIATE                 = 0x0205,
2169     SDP_ATTR_DESCRIPTOR_LIST                    = 0x0206,
2170     SDP_ATTR_LANG_ID_BASE_LIST                  = 0x0207,
2171     SDP_ATTR_SDP_DISABLE                        = 0x0208,
2172     SDP_ATTR_BATTERY_POWER                      = 0x0209,
2173     SDP_ATTR_REMOTE_WAKEUP                      = 0x020a,
2174     SDP_ATTR_PROFILE_VERSION                    = 0x020b,
2175     SDP_ATTR_SUPERVISION_TIMEOUT                = 0x020c,
2176     SDP_ATTR_NORMALLY_CONNECTABLE               = 0x020d,
2177     SDP_ATTR_BOOT_DEVICE                        = 0x020e,
2178 };
2179
2180 #endif