1 # Trace events for debugging and performance instrumentation
3 # This file is processed by the tracetool script during the build.
5 # To add a new trace event:
7 # 1. Choose a name for the trace event. Declare its arguments and format
10 # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11 # trace_multiwrite_cb(). The source file must #include "trace.h".
13 # Format of a trace event:
15 # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
17 # Example: g_malloc(size_t size) "size %zu"
19 # The "disable" keyword will build without the trace event.
21 # The <name> must be a valid as a C function name.
23 # Types should be standard C types. Use void * for pointers because the trace
24 # system may not have the necessary headers included.
26 # The <format-string> should be a sprintf()-compatible format string.
30 qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
31 qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p"
32 qemu_vfree(void *ptr) "ptr %p"
33 qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu"
36 virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
37 virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
38 virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
39 virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
40 virtio_irq(void *vq) "vq %p"
41 virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
42 virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
44 # hw/virtio/virtio-rng.c
45 virtio_rng_guest_not_ready(void *rng) "rng %p: guest not ready"
46 virtio_rng_pushed(void *rng, size_t len) "rng %p: %zd bytes pushed"
47 virtio_rng_request(void *rng, size_t size, unsigned quota) "rng %p: %zd bytes requested, %u bytes quota left"
49 # hw/char/virtio-serial-bus.c
50 virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
51 virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
52 virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
53 virtio_serial_handle_control_message_port(unsigned int port) "port %u"
55 # hw/char/virtio-console.c
56 virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
57 virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
58 virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
61 bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
62 bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
65 bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
66 bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
67 bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
68 bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
69 bdrv_aio_write_zeroes(void *bs, int64_t sector_num, int nb_sectors, int flags, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d flags %#x opaque %p"
70 bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
71 bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
72 bdrv_co_readv_no_serialising(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
73 bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
74 bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector, int flags) "bs %p sector_num %"PRId64" nb_sectors %d flags %#x"
75 bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d"
78 stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
79 stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
82 commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
83 commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
86 mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p"
87 mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64
88 mirror_before_flush(void *s) "s %p"
89 mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64
90 mirror_before_sleep(void *s, int64_t cnt, int synced, uint64_t delay_ns) "s %p dirty count %"PRId64" synced %d delay %"PRIu64"ns"
91 mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d"
92 mirror_iteration_done(void *s, int64_t sector_num, int nb_sectors, int ret) "s %p sector_num %"PRId64" nb_sectors %d ret %d"
93 mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d"
94 mirror_yield_in_flight(void *s, int64_t sector_num, int in_flight) "s %p sector_num %"PRId64" in_flight %d"
95 mirror_yield_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
96 mirror_break_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
99 backup_do_cow_enter(void *job, int64_t start, int64_t sector_num, int nb_sectors) "job %p start %"PRId64" sector_num %"PRId64" nb_sectors %d"
100 backup_do_cow_return(void *job, int64_t sector_num, int nb_sectors, int ret) "job %p sector_num %"PRId64" nb_sectors %d ret %d"
101 backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64
102 backup_do_cow_process(void *job, int64_t start) "job %p start %"PRId64
103 backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
104 backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
107 qmp_block_job_cancel(void *job) "job %p"
108 qmp_block_job_pause(void *job) "job %p"
109 qmp_block_job_resume(void *job) "job %p"
110 qmp_block_job_complete(void *job) "job %p"
111 block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
112 qmp_block_stream(void *bs, void *job) "bs %p job %p"
114 # hw/block/virtio-blk.c
115 virtio_blk_req_complete(void *req, int status) "req %p status %d"
116 virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
117 virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
118 virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
119 virtio_blk_submit_multireq(void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) "mrb %p start %d num_reqs %d offset %"PRIu64" size %zu is_write %d"
121 # hw/block/dataplane/virtio-blk.c
122 virtio_blk_data_plane_start(void *s) "dataplane %p"
123 virtio_blk_data_plane_stop(void *s) "dataplane %p"
124 virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
127 thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
128 thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
129 thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
133 paio_submit_co(int64_t sector_num, int nb_sectors, int type) "sector_num %"PRId64" nb_sectors %d type %d"
134 paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
137 cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
138 cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
141 # Since requests are raised via monitor, not many tracepoints are needed.
142 balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
143 virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
144 virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
145 virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
146 virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
148 # hw/intc/apic_common.c
149 cpu_set_apic_base(uint64_t val) "%016"PRIx64
150 cpu_get_apic_base(uint64_t val) "%016"PRIx64
152 apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
153 apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
154 apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
157 apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
158 apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
159 apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
160 apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
163 cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
164 cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
165 cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
166 cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
169 nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
170 nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
172 # hw/misc/eccmemctl.c
173 ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
174 ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
175 ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
176 ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
177 ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
178 ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
179 ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
180 ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
181 ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
182 ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
183 ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
184 ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
185 ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
186 ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
187 ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
188 ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
189 ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
190 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
193 fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
194 fw_cfg_read(void *s, uint64_t ret) "%p = %"PRIx64
195 fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
197 # hw/block/hd-geometry.c
198 hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) "blk %p LCHS %d %d %d"
199 hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "blk %p CHS %u %u %u trans %d"
201 # hw/display/jazz_led.c
202 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
203 jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
206 xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs %#x abs %d"
207 xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
210 lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
211 lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
213 # hw/intc/slavio_intctl.c
214 slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
215 slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
216 slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
217 slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
218 slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
219 slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
220 slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
221 slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
222 slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
223 slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
224 slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
225 slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
228 ps2_put_keycode(void *opaque, int keycode) "%p keycode %d"
229 ps2_read_data(void *opaque) "%p"
230 ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
231 ps2_reset_keyboard(void *s) "%p"
232 ps2_write_keyboard(void *opaque, int val) "%p val %d"
233 ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
234 ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs %#x"
235 ps2_mouse_event_disabled(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
236 ps2_mouse_event(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
237 ps2_mouse_fake_event(void *opaque) "%p"
238 ps2_write_mouse(void *opaque, int val) "%p val %d"
239 ps2_kbd_reset(void *opaque) "%p"
240 ps2_mouse_reset(void *opaque) "%p"
241 ps2_kbd_init(void *s) "%p"
242 ps2_mouse_init(void *s) "%p"
244 # hw/misc/slavio_misc.c
245 slavio_misc_update_irq_raise(void) "Raise IRQ"
246 slavio_misc_update_irq_lower(void) "Lower IRQ"
247 slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
248 slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
249 slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
250 slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
251 slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
252 slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
253 slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
254 slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
255 slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
256 slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
257 slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
258 apc_mem_writeb(uint32_t val) "Write power management %02x"
259 apc_mem_readb(uint32_t ret) "Read power management %02x"
260 slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
261 slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
262 slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
263 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
265 # hw/timer/slavio_timer.c
266 slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
267 slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
268 slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
269 slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
270 slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
271 slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
272 slavio_timer_mem_writel_counter_invalid(void) "not user timer"
273 slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
274 slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
275 slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
276 slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
277 slavio_timer_mem_writel_mode_invalid(void) "not system timer"
278 slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
281 jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
282 jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
283 rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
284 rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
286 # hw/dma/sparc32_dma.c
287 ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
288 ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
289 sparc32_dma_set_irq_raise(void) "Raise IRQ"
290 sparc32_dma_set_irq_lower(void) "Lower IRQ"
291 espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
292 espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
293 sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
294 sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
295 sparc32_dma_enable_raise(void) "Raise DMA enable"
296 sparc32_dma_enable_lower(void) "Lower DMA enable"
299 sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
300 sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
301 sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
302 sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
304 # hw/dma/sun4m_iommu.c
305 sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
306 sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
307 sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
308 sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
309 sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
310 sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
311 sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
312 sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
315 usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
316 usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s"
319 usb_port_claim(int bus, const char *port) "bus %d, port %s"
320 usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s"
321 usb_port_detach(int bus, const char *port) "bus %d, port %s"
322 usb_port_release(int bus, const char *port) "bus %d, port %s"
325 usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at %x"
326 usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d"
327 usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x"
328 usb_ohci_iso_td_relative_frame_number_neg(int rel) "ISO_TD R=%d < 0"
329 usb_ohci_iso_td_relative_frame_number_big(int rel, int count) "ISO_TD R=%d > FC=%d"
330 usb_ohci_iso_td_bad_direction(int dir) "Bad direction %d"
331 usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) "ISO_TD bp 0x%.8x be 0x%.8x"
332 usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) "ISO_TD cc != not accessed 0x%.8x 0x%.8x"
333 usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) "ISO_TD start_offset=0x%.8x > next_offset=0x%.8x"
334 usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndir %s len %zu ret %d"
335 usb_ohci_iso_td_data_overrun(int ret, ssize_t len) "DataOverrun %d > %zu"
336 usb_ohci_iso_td_data_underrun(int ret) "DataUnderrun %d"
337 usb_ohci_iso_td_nak(int ret) "got NAK/STALL %d"
338 usb_ohci_iso_td_bad_response(int ret) "Bad device response %d"
339 usb_ohci_port_attach(int index) "port #%d"
340 usb_ohci_port_detach(int index) "port #%d"
341 usb_ohci_port_wakeup(int index) "port #%d"
342 usb_ohci_port_suspend(int index) "port #%d"
343 usb_ohci_port_reset(int index) "port #%d"
344 usb_ohci_remote_wakeup(const char *s) "%s: SUSPEND->RESUME"
345 usb_ohci_reset(const char *s) "%s"
346 usb_ohci_start(const char *s) "%s: USB Operational"
347 usb_ohci_resume(const char *s) "%s: USB Resume"
348 usb_ohci_stop(const char *s) "%s: USB Suspended"
349 usb_ohci_exit(const char *s) "%s"
350 usb_ohci_set_ctl(const char *s, uint32_t new_state) "%s: new state 0x%x"
351 usb_ohci_td_underrun(void) ""
352 usb_ohci_td_dev_error(void) ""
353 usb_ohci_td_nak(void) ""
354 usb_ohci_td_stall(void) ""
355 usb_ohci_td_babble(void) ""
356 usb_ohci_td_bad_device_response(int rc) "%d"
357 usb_ohci_td_read_error(uint32_t addr) "TD read error at %x"
358 usb_ohci_td_bad_direction(int dir) "Bad direction %d"
359 usb_ohci_td_skip_async(void) ""
360 usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) " TD @ 0x%.8x %" PRId64 " of %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x"
361 usb_ohci_td_pkt_short(const char *dir, const char *buf) "%s data: %s"
362 usb_ohci_td_pkt_full(const char *dir, const char *buf) "%s data: %s"
363 usb_ohci_td_too_many_pending(void) ""
364 usb_ohci_td_packet_status(int status) "status=%d"
365 usb_ohci_ed_read_error(uint32_t addr) "ED read error at %x"
366 usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=0x%.8x"
367 usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) "fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u"
368 usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at %x"
369 usb_ohci_mem_read_unaligned(uint32_t addr) "at %x"
370 usb_ohci_mem_read_bad_offset(uint32_t addr) "%x"
371 usb_ohci_mem_write_unaligned(uint32_t addr) "at %x"
372 usb_ohci_mem_write_bad_offset(uint32_t addr) "%x"
373 usb_ohci_process_lists(uint32_t head, uint32_t cur) "head %x, cur %x"
374 usb_ohci_bus_eof_timer_failed(const char *name) "%s: timer_new_ns failed"
375 usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) "%s: FrameInterval = 0x%x (%u)"
376 usb_ohci_hub_power_up(void) "powered up all ports"
377 usb_ohci_hub_power_down(void) "powered down all ports"
378 usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64
379 usb_ohci_die(void) ""
380 usb_ohci_async_complete(void) ""
383 usb_ehci_reset(void) "=== RESET ==="
384 usb_ehci_unrealize(void) "=== UNREALIZE ==="
385 usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
386 usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
387 usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
388 usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x"
389 usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x"
390 usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)"
391 usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
392 usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
393 usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
394 usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
395 usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
396 usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
397 usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
398 usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
399 usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
400 usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
401 usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
402 usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
403 usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
404 usb_ehci_port_suspend(uint32_t port) "port #%d"
405 usb_ehci_port_wakeup(uint32_t port) "port #%d"
406 usb_ehci_port_resume(uint32_t port) "port #%d"
407 usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
408 usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
409 usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
410 usb_ehci_guest_bug(const char *reason) "%s"
411 usb_ehci_doorbell_ring(void) ""
412 usb_ehci_doorbell_ack(void) ""
413 usb_ehci_dma_error(void) ""
416 usb_uhci_reset(void) "=== RESET ==="
417 usb_uhci_exit(void) "=== EXIT ==="
418 usb_uhci_schedule_start(void) ""
419 usb_uhci_schedule_stop(void) ""
420 usb_uhci_frame_start(uint32_t num) "nr %d"
421 usb_uhci_frame_stop_bandwidth(void) ""
422 usb_uhci_frame_loop_stop_idle(void) ""
423 usb_uhci_frame_loop_continue(void) ""
424 usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
425 usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
426 usb_uhci_queue_add(uint32_t token) "token 0x%x"
427 usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s"
428 usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
429 usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
430 usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
431 usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d"
432 usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
433 usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
434 usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
435 usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
436 usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
437 usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
438 usb_uhci_qh_load(uint32_t qh) "qh 0x%x"
439 usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
440 usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
441 usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
442 usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
443 usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
446 usb_xhci_reset(void) "=== RESET ==="
447 usb_xhci_exit(void) "=== EXIT ==="
448 usb_xhci_run(void) ""
449 usb_xhci_stop(void) ""
450 usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
451 usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
452 usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x"
453 usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
454 usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
455 usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
456 usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x"
457 usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
458 usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
459 usb_xhci_irq_intx(uint32_t level) "level %d"
460 usb_xhci_irq_msi(uint32_t nr) "nr %d"
461 usb_xhci_irq_msix(uint32_t nr) "nr %d"
462 usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
463 usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
464 usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
465 usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
466 usb_xhci_port_reset(uint32_t port, bool warm) "port %d, warm %d"
467 usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d"
468 usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits %x"
469 usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
470 usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
471 usb_xhci_slot_address(uint32_t slotid, const char *port) "slotid %d, port %s"
472 usb_xhci_slot_configure(uint32_t slotid) "slotid %d"
473 usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d"
474 usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
475 usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
476 usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
477 usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr %016" PRIx64
478 usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d"
479 usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
480 usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
481 usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) "slotid %d, epid %d, %s -> %s"
482 usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d"
483 usb_xhci_xfer_async(void *xfer) "%p"
484 usb_xhci_xfer_nak(void *xfer) "%p"
485 usb_xhci_xfer_retry(void *xfer) "%p"
486 usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d"
487 usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
488 usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)"
491 usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
492 usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
493 usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
494 usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
495 usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
496 usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d"
497 usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0x%x, len %d, ret %d"
498 usb_set_addr(int addr) "dev %d"
499 usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
500 usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
501 usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
502 usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
505 usb_hub_reset(int addr) "dev %d"
506 usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d"
507 usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x"
508 usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
509 usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
510 usb_hub_attach(int addr, int nr) "dev %d, port %d"
511 usb_hub_detach(int addr, int nr) "dev %d, port %d"
512 usb_hub_status_report(int addr, int status) "dev %d, status 0x%x"
515 usb_uas_reset(int addr) "dev %d"
516 usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x"
517 usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x"
518 usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x"
519 usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
520 usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
521 usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d"
522 usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d"
523 usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d"
524 usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x"
525 usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d"
526 usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
529 usb_mtp_reset(int addr) "dev %d"
530 usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x"
531 usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x"
532 usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x"
533 usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) "dev %d, trans 0x%x, len %d"
534 usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, ep %d, %d/%d"
535 usb_mtp_nak(int dev, uint32_t ep) "dev %d, ep %d"
536 usb_mtp_stall(int dev, const char *reason) "dev %d, reason: %s"
537 usb_mtp_op_get_device_info(int dev) "dev %d"
538 usb_mtp_op_open_session(int dev) "dev %d"
539 usb_mtp_op_close_session(int dev) "dev %d"
540 usb_mtp_op_get_storage_ids(int dev) "dev %d"
541 usb_mtp_op_get_storage_info(int dev) "dev %d"
542 usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
543 usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
544 usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
545 usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
546 usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) "dev %d, handle 0x%x, path %s, off %d, len %d"
547 usb_mtp_op_unknown(int dev, uint32_t code) "dev %d, command code 0x%x"
548 usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
549 usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
550 usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
551 usb_mtp_inotify_event(int dev, const char *path, uint32_t mask, const char *s) "dev %d, path %s mask 0x%x event %s"
553 # hw/usb/host-libusb.c
554 usb_host_open_started(int bus, int addr) "dev %d:%d"
555 usb_host_open_success(int bus, int addr) "dev %d:%d"
556 usb_host_open_failure(int bus, int addr) "dev %d:%d"
557 usb_host_close(int bus, int addr) "dev %d:%d"
558 usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
559 usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
560 usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
561 usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
562 usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
563 usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d"
564 usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d"
565 usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
566 usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
567 usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d"
568 usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
569 usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
570 usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
571 usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
572 usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d"
573 usb_host_reset(int bus, int addr) "dev %d:%d"
574 usb_host_auto_scan_enabled(void)
575 usb_host_auto_scan_disabled(void)
576 usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
577 usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d"
578 usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d"
579 usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
582 scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
583 scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
584 scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
585 scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
586 scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
587 scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
588 scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d"
589 scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
590 scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
591 scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
592 scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
593 scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x"
594 scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
595 scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
596 scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
597 scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
600 vm_state_notify(int running, int reason) "running %d reason %d"
601 load_file(const char *name, const char *path) "name %s location %s"
602 runstate_set(int new_state) "new state %d"
603 system_wakeup_request(int reason) "reason=%d"
604 qemu_system_shutdown_request(void) ""
605 qemu_system_powerdown_request(void) ""
608 qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d"
609 qcow2_writev_done_req(void *co, int ret) "co %p ret %d"
610 qcow2_writev_start_part(void *co) "co %p"
611 qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d"
612 qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
614 # block/qcow2-cluster.c
615 qcow2_alloc_clusters_offset(void *co, uint64_t offset, int num) "co %p offset %" PRIx64 " num %d"
616 qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
617 qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
618 qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d"
619 qcow2_cluster_alloc_phys(void *co) "co %p"
620 qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d"
622 qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d"
623 qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d"
624 qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
625 qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
626 qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
628 # block/qcow2-cache.c
629 qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
630 qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
631 qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
632 qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d"
633 qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d"
634 qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d"
636 # block/qed-l2-cache.c
637 qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
638 qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
639 qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
642 qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
643 qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
644 qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
645 qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
648 qed_need_check_timer_cb(void *s) "s %p"
649 qed_start_need_check_timer(void *s) "s %p"
650 qed_cancel_need_check_timer(void *s) "s %p"
651 qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
652 qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x"
653 qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
654 qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
655 qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
656 qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
657 qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
658 qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
660 # hw/display/g364fb.c
661 g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
662 g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
664 # hw/timer/grlib_gptimer.c
665 grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
666 grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
667 grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
668 grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
669 grlib_gptimer_hit(int id) "timer:%d HIT"
670 grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
671 grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
673 # hw/intc/grlib_irqmp.c
674 grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
675 grlib_irqmp_ack(int intno) "interrupt:%d"
676 grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
677 grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
678 grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
680 # hw/char/grlib_apbuart.c
681 grlib_apbuart_event(int event) "event:%d"
682 grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
683 grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
686 leon3_set_irq(int intno) "Set CPU IRQ %d"
687 leon3_reset_irq(int intno) "Reset CPU IRQ %d"
690 spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
691 spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
692 spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
693 spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
694 spice_vmc_event(int event) "spice vmc event %d"
697 lm32_pic_raise_irq(void) "Raise CPU interrupt"
698 lm32_pic_lower_irq(void) "Lower CPU interrupt"
699 lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
700 lm32_pic_set_im(uint32_t im) "im 0x%08x"
701 lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
702 lm32_pic_get_im(uint32_t im) "im 0x%08x"
703 lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
705 # hw/char/lm32_juart.c
706 lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
707 lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
708 lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
709 lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
711 # hw/timer/lm32_timer.c
712 lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
713 lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
714 lm32_timer_hit(void) "timer hit"
715 lm32_timer_irq_state(int level) "irq state %d"
717 # hw/char/lm32_uart.c
718 lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
719 lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
720 lm32_uart_irq_state(int level) "irq state %d"
723 mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status %x resid %d"
724 mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
725 mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
726 mptsas_irq_intx(void *dev, int level) "dev %p level %d"
727 mptsas_irq_msi(void *dev) "dev %p "
728 mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
729 mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x"
730 mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
731 mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
732 mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d context 0x%08x\n"
733 mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) "dev %p dev %d:%d:%d length %"PRIu64""
734 mptsas_reset(void *dev) "dev %p "
735 mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
736 mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
737 mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd %x"
738 mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x"
740 # hw/scsi/mptconfig.c
741 mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
742 mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
745 megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
746 megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
747 megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
748 megasas_initq_mapped(uint64_t pa) "queue already mapped at %" PRIx64
749 megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
750 megasas_qf_mapped(unsigned int index) "skip mapped frame %x"
751 megasas_qf_new(unsigned int index, uint64_t frame) "frame %x addr %" PRIx64
752 megasas_qf_busy(unsigned long pa) "all frames busy for frame %lx"
753 megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame %x count %d context %" PRIx64 " head %x tail %x busy %d"
754 megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head %x tail %x busy %d"
755 megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
756 megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
757 megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context %" PRIx64 " head %x tail %x busy %d"
758 megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
759 megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd %x"
760 megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
761 megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x"
762 megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
763 megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
764 megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
765 megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
766 megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
767 megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x"
768 megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
769 megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
770 megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
771 megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: status %x, len %u/%u"
772 megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: status %x, residual %d"
773 megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
774 megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
775 megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
776 megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
777 megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes"
778 megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
779 megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
780 megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
781 megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
782 megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
783 megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
784 megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
785 megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s"
786 megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
787 megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd %x lun %d"
788 megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD %x"
789 megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
790 megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
791 megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d"
792 megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: xfer len %ld, max %ld"
793 megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
794 megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld"
795 megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
796 megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
797 megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
798 megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d"
799 megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: query flags %x"
800 megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d"
801 megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags %x"
802 megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d"
803 megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld"
804 megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame %x"
805 megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64
806 megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
807 megasas_reset(int fw_state) "firmware state %x"
808 megasas_init(int sges, int cmds, const char *mode) "Using %d sges, %d cmds, %s mode"
809 megasas_msix_raise(int vector) "vector %d"
810 megasas_msi_raise(int vector) "vector %d"
811 megasas_irq_lower(void) "INTx"
812 megasas_irq_raise(void) "INTx"
813 megasas_intr_enabled(void) "Interrupts enabled"
814 megasas_intr_disabled(void) "Interrupts disabled"
815 megasas_msix_enabled(int vector) "vector %d"
816 megasas_msi_enabled(int vector) "vector %d"
817 megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x"
818 megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
819 megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x"
820 megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
822 # hw/audio/milkymist-ac97.c
823 milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
824 milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
825 milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
826 milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
827 milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
828 milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
829 milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
830 milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
831 milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
832 milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
834 # hw/misc/milkymist-hpdmc.c
835 milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
836 milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
838 # hw/sd/milkymist-memcard.c
839 milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
840 milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
842 # hw/net/milkymist-minimac2.c
843 milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
844 milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
845 milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
846 milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
847 milkymist_minimac2_tx_frame(uint32_t length) "length %u"
848 milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
849 milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
850 milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
851 milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
852 milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
854 # hw/misc/milkymist-pfpu.c
855 milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
856 milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
857 milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
858 milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
860 # hw/input/milkymist-softusb.c
861 milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
862 milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
863 milkymist_softusb_mevt(uint8_t m) "m %d"
864 milkymist_softusb_kevt(uint8_t m) "m %d"
865 milkymist_softusb_pulse_irq(void) "Pulse IRQ"
867 # hw/timer/milkymist-sysctl.c
868 milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
869 milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
870 milkymist_sysctl_icap_write(uint32_t value) "value %08x"
871 milkymist_sysctl_start_timer0(void) "Start timer0"
872 milkymist_sysctl_stop_timer0(void) "Stop timer0"
873 milkymist_sysctl_start_timer1(void) "Start timer1"
874 milkymist_sysctl_stop_timer1(void) "Stop timer1"
875 milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
876 milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
878 # hw/display/milkymist-tmu2.c
879 milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
880 milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
881 milkymist_tmu2_start(void) "Start TMU"
882 milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
884 # hw/char/milkymist-uart.c
885 milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
886 milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
887 milkymist_uart_raise_irq(void) "Raise IRQ"
888 milkymist_uart_lower_irq(void) "Lower IRQ"
890 # hw/display/milkymist-vgafb.c
891 milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
892 milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
895 mipsnet_send(uint32_t size) "sending len=%u"
896 mipsnet_receive(uint32_t size) "receiving len=%u"
897 mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
898 mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
899 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
902 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
903 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
904 pc87312_info_floppy(uint32_t base) "base 0x%x"
905 pc87312_info_ide(uint32_t base) "base 0x%x"
906 pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
907 pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
909 # hw/scsi/vmw_pvscsi.c
910 pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d"
911 pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d"
912 pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64
913 pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64
914 pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")"
915 pvscsi_update_irq_msi(void) "sending MSI notification"
916 pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx"
917 pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx"
918 pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u"
919 pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu"
920 pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)"
921 pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x"
922 pvscsi_command_complete_data_run(void) "not all data required for command transferred"
923 pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes"
924 pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul"
925 pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64
926 pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected"
927 pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected"
928 pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx"
929 pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored"
930 pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]"
931 pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived"
932 pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u"
933 pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64
934 pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x"
935 pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64
936 pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64
937 pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64
938 pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes"
939 pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d"
940 pvscsi_state(const char* state) "starting %s ..."
941 pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64
942 pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u"
945 xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
946 xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
947 xen_ioreq_server_create(uint32_t id) "id: %u"
948 xen_ioreq_server_destroy(uint32_t id) "id: %u"
949 xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
950 xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
951 xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
952 xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
953 xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
954 xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
955 xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
956 handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
957 handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
958 handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
959 cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
960 cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
961 cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
962 cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
965 xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
966 xen_remap_bucket(uint64_t index) "index %#"PRIx64
967 xen_map_cache_return(void* ptr) "%p"
969 # hw/i386/xen/xen_platform.c
970 xen_platform_log(char *s) "xen platform: %s"
973 qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
974 qemu_coroutine_yield(void *from, void *to) "from %p to %p"
975 qemu_coroutine_terminate(void *co) "self %p"
977 # qemu-coroutine-lock.c
978 qemu_co_queue_run_restart(void *co) "co %p"
979 qemu_co_queue_next(void *nxt) "next %p"
980 qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
981 qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
982 qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
983 qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
986 escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
987 escc_get_queue(char channel, int val) "channel %c get 0x%02x"
988 escc_update_irq(int irq) "IRQ = %d"
989 escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
990 escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
991 escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
992 escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
993 escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
994 escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
995 escc_sunkbd_event_in(int ch, const char *name, int down) "QKeyCode 0x%2.2x [%s], down %d"
996 escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x"
997 escc_kbd_command(int val) "Command %d"
998 escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
1001 esp_error_fifo_overrun(void) "FIFO overrun"
1002 esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
1003 esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
1004 esp_raise_irq(void) "Raise IRQ"
1005 esp_lower_irq(void) "Lower IRQ"
1006 esp_dma_enable(void) "Raise enable"
1007 esp_dma_disable(void) "Lower enable"
1008 esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
1009 esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
1010 esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
1011 esp_write_response(uint32_t status) "Transfer status (status=%d)"
1012 esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
1013 esp_command_complete(void) "SCSI Command complete"
1014 esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
1015 esp_command_complete_fail(void) "Command failed"
1016 esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
1017 esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
1018 esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
1019 esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
1020 esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
1021 esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
1022 esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
1023 esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
1024 esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
1025 esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
1026 esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
1027 esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
1028 esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
1029 esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
1030 esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
1031 esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
1032 esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
1033 esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
1034 esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
1037 esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
1038 esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
1039 esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
1040 esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
1041 esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
1042 esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
1043 esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
1044 esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
1045 esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
1046 esp_pci_dma_start(uint32_t val) "START (%.8x)"
1047 esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
1048 esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
1051 handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
1052 monitor_protocol_emitter(void *mon) "mon %p"
1053 monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
1054 monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
1055 monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
1056 monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
1058 # hw/net/opencores_eth.c
1059 open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
1060 open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
1061 open_eth_update_irq(uint32_t v) "IRQ <- %x"
1062 open_eth_receive(unsigned len) "RX: len: %u"
1063 open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
1064 open_eth_receive_reject(void) "RX: rejected"
1065 open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
1066 open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
1067 open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
1068 open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
1069 open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
1070 open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
1072 # hw/9pfs/virtio-9p.c
1073 v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
1074 v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
1075 v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
1076 v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
1077 v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
1078 v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
1079 v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
1080 v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
1081 v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
1082 v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
1083 v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
1084 v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
1085 v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
1086 v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
1087 v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
1088 v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
1089 v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
1090 v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
1091 v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
1092 v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
1093 v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
1094 v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
1095 v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
1096 v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
1097 v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
1098 v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
1099 v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
1100 v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
1101 v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
1102 v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
1103 v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
1104 v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
1105 v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
1106 v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
1107 v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
1108 v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
1109 v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
1110 v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
1111 v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
1112 v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
1113 v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
1114 v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
1115 v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
1116 v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
1118 # target-sparc/mmu_helper.c
1119 mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
1120 mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
1121 mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
1122 mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
1123 mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
1124 mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
1125 mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
1126 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
1128 # target-sparc/int64_helper.c
1129 int_helper_set_softint(uint32_t softint) "new %08x"
1130 int_helper_clear_softint(uint32_t softint) "new %08x"
1131 int_helper_write_softint(uint32_t softint) "new %08x"
1133 # target-sparc/int32_helper.c
1134 int_helper_icache_freeze(void) "Instruction cache: freeze"
1135 int_helper_dcache_freeze(void) "Data cache: freeze"
1137 # target-sparc/win_helper.c
1138 win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
1139 win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
1140 win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
1141 win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
1142 win_helper_done(uint32_t tl) "tl=%d"
1143 win_helper_retry(uint32_t tl) "tl=%d"
1146 dma_blk_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d"
1147 dma_aio_cancel(void *dbs) "dbs=%p"
1148 dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
1149 dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
1150 dma_map_wait(void *dbs) "dbs=%p"
1153 console_gfx_new(void) ""
1154 console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
1155 console_putchar_unhandled(int ch) "unhandled escape character '%c'"
1156 console_txt_new(int w, int h) "%dx%d"
1157 console_select(int nr) "%d"
1158 console_refresh(int interval) "interval %d ms"
1159 displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
1160 displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
1161 displaysurface_create_pixman(void *display_surface) "surface=%p"
1162 displaysurface_free(void *display_surface) "surface=%p"
1163 displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
1164 displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
1165 ppm_save(const char *filename, void *display_surface) "%s surface=%p"
1168 gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
1169 gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
1170 gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
1171 gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
1172 gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
1175 vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
1176 vnc_key_map_init(const char *layout) "%s"
1177 vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
1178 vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
1179 vnc_key_sync_numlock(bool on) "%d"
1180 vnc_key_sync_capslock(bool on) "%d"
1183 input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
1184 input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
1185 input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
1186 input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
1187 input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
1188 input_event_sync(void) ""
1189 input_mouse_mode(int absolute) "absolute %d"
1191 # hw/display/vmware_vga.c
1192 vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1193 vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1194 vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1195 vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1196 vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1197 vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1198 vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
1200 # hw/display/virtio-gpu.c
1201 virtio_gpu_features(bool virgl) "virgl %d"
1202 virtio_gpu_cmd_get_display_info(void) ""
1203 virtio_gpu_cmd_get_caps(void) ""
1204 virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
1205 virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
1206 virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
1207 virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
1208 virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
1209 virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
1210 virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
1211 virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
1212 virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
1213 virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
1214 virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
1215 virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
1216 virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
1217 virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
1218 virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
1219 virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
1220 virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
1221 virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
1223 # migration/savevm.c
1224 qemu_loadvm_state_section(unsigned int section_type) "%d"
1225 qemu_loadvm_state_section_command(int ret) "%d"
1226 qemu_loadvm_state_section_partend(uint32_t section_id) "%u"
1227 qemu_loadvm_state_main(void) ""
1228 qemu_loadvm_state_main_quit_parent(void) ""
1229 qemu_loadvm_state_post_main(int ret) "%d"
1230 qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr, uint32_t instance_id, uint32_t version_id) "%u(%s) %u %u"
1231 qemu_savevm_send_packaged(void) ""
1232 loadvm_handle_cmd_packaged(unsigned int length) "%u"
1233 loadvm_handle_cmd_packaged_main(int ret) "%d"
1234 loadvm_handle_cmd_packaged_received(int ret) "%d"
1235 loadvm_postcopy_handle_advise(void) ""
1236 loadvm_postcopy_handle_listen(void) ""
1237 loadvm_postcopy_handle_run(void) ""
1238 loadvm_postcopy_handle_run_cpu_sync(void) ""
1239 loadvm_postcopy_handle_run_vmstart(void) ""
1240 loadvm_postcopy_ram_handle_discard(void) ""
1241 loadvm_postcopy_ram_handle_discard_end(void) ""
1242 loadvm_postcopy_ram_handle_discard_header(const char *ramid, uint16_t len) "%s: %ud"
1243 loadvm_process_command(uint16_t com, uint16_t len) "com=0x%x len=%d"
1244 loadvm_process_command_ping(uint32_t val) "%x"
1245 postcopy_ram_listen_thread_exit(void) ""
1246 postcopy_ram_listen_thread_start(void) ""
1247 qemu_savevm_send_postcopy_advise(void) ""
1248 qemu_savevm_send_postcopy_ram_discard(const char *id, uint16_t len) "%s: %ud"
1249 savevm_command_send(uint16_t command, uint16_t len) "com=0x%x len=%d"
1250 savevm_section_start(const char *id, unsigned int section_id) "%s, section_id %u"
1251 savevm_section_end(const char *id, unsigned int section_id, int ret) "%s, section_id %u -> %d"
1252 savevm_section_skip(const char *id, unsigned int section_id) "%s, section_id %u"
1253 savevm_send_open_return_path(void) ""
1254 savevm_send_ping(uint32_t val) "%x"
1255 savevm_send_postcopy_listen(void) ""
1256 savevm_send_postcopy_run(void) ""
1257 savevm_state_begin(void) ""
1258 savevm_state_header(void) ""
1259 savevm_state_iterate(void) ""
1260 savevm_state_cleanup(void) ""
1261 savevm_state_complete_precopy(void) ""
1262 vmstate_save(const char *idstr, const char *vmsd_name) "%s, %s"
1263 vmstate_load(const char *idstr, const char *vmsd_name) "%s, %s"
1264 qemu_announce_self_iter(const char *mac) "%s"
1267 vmstate_load_field_error(const char *field, int ret) "field \"%s\" load failed, ret = %d"
1268 vmstate_load_state(const char *name, int version_id) "%s v%d"
1269 vmstate_load_state_end(const char *name, const char *reason, int val) "%s %s/%d"
1270 vmstate_load_state_field(const char *name, const char *field) "%s:%s"
1271 vmstate_subsection_load(const char *parent) "%s"
1272 vmstate_subsection_load_bad(const char *parent, const char *sub) "%s: %s"
1273 vmstate_subsection_load_good(const char *parent) "%s"
1276 qemu_file_fclose(void) ""
1279 get_queued_page(const char *block_name, uint64_t tmp_offset, uint64_t ram_addr) "%s/%" PRIx64 " ram_addr=%" PRIx64
1280 get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, uint64_t ram_addr, int sent) "%s/%" PRIx64 " ram_addr=%" PRIx64 " (sent=%d)"
1281 migration_bitmap_sync_start(void) ""
1282 migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64
1283 migration_throttle(void) ""
1284 ram_load_postcopy_loop(uint64_t addr, int flags) "@%" PRIx64 " %x"
1285 ram_postcopy_send_discard_bitmap(void) ""
1286 ram_save_queue_pages(const char *rbname, size_t start, size_t len) "%s: start: %zx len: %zx"
1289 disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
1290 disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
1291 qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
1292 qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
1293 qxl_destroy_primary(int qid) "%d"
1294 qxl_enter_vga_mode(int qid) "%d"
1295 qxl_exit_vga_mode(int qid) "%d"
1296 qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
1297 qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
1298 qxl_interface_attach_worker(int qid) "%d"
1299 qxl_interface_get_init_info(int qid) "%d"
1300 qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
1301 qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
1302 qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
1303 qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
1304 qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
1305 qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
1306 qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
1307 qxl_io_read_unexpected(int qid) "%d"
1308 qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
1309 qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
1310 qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
1311 qxl_post_load(int qid, const char *mode) "%d %s"
1312 qxl_pre_load(int qid) "%d"
1313 qxl_pre_save(int qid) "%d"
1314 qxl_reset_surfaces(int qid) "%d"
1315 qxl_ring_command_check(int qid, const char *mode) "%d %s"
1316 qxl_ring_command_get(int qid, const char *mode) "%d %s"
1317 qxl_ring_command_req_notification(int qid) "%d"
1318 qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
1319 qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
1320 qxl_ring_cursor_req_notification(int qid) "%d"
1321 qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
1322 qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
1323 qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
1324 qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
1325 qxl_soft_reset(int qid) "%d"
1326 qxl_spice_destroy_surfaces_complete(int qid) "%d"
1327 qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
1328 qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
1329 qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
1330 qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
1331 qxl_spice_monitors_config(int qid) "%d"
1332 qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
1333 qxl_spice_oom(int qid) "%d"
1334 qxl_spice_reset_cursor(int qid) "%d"
1335 qxl_spice_reset_image_cache(int qid) "%d"
1336 qxl_spice_reset_memslots(int qid) "%d"
1337 qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
1338 qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
1339 qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
1340 qxl_send_events(int qid, uint32_t events) "%d %d"
1341 qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
1342 qxl_set_guest_bug(int qid) "%d"
1343 qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
1344 qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
1345 qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
1346 qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
1347 qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
1348 qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
1350 # ui/spice-display.c
1351 qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
1352 qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
1353 qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
1354 qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
1355 qemu_spice_wakeup(uint32_t qid) "%d"
1356 qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
1358 # hw/display/qxl-render.c
1359 qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
1360 qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
1361 qxl_render_update_area_done(void *cookie) "%p"
1363 # hw/ppc/spapr_pci.c
1364 spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
1365 spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
1366 spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
1367 spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
1368 spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
1369 spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
1370 spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
1373 pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
1374 pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
1377 pcnet_s_reset(void *s) "s=%p"
1378 pcnet_user_int(void *s) "s=%p"
1379 pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d"
1380 pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=%#"PRIx64
1381 pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d"
1382 pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]"
1384 # hw/net/pcnet-pci.c
1385 pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
1386 pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
1387 pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=%#"PRIx64" size=%d"
1388 pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=%#"PRIx64" data=%#"PRIx64" size=%d"
1389 pcnet_mmio_writeb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1390 pcnet_mmio_writew(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1391 pcnet_mmio_writel(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1392 pcnet_mmio_readb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1393 pcnet_mmio_readw(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1394 pcnet_mmio_readl(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1397 xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
1398 xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
1399 xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
1400 xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x"
1401 xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x"
1402 xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]"
1403 xics_masked_pending(void) "set_irq_msi: masked pending"
1404 xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]"
1405 xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
1406 xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
1407 xics_ics_eoi(int nr) "ics_eoi: irq %#x"
1408 xics_alloc(int src, int irq) "source#%d, irq %d"
1409 xics_alloc_block(int src, int first, int num, bool lsi, int align) "source#%d, first irq %d, %d irqs, lsi=%d, alignnum %d"
1410 xics_ics_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs"
1411 xics_ics_free_warn(int src, int irq) "Source#%d, irq %d is already free"
1414 spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
1415 spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
1417 # hw/ppc/spapr_hcall.c
1418 spapr_cas_pvr_try(uint32_t pvr) "%x"
1419 spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
1421 # hw/ppc/spapr_iommu.c
1422 spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
1423 spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
1424 spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
1425 spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
1426 spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
1427 spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
1428 spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
1429 spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
1430 spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
1431 spapr_iommu_new_table(uint64_t liobn, void *tcet, void *table, int fd) "liobn=%"PRIx64" tcet=%p table=%p fd=%d"
1434 ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
1437 prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
1438 prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
1441 buffer_resize(const char *buf, size_t olen, size_t len) "%s: old %zd, new %zd"
1442 buffer_move_empty(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s"
1443 buffer_move(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s"
1444 buffer_free(const char *buf, size_t len) "%s: capacity %zd"
1447 hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx"
1448 hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
1449 hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
1451 # target-s390x/mmu_helper.c
1452 get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
1453 set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
1455 # target-s390x/ioinst.c
1456 ioinst(const char *insn) "IOINST: %s"
1457 ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
1458 ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
1459 ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
1462 css_enable_facility(const char *facility) "CSS: enable %s"
1463 css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
1464 css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
1465 css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
1466 css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
1467 css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
1468 css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
1470 # hw/s390x/virtio-ccw.c
1471 virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
1472 virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
1474 # hw/intc/s390_flic_kvm.c
1475 flic_create_device(int err) "flic: create device failed %d"
1476 flic_no_device_api(int err) "flic: no Device Contral API support %d"
1477 flic_reset_failed(int err) "flic: reset failed %d"
1480 await_return_path_close_on_source_close(void) ""
1481 await_return_path_close_on_source_joining(void) ""
1482 migrate_set_state(int new_state) "new state %d"
1483 migrate_fd_cleanup(void) ""
1484 migrate_fd_error(void) ""
1485 migrate_fd_cancel(void) ""
1486 migrate_handle_rp_req_pages(const char *rbname, size_t start, size_t len) "in %s at %zx len %zx"
1487 migrate_pending(uint64_t size, uint64_t max, uint64_t post, uint64_t nonpost) "pending size %" PRIu64 " max %" PRIu64 " (post=%" PRIu64 " nonpost=%" PRIu64 ")"
1488 migrate_send_rp_message(int msg_type, uint16_t len) "%d: len %d"
1489 migration_completion_file_err(void) ""
1490 migration_completion_postcopy_end(void) ""
1491 migration_completion_postcopy_end_after_complete(void) ""
1492 migration_completion_postcopy_end_before_rp(void) ""
1493 migration_completion_postcopy_end_after_rp(int rp_error) "%d"
1494 migration_thread_after_loop(void) ""
1495 migration_thread_file_err(void) ""
1496 migration_thread_setup_complete(void) ""
1497 open_return_path_on_source(void) ""
1498 open_return_path_on_source_continue(void) ""
1499 postcopy_start(void) ""
1500 postcopy_start_set_run(void) ""
1501 source_return_path_thread_bad_end(void) ""
1502 source_return_path_thread_end(void) ""
1503 source_return_path_thread_entry(void) ""
1504 source_return_path_thread_loop_top(void) ""
1505 source_return_path_thread_pong(uint32_t val) "%x"
1506 source_return_path_thread_shut(uint32_t val) "%x"
1507 migrate_global_state_post_load(const char *state) "loaded state: %s"
1508 migrate_global_state_pre_save(const char *state) "saved state: %s"
1509 migration_thread_low_pending(uint64_t pending) "%" PRIu64
1510 migrate_state_too_big(void) ""
1511 migrate_transferred(uint64_t tranferred, uint64_t time_spent, double bandwidth, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %g max_size %" PRId64
1512 process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d"
1513 process_incoming_migration_co_postcopy_end_main(void) ""
1516 qemu_rdma_accept_incoming_migration(void) ""
1517 qemu_rdma_accept_incoming_migration_accepted(void) ""
1518 qemu_rdma_accept_pin_state(bool pin) "%d"
1519 qemu_rdma_accept_pin_verbsc(void *verbs) "Verbs context after listen: %p"
1520 qemu_rdma_block_for_wrid_miss(const char *wcompstr, int wcomp, const char *gcompstr, uint64_t req) "A Wanted wrid %s (%d) but got %s (%" PRIu64 ")"
1521 qemu_rdma_block_for_wrid_miss_b(const char *wcompstr, int wcomp, const char *gcompstr, uint64_t req) "B Wanted wrid %s (%d) but got %s (%" PRIu64 ")"
1522 qemu_rdma_cleanup_disconnect(void) ""
1523 qemu_rdma_cleanup_waiting_for_disconnect(void) ""
1524 qemu_rdma_close(void) ""
1525 qemu_rdma_connect_pin_all_requested(void) ""
1526 qemu_rdma_connect_pin_all_outcome(bool pin) "%d"
1527 qemu_rdma_dest_init_trying(const char *host, const char *ip) "%s => %s"
1528 qemu_rdma_dump_gid(const char *who, const char *src, const char *dst) "%s Source GID: %s, Dest GID: %s"
1529 qemu_rdma_exchange_get_response_start(const char *desc) "CONTROL: %s receiving..."
1530 qemu_rdma_exchange_get_response_none(const char *desc, int type) "Surprise: got %s (%d)"
1531 qemu_rdma_exchange_send_issue_callback(void) ""
1532 qemu_rdma_exchange_send_waiting(const char *desc) "Waiting for response %s"
1533 qemu_rdma_exchange_send_received(const char *desc) "Response %s received."
1534 qemu_rdma_fill(size_t control_len, size_t size) "RDMA %zd of %zd bytes already in buffer"
1535 qemu_rdma_init_ram_blocks(int blocks) "Allocated %d local ram block structures"
1536 qemu_rdma_poll_recv(const char *compstr, int64_t comp, int64_t id, int sent) "completion %s #%" PRId64 " received (%" PRId64 ") left %d"
1537 qemu_rdma_poll_write(const char *compstr, int64_t comp, int left, uint64_t block, uint64_t chunk, void *local, void *remote) "completions %s (%" PRId64 ") left %d, block %" PRIu64 ", chunk: %" PRIu64 " %p %p"
1538 qemu_rdma_poll_other(const char *compstr, int64_t comp, int left) "other completion %s (%" PRId64 ") received left %d"
1539 qemu_rdma_post_send_control(const char *desc) "CONTROL: sending %s.."
1540 qemu_rdma_register_and_get_keys(uint64_t len, void *start) "Registering %" PRIu64 " bytes @ %p"
1541 qemu_rdma_registration_handle_compress(int64_t length, int index, int64_t offset) "Zapping zero chunk: %" PRId64 " bytes, index %d, offset %" PRId64
1542 qemu_rdma_registration_handle_finished(void) ""
1543 qemu_rdma_registration_handle_ram_blocks(void) ""
1544 qemu_rdma_registration_handle_ram_blocks_loop(const char *name, uint64_t offset, uint64_t length, void *local_host_addr, unsigned int src_index) "%s: @%" PRIx64 "/%" PRIu64 " host:@%p src_index: %u"
1545 qemu_rdma_registration_handle_register(int requests) "%d requests"
1546 qemu_rdma_registration_handle_register_loop(int req, int index, uint64_t addr, uint64_t chunks) "Registration request (%d): index %d, current_addr %" PRIu64 " chunks: %" PRIu64
1547 qemu_rdma_registration_handle_register_rkey(int rkey) "%x"
1548 qemu_rdma_registration_handle_unregister(int requests) "%d requests"
1549 qemu_rdma_registration_handle_unregister_loop(int count, int index, uint64_t chunk) "Unregistration request (%d): index %d, chunk %" PRIu64
1550 qemu_rdma_registration_handle_unregister_success(uint64_t chunk) "%" PRIu64
1551 qemu_rdma_registration_handle_wait(void) ""
1552 qemu_rdma_registration_start(uint64_t flags) "%" PRIu64
1553 qemu_rdma_registration_stop(uint64_t flags) "%" PRIu64
1554 qemu_rdma_registration_stop_ram(void) ""
1555 qemu_rdma_resolve_host_trying(const char *host, const char *ip) "Trying %s => %s"
1556 qemu_rdma_signal_unregister_append(uint64_t chunk, int pos) "Appending unregister chunk %" PRIu64 " at position %d"
1557 qemu_rdma_signal_unregister_already(uint64_t chunk) "Unregister chunk %" PRIu64 " already in queue"
1558 qemu_rdma_unregister_waiting_inflight(uint64_t chunk) "Cannot unregister inflight chunk: %" PRIu64
1559 qemu_rdma_unregister_waiting_proc(uint64_t chunk, int pos) "Processing unregister for chunk: %" PRIu64 " at position %d"
1560 qemu_rdma_unregister_waiting_send(uint64_t chunk) "Sending unregister for chunk: %" PRIu64
1561 qemu_rdma_unregister_waiting_complete(uint64_t chunk) "Unregister for chunk: %" PRIu64 " complete."
1562 qemu_rdma_write_flush(int sent) "sent total: %d"
1563 qemu_rdma_write_one_block(int count, int block, uint64_t chunk, uint64_t current, uint64_t len, int nb_sent, int nb_chunks) "(%d) Not clobbering: block: %d chunk %" PRIu64 " current %" PRIu64 " len %" PRIu64 " %d %d"
1564 qemu_rdma_write_one_post(uint64_t chunk, long addr, long remote, uint32_t len) "Posting chunk: %" PRIu64 ", addr: %lx remote: %lx, bytes %" PRIu32
1565 qemu_rdma_write_one_queue_full(void) ""
1566 qemu_rdma_write_one_recvregres(int mykey, int theirkey, uint64_t chunk) "Received registration result: my key: %x their key %x, chunk %" PRIu64
1567 qemu_rdma_write_one_sendreg(uint64_t chunk, int len, int index, int64_t offset) "Sending registration request chunk %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64
1568 qemu_rdma_write_one_top(uint64_t chunks, uint64_t size) "Writing %" PRIu64 " chunks, (%" PRIu64 " MB)"
1569 qemu_rdma_write_one_zero(uint64_t chunk, int len, int index, int64_t offset) "Entire chunk is zero, sending compress: %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64
1570 rdma_add_block(const char *block_name, int block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Added Block: '%s':%d, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d"
1571 rdma_block_notification_handle(const char *name, int index) "%s at %d"
1572 rdma_delete_block(void *block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Deleted Block: %p, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d"
1573 rdma_start_incoming_migration(void) ""
1574 rdma_start_incoming_migration_after_dest_init(void) ""
1575 rdma_start_incoming_migration_after_rdma_listen(void) ""
1576 rdma_start_outgoing_migration_after_rdma_connect(void) ""
1577 rdma_start_outgoing_migration_after_rdma_source_init(void) ""
1579 # migration/postcopy-ram.c
1580 postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) "%s mask words sent=%d in %d commands"
1581 postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) "%s:%lx/%lx"
1582 postcopy_ram_discard_range(void *start, size_t length) "%p,+%zx"
1583 postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
1584 postcopy_init_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
1585 postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=%zx length=%zx"
1586 postcopy_place_page(void *host_addr) "host=%p"
1587 postcopy_place_page_zero(void *host_addr) "host=%p"
1588 postcopy_ram_enable_notify(void) ""
1589 postcopy_ram_fault_thread_entry(void) ""
1590 postcopy_ram_fault_thread_exit(void) ""
1591 postcopy_ram_fault_thread_quit(void) ""
1592 postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock, size_t offset) "Request for HVA=%" PRIx64 " rb=%s offset=%zx"
1593 postcopy_ram_incoming_cleanup_closeuf(void) ""
1594 postcopy_ram_incoming_cleanup_entry(void) ""
1595 postcopy_ram_incoming_cleanup_exit(void) ""
1596 postcopy_ram_incoming_cleanup_join(void) ""
1599 kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
1600 kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
1601 kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
1602 kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
1603 kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
1604 kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
1605 kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
1608 kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
1609 kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
1611 # TCG related tracing (mostly disabled by default)
1613 disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
1614 disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
1615 disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
1618 translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
1621 memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
1622 memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
1623 memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
1624 memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
1625 memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
1626 memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
1629 object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
1630 object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
1632 # hw/i386/xen/xen_pvdevice.c
1633 xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
1634 xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
1637 pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
1638 pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
1641 vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
1642 vfio_intx_eoi(const char *name) " (%s) EOI"
1643 vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
1644 vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
1645 vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
1646 vfio_intx_enable(const char *name) " (%s)"
1647 vfio_intx_disable(const char *name) " (%s)"
1648 vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
1649 vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
1650 vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
1651 vfio_msix_enable(const char *name) " (%s)"
1652 vfio_msix_pba_disable(const char *name) " (%s)"
1653 vfio_msix_pba_enable(const char *name) " (%s)"
1654 vfio_msix_disable(const char *name) " (%s)"
1655 vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
1656 vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
1657 vfio_msi_disable(const char *name) " (%s)"
1658 vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
1659 vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
1660 vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
1661 vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
1662 vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
1663 vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
1664 vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
1665 vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
1666 vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
1667 vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
1668 vfio_check_pm_reset(const char *name) "%s Supports PM reset"
1669 vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
1670 vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
1671 vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
1672 vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
1673 vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
1674 vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
1675 vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
1676 vfio_initfn(const char *name, int group_id) " (%s) group %d"
1677 vfio_pci_reset(const char *name) " (%s)"
1678 vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
1679 vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
1680 vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
1681 vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
1682 vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
1683 vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
1685 # hw/vfio/pci-quirks.
1686 vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
1687 vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1688 vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1689 vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1690 vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
1691 vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
1692 vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
1693 vfio_quirk_ati_3c3_probe(const char *name) "%s"
1694 vfio_quirk_ati_bar4_probe(const char *name) "%s"
1695 vfio_quirk_ati_bar2_probe(const char *name) "%s"
1696 vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
1697 vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
1698 vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
1699 vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
1700 vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
1701 vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
1702 vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
1703 vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
1704 vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
1705 vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
1706 vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
1707 vfio_quirk_rtl8168_probe(const char *name) "%s"
1709 vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
1710 vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
1711 vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
1712 vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
1713 vfio_quirk_ati_bonaire_reset(const char *name) "%s"
1716 # hw/vfio/vfio-common.c
1717 vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
1718 vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
1719 vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
1720 vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
1721 vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
1722 vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
1723 vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
1724 vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
1725 vfio_disconnect_container(int fd) "close container->fd=%d"
1726 vfio_put_group(int fd) "close group->fd=%d"
1727 vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
1728 vfio_put_base_device(int fd) "close vdev->fd=%d"
1729 vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
1730 vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
1731 vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
1732 vfio_region_exit(const char *name, int index) "Device %s, region %d"
1733 vfio_region_finalize(const char *name, int index) "Device %s, region %d"
1734 vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
1736 # hw/vfio/platform.c
1737 vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
1738 vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
1739 vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
1740 vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
1741 vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
1742 vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
1743 vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
1744 vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
1745 vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
1746 vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
1749 #hw/acpi/memory_hotplug.c
1750 mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
1751 mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
1752 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
1753 mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
1754 mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
1755 mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
1756 mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
1757 mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
1758 mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
1759 mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
1760 mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
1761 mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
1762 mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
1763 mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
1764 mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
1767 mhp_pc_dimm_assigned_slot(int slot) "0x%d"
1768 mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
1770 # target-s390x/kvm.c
1771 kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
1772 kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
1773 kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
1774 kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
1777 i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
1779 # target-s390x/cpu.c
1780 cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
1781 cpu_halt(int cpu_index) "halting cpu %d"
1782 cpu_unhalt(int cpu_index) "unhalting cpu %d"
1784 # hw/arm/virt-acpi-build.c
1785 virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
1788 alpha_pci_iack_write(void) ""
1791 alsa_revents(int revents) "revents = %d"
1792 alsa_pollout(int i, int fd) "i = %d fd = %d"
1793 alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
1794 alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
1795 alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
1796 alsa_xrun_out(void) "Recovering from playback xrun"
1797 alsa_xrun_in(void) "Recovering from capture xrun"
1798 alsa_resume_out(void) "Resuming suspended output stream"
1799 alsa_resume_in(void) "Resuming suspended input stream"
1800 alsa_no_frames(int state) "No frames available and ALSA state is %d"
1803 oss_version(int version) "OSS version = %#x"
1804 oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
1807 qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%s"
1808 qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) "TLS creds path creds=%p filename=%s path=%s"
1810 # crypto/tlscredsanon.c
1811 qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s"
1813 # crypto/tlscredsx509.c
1814 qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s"
1815 qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) "TLS creds x509 check basic constraints creds=%p file=%s status=%d"
1816 qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d"
1817 qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int status, const char *usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%s critical=%d"
1818 qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load cert creds=%p isServer=%d file=%s"
1819 qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list creds=%p file=%s"
1821 # crypto/tlssession.c
1822 qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *aclname, int endpoint) "TLS session new session=%p creds=%p hostname=%s aclname=%s endpoint=%d"
1825 vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
1827 # linux-user/signal.c
1828 user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1829 user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1830 user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1831 user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1832 user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
1833 user_handle_signal(void *env, int target_sig) "env=%p signal %d"
1834 user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
1835 user_queue_signal(void *env, int target_sig) "env=%p signal %d"
1836 user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
1839 qio_task_new(void *task, void *source, void *func, void *opaque) "Task new task=%p source=%p func=%p opaque=%p"
1840 qio_task_complete(void *task) "Task complete task=%p"
1841 qio_task_abort(void *task) "Task abort task=%p"
1842 qio_task_thread_start(void *task, void *worker, void *opaque) "Task thread start task=%p worker=%p opaque=%p"
1843 qio_task_thread_run(void *task) "Task thread run task=%p"
1844 qio_task_thread_exit(void *task) "Task thread exit task=%p"
1845 qio_task_thread_result(void *task) "Task thread result task=%p"
1847 # io/channel-socket.c
1848 qio_channel_socket_new(void *ioc) "Socket new ioc=%p"
1849 qio_channel_socket_new_fd(void *ioc, int fd) "Socket new ioc=%p fd=%d"
1850 qio_channel_socket_connect_sync(void *ioc, void *addr) "Socket connect sync ioc=%p addr=%p"
1851 qio_channel_socket_connect_async(void *ioc, void *addr) "Socket connect async ioc=%p addr=%p"
1852 qio_channel_socket_connect_fail(void *ioc) "Socket connect fail ioc=%p"
1853 qio_channel_socket_connect_complete(void *ioc, int fd) "Socket connect complete ioc=%p fd=%d"
1854 qio_channel_socket_listen_sync(void *ioc, void *addr) "Socket listen sync ioc=%p addr=%p"
1855 qio_channel_socket_listen_async(void *ioc, void *addr) "Socket listen async ioc=%p addr=%p"
1856 qio_channel_socket_listen_fail(void *ioc) "Socket listen fail ioc=%p"
1857 qio_channel_socket_listen_complete(void *ioc, int fd) "Socket listen complete ioc=%p fd=%d"
1858 qio_channel_socket_dgram_sync(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram sync ioc=%p localAddr=%p remoteAddr=%p"
1859 qio_channel_socket_dgram_async(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram async ioc=%p localAddr=%p remoteAddr=%p"
1860 qio_channel_socket_dgram_fail(void *ioc) "Socket dgram fail ioc=%p"
1861 qio_channel_socket_dgram_complete(void *ioc, int fd) "Socket dgram complete ioc=%p fd=%d"
1862 qio_channel_socket_accept(void *ioc) "Socket accept start ioc=%p"
1863 qio_channel_socket_accept_fail(void *ioc) "Socket accept fail ioc=%p"
1864 qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) "Socket accept complete ioc=%p cioc=%p fd=%d"
1867 qio_channel_file_new_fd(void *ioc, int fd) "File new fd ioc=%p fd=%d"
1868 qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) "File new fd ioc=%p path=%s flags=%d mode=%d fd=%d"
1871 qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) "TLS new client ioc=%p master=%p creds=%p hostname=%s"
1872 qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) "TLS new client ioc=%p master=%p creds=%p acltname=%s"
1873 qio_channel_tls_handshake_start(void *ioc) "TLS handshake start ioc=%p"
1874 qio_channel_tls_handshake_pending(void *ioc, int status) "TLS handshake pending ioc=%p status=%d"
1875 qio_channel_tls_handshake_fail(void *ioc) "TLS handshake fail ioc=%p"
1876 qio_channel_tls_handshake_complete(void *ioc) "TLS handshake complete ioc=%p"
1877 qio_channel_tls_credentials_allow(void *ioc) "TLS credentials allow ioc=%p"
1878 qio_channel_tls_credentials_deny(void *ioc) "TLS credentials deny ioc=%p"
1880 # io/channel-websock.c
1881 qio_channel_websock_new_server(void *ioc, void *master) "Websock new client ioc=%p master=%p"
1882 qio_channel_websock_handshake_start(void *ioc) "Websock handshake start ioc=%p"
1883 qio_channel_websock_handshake_pending(void *ioc, int status) "Websock handshake pending ioc=%p status=%d"
1884 qio_channel_websock_handshake_reply(void *ioc) "Websock handshake reply ioc=%p"
1885 qio_channel_websock_handshake_fail(void *ioc) "Websock handshake fail ioc=%p"
1886 qio_channel_websock_handshake_complete(void *ioc) "Websock handshake complete ioc=%p"
1888 # io/channel-command.c
1889 qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) "Command new pid ioc=%p writefd=%d readfd=%d pid=%d"
1890 qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) "Command new spawn ioc=%p binary=%s flags=%d"
1891 qio_channel_command_abort(void *ioc, int pid) "Command abort ioc=%p pid=%d"
1892 qio_channel_command_wait(void *ioc, int pid, int ret, int status) "Command abort ioc=%p pid=%d ret=%d status=%d"
1894 # hw/timer/aspeed_timer.c
1895 aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1896 aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1897 aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1898 aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1899 aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
1900 aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
1901 aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
1903 # hw/intc/aspeed_vic.c
1904 aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d"
1905 aspeed_vic_update_fiq(int flags) "Raising FIQ: %d"
1906 aspeed_vic_update_irq(int flags) "Raising IRQ: %d"
1907 aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32
1908 aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
1911 gic_enable_irq(int irq) "irq %d enabled"
1912 gic_disable_irq(int irq) "irq %d disabled"
1913 gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x"
1914 gic_update_bestirq(int cpu, int irq, int prio, int priority_mask, int running_priority) "cpu %d irq %d priority %d cpu priority mask %d cpu running priority %d"
1915 gic_update_set_irq(int cpu, const char *name, int level) "cpu[%d]: %s = %d"
1916 gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d"
1918 # hw/net/net_rx_pkt.c
1919 net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu"
1920 net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation"
1921 net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet"
1922 net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) "UDP packet without checksum"
1923 net_rx_pkt_l4_csum_validate_ip4_fragment(void) "IP4 fragment"
1924 net_rx_pkt_l4_csum_validate_ip4_udp(void) "IP4/UDP packet"
1925 net_rx_pkt_l4_csum_validate_ip4_tcp(void) "IP4/TCP packet"
1926 net_rx_pkt_l4_csum_validate_ip6_udp(void) "IP6/UDP packet"
1927 net_rx_pkt_l4_csum_validate_ip6_tcp(void) "IP6/TCP packet"
1928 net_rx_pkt_l4_csum_validate_csum(bool csum_valid) "Checksum valid: %d"
1930 net_rx_pkt_l4_csum_calc_entry(void) "Starting L4 checksum calculation"
1931 net_rx_pkt_l4_csum_calc_ip4_udp(void) "IP4/UDP packet"
1932 net_rx_pkt_l4_csum_calc_ip4_tcp(void) "IP4/TCP packet"
1933 net_rx_pkt_l4_csum_calc_ip6_udp(void) "IP6/UDP packet"
1934 net_rx_pkt_l4_csum_calc_ip6_tcp(void) "IP6/TCP packet"
1935 net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) "Pseudo-header: checksum counter %u, length %u"
1936 net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X"
1938 net_rx_pkt_l4_csum_fix_entry(void) "Starting L4 checksum correction"
1939 net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) "TCP packet, L4 cso: %u"
1940 net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) "UDP packet, L4 cso: %u"
1941 net_rx_pkt_l4_csum_fix_not_xxp(void) "Not an IP4 packet"
1942 net_rx_pkt_l4_csum_fix_ip4_fragment(void) "IP4 fragment"
1943 net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) "UDP packet without checksum"
1944 net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) "L4 Checksum: Offset: %u, value 0x%X"
1946 net_rx_pkt_l3_csum_validate_entry(void) "Starting L3 checksum validation"
1947 net_rx_pkt_l3_csum_validate_not_ip4(void) "Not an IP4 packet"
1948 net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d"
1950 net_rx_pkt_rss_ip4(void) "Calculating IPv4 RSS hash"
1951 net_rx_pkt_rss_ip4_tcp(void) "Calculating IPv4/TCP RSS hash"
1952 net_rx_pkt_rss_ip6_tcp(void) "Calculating IPv6/TCP RSS hash"
1953 net_rx_pkt_rss_ip6(void) "Calculating IPv6 RSS hash"
1954 net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash"
1955 net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X"
1956 net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes"
1958 # hw/net/e1000x_common.c
1959 e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d"
1960 e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X"
1961 e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x"
1962 e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x"
1963 e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] %x"
1964 e1000x_rx_link_down(uint32_t status_reg) "Received packet dropped because the link is down STATUS = %u"
1965 e1000x_rx_disabled(uint32_t rctl_reg) "Received packet dropped because receive is disabled RCTL = %u"
1966 e1000x_rx_oversized(size_t size) "Received packet dropped because it was oversized (%zu bytes)"
1967 e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x"
1968 e1000x_link_negotiation_start(void) "Start link auto negotiation"
1969 e1000x_link_negotiation_done(void) "Auto negotiation is completed"