2 * RAM allocation and memory access
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "exec/page-vary.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
25 #include "qemu/cacheflush.h"
26 #include "qemu/madvise.h"
29 #include "hw/core/tcg-cpu-ops.h"
30 #endif /* CONFIG_TCG */
32 #include "exec/exec-all.h"
33 #include "exec/target_page.h"
34 #include "hw/qdev-core.h"
35 #include "hw/qdev-properties.h"
36 #include "hw/boards.h"
37 #include "hw/xen/xen.h"
38 #include "sysemu/kvm.h"
39 #include "sysemu/tcg.h"
40 #include "sysemu/qtest.h"
41 #include "qemu/timer.h"
42 #include "qemu/config-file.h"
43 #include "qemu/error-report.h"
44 #include "qemu/qemu-print.h"
46 #include "qemu/memalign.h"
47 #include "exec/memory.h"
48 #include "exec/ioport.h"
49 #include "sysemu/dma.h"
50 #include "sysemu/hostmem.h"
51 #include "sysemu/hw_accel.h"
52 #include "sysemu/xen-mapcache.h"
53 #include "trace/trace-root.h"
55 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
56 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "exec/translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
67 #include "qemu/pmem.h"
69 #include "migration/vmstate.h"
71 #include "qemu/range.h"
73 #include "qemu/mmap-alloc.h"
76 #include "monitor/monitor.h"
78 #ifdef CONFIG_LIBDAXCTL
79 #include <daxctl/libdaxctl.h>
82 //#define DEBUG_SUBPAGE
84 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
85 * are protected by the ramlist lock.
87 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
89 static MemoryRegion
*system_memory
;
90 static MemoryRegion
*system_io
;
92 AddressSpace address_space_io
;
93 AddressSpace address_space_memory
;
95 static MemoryRegion io_mem_unassigned
;
97 typedef struct PhysPageEntry PhysPageEntry
;
99 struct PhysPageEntry
{
100 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
102 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
106 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
108 /* Size of the L2 (and L3, etc) page tables. */
109 #define ADDR_SPACE_BITS 64
112 #define P_L2_SIZE (1 << P_L2_BITS)
114 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
116 typedef PhysPageEntry Node
[P_L2_SIZE
];
118 typedef struct PhysPageMap
{
121 unsigned sections_nb
;
122 unsigned sections_nb_alloc
;
124 unsigned nodes_nb_alloc
;
126 MemoryRegionSection
*sections
;
129 struct AddressSpaceDispatch
{
130 MemoryRegionSection
*mru_section
;
131 /* This is a multi-level map on the physical address space.
132 * The bottom level has pointers to MemoryRegionSections.
134 PhysPageEntry phys_map
;
138 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
139 typedef struct subpage_t
{
143 uint16_t sub_section
[];
146 #define PHYS_SECTION_UNASSIGNED 0
148 static void io_mem_init(void);
149 static void memory_map_init(void);
150 static void tcg_log_global_after_sync(MemoryListener
*listener
);
151 static void tcg_commit(MemoryListener
*listener
);
154 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
155 * @cpu: the CPU whose AddressSpace this is
156 * @as: the AddressSpace itself
157 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
158 * @tcg_as_listener: listener for tracking changes to the AddressSpace
160 struct CPUAddressSpace
{
163 struct AddressSpaceDispatch
*memory_dispatch
;
164 MemoryListener tcg_as_listener
;
167 struct DirtyBitmapSnapshot
{
170 unsigned long dirty
[];
173 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
175 static unsigned alloc_hint
= 16;
176 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
177 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
178 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
179 alloc_hint
= map
->nodes_nb_alloc
;
183 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
190 ret
= map
->nodes_nb
++;
192 assert(ret
!= PHYS_MAP_NODE_NIL
);
193 assert(ret
!= map
->nodes_nb_alloc
);
195 e
.skip
= leaf
? 0 : 1;
196 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
197 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
198 memcpy(&p
[i
], &e
, sizeof(e
));
203 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
204 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
208 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
210 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
211 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
213 p
= map
->nodes
[lp
->ptr
];
214 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
216 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
217 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
223 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
229 static void phys_page_set(AddressSpaceDispatch
*d
,
230 hwaddr index
, uint64_t nb
,
233 /* Wildly overreserve - it doesn't matter much. */
234 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
236 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
239 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
240 * and update our entry so we can skip it and go directly to the destination.
242 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
244 unsigned valid_ptr
= P_L2_SIZE
;
249 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
254 for (i
= 0; i
< P_L2_SIZE
; i
++) {
255 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
262 phys_page_compact(&p
[i
], nodes
);
266 /* We can only compress if there's only one child. */
271 assert(valid_ptr
< P_L2_SIZE
);
273 /* Don't compress if it won't fit in the # of bits we have. */
274 if (P_L2_LEVELS
>= (1 << 6) &&
275 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
279 lp
->ptr
= p
[valid_ptr
].ptr
;
280 if (!p
[valid_ptr
].skip
) {
281 /* If our only child is a leaf, make this a leaf. */
282 /* By design, we should have made this node a leaf to begin with so we
283 * should never reach here.
284 * But since it's so simple to handle this, let's do it just in case we
289 lp
->skip
+= p
[valid_ptr
].skip
;
293 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
295 if (d
->phys_map
.skip
) {
296 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
300 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
303 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
304 * the section must cover the entire address space.
306 return int128_gethi(section
->size
) ||
307 range_covers_byte(section
->offset_within_address_space
,
308 int128_getlo(section
->size
), addr
);
311 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
313 PhysPageEntry lp
= d
->phys_map
, *p
;
314 Node
*nodes
= d
->map
.nodes
;
315 MemoryRegionSection
*sections
= d
->map
.sections
;
316 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
319 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
320 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
321 return §ions
[PHYS_SECTION_UNASSIGNED
];
324 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
327 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
328 return §ions
[lp
.ptr
];
330 return §ions
[PHYS_SECTION_UNASSIGNED
];
334 /* Called from RCU critical section */
335 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
337 bool resolve_subpage
)
339 MemoryRegionSection
*section
= qatomic_read(&d
->mru_section
);
342 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
343 !section_covers_addr(section
, addr
)) {
344 section
= phys_page_find(d
, addr
);
345 qatomic_set(&d
->mru_section
, section
);
347 if (resolve_subpage
&& section
->mr
->subpage
) {
348 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
349 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
354 /* Called from RCU critical section */
355 static MemoryRegionSection
*
356 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
357 hwaddr
*plen
, bool resolve_subpage
)
359 MemoryRegionSection
*section
;
363 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
364 /* Compute offset within MemoryRegionSection */
365 addr
-= section
->offset_within_address_space
;
367 /* Compute offset within MemoryRegion */
368 *xlat
= addr
+ section
->offset_within_region
;
372 /* MMIO registers can be expected to perform full-width accesses based only
373 * on their address, without considering adjacent registers that could
374 * decode to completely different MemoryRegions. When such registers
375 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
376 * regions overlap wildly. For this reason we cannot clamp the accesses
379 * If the length is small (as is the case for address_space_ldl/stl),
380 * everything works fine. If the incoming length is large, however,
381 * the caller really has to do the clamping through memory_access_size.
383 if (memory_region_is_ram(mr
)) {
384 diff
= int128_sub(section
->size
, int128_make64(addr
));
385 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
391 * address_space_translate_iommu - translate an address through an IOMMU
392 * memory region and then through the target address space.
394 * @iommu_mr: the IOMMU memory region that we start the translation from
395 * @addr: the address to be translated through the MMU
396 * @xlat: the translated address offset within the destination memory region.
397 * It cannot be %NULL.
398 * @plen_out: valid read/write length of the translated address. It
400 * @page_mask_out: page mask for the translated address. This
401 * should only be meaningful for IOMMU translated
402 * addresses, since there may be huge pages that this bit
403 * would tell. It can be %NULL if we don't care about it.
404 * @is_write: whether the translation operation is for write
405 * @is_mmio: whether this can be MMIO, set true if it can
406 * @target_as: the address space targeted by the IOMMU
407 * @attrs: transaction attributes
409 * This function is called from RCU critical section. It is the common
410 * part of flatview_do_translate and address_space_translate_cached.
412 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
415 hwaddr
*page_mask_out
,
418 AddressSpace
**target_as
,
421 MemoryRegionSection
*section
;
422 hwaddr page_mask
= (hwaddr
)-1;
426 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
430 if (imrc
->attrs_to_index
) {
431 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
434 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
435 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
437 if (!(iotlb
.perm
& (1 << is_write
))) {
441 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
442 | (addr
& iotlb
.addr_mask
));
443 page_mask
&= iotlb
.addr_mask
;
444 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
445 *target_as
= iotlb
.target_as
;
447 section
= address_space_translate_internal(
448 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
451 iommu_mr
= memory_region_get_iommu(section
->mr
);
452 } while (unlikely(iommu_mr
));
455 *page_mask_out
= page_mask
;
460 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
464 * flatview_do_translate - translate an address in FlatView
466 * @fv: the flat view that we want to translate on
467 * @addr: the address to be translated in above address space
468 * @xlat: the translated address offset within memory region. It
470 * @plen_out: valid read/write length of the translated address. It
471 * can be @NULL when we don't care about it.
472 * @page_mask_out: page mask for the translated address. This
473 * should only be meaningful for IOMMU translated
474 * addresses, since there may be huge pages that this bit
475 * would tell. It can be @NULL if we don't care about it.
476 * @is_write: whether the translation operation is for write
477 * @is_mmio: whether this can be MMIO, set true if it can
478 * @target_as: the address space targeted by the IOMMU
479 * @attrs: memory transaction attributes
481 * This function is called from RCU critical section
483 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
487 hwaddr
*page_mask_out
,
490 AddressSpace
**target_as
,
493 MemoryRegionSection
*section
;
494 IOMMUMemoryRegion
*iommu_mr
;
495 hwaddr plen
= (hwaddr
)(-1);
501 section
= address_space_translate_internal(
502 flatview_to_dispatch(fv
), addr
, xlat
,
505 iommu_mr
= memory_region_get_iommu(section
->mr
);
506 if (unlikely(iommu_mr
)) {
507 return address_space_translate_iommu(iommu_mr
, xlat
,
508 plen_out
, page_mask_out
,
513 /* Not behind an IOMMU, use default page size. */
514 *page_mask_out
= ~TARGET_PAGE_MASK
;
520 /* Called from RCU critical section */
521 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
522 bool is_write
, MemTxAttrs attrs
)
524 MemoryRegionSection section
;
525 hwaddr xlat
, page_mask
;
528 * This can never be MMIO, and we don't really care about plen,
531 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
532 NULL
, &page_mask
, is_write
, false, &as
,
535 /* Illegal translation */
536 if (section
.mr
== &io_mem_unassigned
) {
540 /* Convert memory region offset into address space offset */
541 xlat
+= section
.offset_within_address_space
-
542 section
.offset_within_region
;
544 return (IOMMUTLBEntry
) {
546 .iova
= addr
& ~page_mask
,
547 .translated_addr
= xlat
& ~page_mask
,
548 .addr_mask
= page_mask
,
549 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
554 return (IOMMUTLBEntry
) {0};
557 /* Called from RCU critical section */
558 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
559 hwaddr
*plen
, bool is_write
,
563 MemoryRegionSection section
;
564 AddressSpace
*as
= NULL
;
566 /* This can be MMIO, so setup MMIO bit. */
567 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
568 is_write
, true, &as
, attrs
);
571 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
572 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
573 *plen
= MIN(page
, *plen
);
579 typedef struct TCGIOMMUNotifier
{
587 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
589 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
591 if (!notifier
->active
) {
594 tlb_flush(notifier
->cpu
);
595 notifier
->active
= false;
596 /* We leave the notifier struct on the list to avoid reallocating it later.
597 * Generally the number of IOMMUs a CPU deals with will be small.
598 * In any case we can't unregister the iommu notifier from a notify
603 static void tcg_register_iommu_notifier(CPUState
*cpu
,
604 IOMMUMemoryRegion
*iommu_mr
,
607 /* Make sure this CPU has an IOMMU notifier registered for this
608 * IOMMU/IOMMU index combination, so that we can flush its TLB
609 * when the IOMMU tells us the mappings we've cached have changed.
611 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
612 TCGIOMMUNotifier
*notifier
= NULL
;
615 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
616 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
617 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
621 if (i
== cpu
->iommu_notifiers
->len
) {
622 /* Not found, add a new entry at the end of the array */
623 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
624 notifier
= g_new0(TCGIOMMUNotifier
, 1);
625 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
628 notifier
->iommu_idx
= iommu_idx
;
630 /* Rather than trying to register interest in the specific part
631 * of the iommu's address space that we've accessed and then
632 * expand it later as subsequent accesses touch more of it, we
633 * just register interest in the whole thing, on the assumption
634 * that iommu reconfiguration will be rare.
636 iommu_notifier_init(¬ifier
->n
,
637 tcg_iommu_unmap_notify
,
638 IOMMU_NOTIFIER_UNMAP
,
642 memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
646 if (!notifier
->active
) {
647 notifier
->active
= true;
651 void tcg_iommu_free_notifier_list(CPUState
*cpu
)
653 /* Destroy the CPU's notifier list */
655 TCGIOMMUNotifier
*notifier
;
657 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
658 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
659 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
662 g_array_free(cpu
->iommu_notifiers
, true);
665 void tcg_iommu_init_notifier_list(CPUState
*cpu
)
667 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
670 /* Called from RCU critical section */
671 MemoryRegionSection
*
672 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr orig_addr
,
673 hwaddr
*xlat
, hwaddr
*plen
,
674 MemTxAttrs attrs
, int *prot
)
676 MemoryRegionSection
*section
;
677 IOMMUMemoryRegion
*iommu_mr
;
678 IOMMUMemoryRegionClass
*imrc
;
681 hwaddr addr
= orig_addr
;
682 AddressSpaceDispatch
*d
=
683 qatomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
686 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
688 iommu_mr
= memory_region_get_iommu(section
->mr
);
693 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
695 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
696 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
697 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
698 * doesn't short-cut its translation table walk.
700 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
701 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
702 | (addr
& iotlb
.addr_mask
));
703 /* Update the caller's prot bits to remove permissions the IOMMU
704 * is giving us a failure response for. If we get down to no
705 * permissions left at all we can give up now.
707 if (!(iotlb
.perm
& IOMMU_RO
)) {
708 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
710 if (!(iotlb
.perm
& IOMMU_WO
)) {
711 *prot
&= ~PAGE_WRITE
;
718 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
721 assert(!memory_region_is_iommu(section
->mr
));
727 * We should be given a page-aligned address -- certainly
728 * tlb_set_page_with_attrs() does so. The page offset of xlat
729 * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0.
730 * The page portion of xlat will be logged by memory_region_access_valid()
731 * when this memory access is rejected, so use the original untranslated
734 assert((orig_addr
& ~TARGET_PAGE_MASK
) == 0);
736 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
739 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
740 const char *prefix
, MemoryRegion
*mr
)
742 CPUAddressSpace
*newas
;
743 AddressSpace
*as
= g_new0(AddressSpace
, 1);
747 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
748 address_space_init(as
, mr
, as_name
);
751 /* Target code should have set num_ases before calling us */
752 assert(asidx
< cpu
->num_ases
);
755 /* address space 0 gets the convenience alias */
759 /* KVM cannot currently support multiple address spaces. */
760 assert(asidx
== 0 || !kvm_enabled());
762 if (!cpu
->cpu_ases
) {
763 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
766 newas
= &cpu
->cpu_ases
[asidx
];
770 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
771 newas
->tcg_as_listener
.commit
= tcg_commit
;
772 newas
->tcg_as_listener
.name
= "tcg";
773 memory_listener_register(&newas
->tcg_as_listener
, as
);
777 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
779 /* Return the AddressSpace corresponding to the specified index */
780 return cpu
->cpu_ases
[asidx
].as
;
783 /* Add a watchpoint. */
784 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
785 int flags
, CPUWatchpoint
**watchpoint
)
790 /* forbid ranges which are empty or run off the end of the address space */
791 if (len
== 0 || (addr
+ len
- 1) < addr
) {
792 error_report("tried to set invalid watchpoint at %"
793 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
796 wp
= g_malloc(sizeof(*wp
));
802 /* keep all GDB-injected watchpoints in front */
803 if (flags
& BP_GDB
) {
804 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
806 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
809 in_page
= -(addr
| TARGET_PAGE_MASK
);
810 if (len
<= in_page
) {
811 tlb_flush_page(cpu
, addr
);
821 /* Remove a specific watchpoint. */
822 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
827 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
828 if (addr
== wp
->vaddr
&& len
== wp
->len
829 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
830 cpu_watchpoint_remove_by_ref(cpu
, wp
);
837 /* Remove a specific watchpoint by reference. */
838 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
840 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
842 tlb_flush_page(cpu
, watchpoint
->vaddr
);
847 /* Remove all matching watchpoints. */
848 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
850 CPUWatchpoint
*wp
, *next
;
852 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
853 if (wp
->flags
& mask
) {
854 cpu_watchpoint_remove_by_ref(cpu
, wp
);
860 /* Return true if this watchpoint address matches the specified
861 * access (ie the address range covered by the watchpoint overlaps
862 * partially or completely with the address range covered by the
865 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
866 vaddr addr
, vaddr len
)
868 /* We know the lengths are non-zero, but a little caution is
869 * required to avoid errors in the case where the range ends
870 * exactly at the top of the address space and so addr + len
871 * wraps round to zero.
873 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
874 vaddr addrend
= addr
+ len
- 1;
876 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
879 /* Return flags for watchpoints that match addr + prot. */
880 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
885 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
886 if (watchpoint_address_matches(wp
, addr
, len
)) {
893 /* Generate a debug exception if a watchpoint has been hit. */
894 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
895 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
897 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
900 assert(tcg_enabled());
901 if (cpu
->watchpoint_hit
) {
903 * We re-entered the check after replacing the TB.
904 * Now raise the debug interrupt so that it will
905 * trigger after the current instruction.
907 qemu_mutex_lock_iothread();
908 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
909 qemu_mutex_unlock_iothread();
913 if (cc
->tcg_ops
->adjust_watchpoint_address
) {
914 /* this is currently used only by ARM BE32 */
915 addr
= cc
->tcg_ops
->adjust_watchpoint_address(cpu
, addr
, len
);
917 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
918 if (watchpoint_address_matches(wp
, addr
, len
)
919 && (wp
->flags
& flags
)) {
920 if (replay_running_debug()) {
922 * replay_breakpoint reads icount.
923 * Force recompile to succeed, because icount may
924 * be read only at the end of the block.
926 if (!cpu
->can_do_io
) {
927 /* Force execution of one insn next time. */
928 cpu
->cflags_next_tb
= 1 | CF_LAST_IO
| CF_NOIRQ
| curr_cflags(cpu
);
929 cpu_loop_exit_restore(cpu
, ra
);
932 * Don't process the watchpoints when we are
933 * in a reverse debugging operation.
938 if (flags
== BP_MEM_READ
) {
939 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
941 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
943 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
944 wp
->hitattrs
= attrs
;
946 if (wp
->flags
& BP_CPU
&& cc
->tcg_ops
->debug_check_watchpoint
&&
947 !cc
->tcg_ops
->debug_check_watchpoint(cpu
, wp
)) {
948 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
951 cpu
->watchpoint_hit
= wp
;
954 /* This call also restores vCPU state */
955 tb_check_watchpoint(cpu
, ra
);
956 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
957 cpu
->exception_index
= EXCP_DEBUG
;
961 /* Force execution of one insn next time. */
962 cpu
->cflags_next_tb
= 1 | CF_LAST_IO
| CF_NOIRQ
| curr_cflags(cpu
);
964 cpu_loop_exit_noexc(cpu
);
967 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
972 #endif /* CONFIG_TCG */
974 /* Called from RCU critical section */
975 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
979 block
= qatomic_rcu_read(&ram_list
.mru_block
);
980 if (block
&& addr
- block
->offset
< block
->max_length
) {
983 RAMBLOCK_FOREACH(block
) {
984 if (addr
- block
->offset
< block
->max_length
) {
989 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
993 /* It is safe to write mru_block outside the iothread lock. This
998 * xxx removed from list
1002 * call_rcu(reclaim_ramblock, xxx);
1005 * qatomic_rcu_set is not needed here. The block was already published
1006 * when it was placed into the list. Here we're just making an extra
1007 * copy of the pointer.
1009 ram_list
.mru_block
= block
;
1013 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1020 assert(tcg_enabled());
1021 end
= TARGET_PAGE_ALIGN(start
+ length
);
1022 start
&= TARGET_PAGE_MASK
;
1024 RCU_READ_LOCK_GUARD();
1025 block
= qemu_get_ram_block(start
);
1026 assert(block
== qemu_get_ram_block(end
- 1));
1027 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1029 tlb_reset_dirty(cpu
, start1
, length
);
1033 /* Note: start and end must be within the same ram block. */
1034 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1038 DirtyMemoryBlocks
*blocks
;
1039 unsigned long end
, page
, start_page
;
1042 uint64_t mr_offset
, mr_size
;
1048 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1049 start_page
= start
>> TARGET_PAGE_BITS
;
1052 WITH_RCU_READ_LOCK_GUARD() {
1053 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1054 ramblock
= qemu_get_ram_block(start
);
1055 /* Range sanity check on the ramblock */
1056 assert(start
>= ramblock
->offset
&&
1057 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1059 while (page
< end
) {
1060 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1061 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1062 unsigned long num
= MIN(end
- page
,
1063 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1065 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1070 mr_offset
= (ram_addr_t
)(start_page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1071 mr_size
= (end
- start_page
) << TARGET_PAGE_BITS
;
1072 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1075 if (dirty
&& tcg_enabled()) {
1076 tlb_reset_dirty_range_all(start
, length
);
1082 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1083 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1085 DirtyMemoryBlocks
*blocks
;
1086 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1087 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1088 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1089 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1090 DirtyBitmapSnapshot
*snap
;
1091 unsigned long page
, end
, dest
;
1093 snap
= g_malloc0(sizeof(*snap
) +
1094 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1095 snap
->start
= first
;
1098 page
= first
>> TARGET_PAGE_BITS
;
1099 end
= last
>> TARGET_PAGE_BITS
;
1102 WITH_RCU_READ_LOCK_GUARD() {
1103 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1105 while (page
< end
) {
1106 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1107 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1108 unsigned long num
= MIN(end
- page
,
1109 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1111 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1112 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1113 offset
>>= BITS_PER_LEVEL
;
1115 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1116 blocks
->blocks
[idx
] + offset
,
1119 dest
+= num
>> BITS_PER_LEVEL
;
1123 if (tcg_enabled()) {
1124 tlb_reset_dirty_range_all(start
, length
);
1127 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1132 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1136 unsigned long page
, end
;
1138 assert(start
>= snap
->start
);
1139 assert(start
+ length
<= snap
->end
);
1141 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1142 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1144 while (page
< end
) {
1145 if (test_bit(page
, snap
->dirty
)) {
1153 /* Called from RCU critical section */
1154 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1155 MemoryRegionSection
*section
)
1157 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
1158 return section
- d
->map
.sections
;
1161 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1163 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1165 static uint16_t phys_section_add(PhysPageMap
*map
,
1166 MemoryRegionSection
*section
)
1168 /* The physical section number is ORed with a page-aligned
1169 * pointer to produce the iotlb entries. Thus it should
1170 * never overflow into the page-aligned value.
1172 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1174 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1175 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1176 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1177 map
->sections_nb_alloc
);
1179 map
->sections
[map
->sections_nb
] = *section
;
1180 memory_region_ref(section
->mr
);
1181 return map
->sections_nb
++;
1184 static void phys_section_destroy(MemoryRegion
*mr
)
1186 bool have_sub_page
= mr
->subpage
;
1188 memory_region_unref(mr
);
1190 if (have_sub_page
) {
1191 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1192 object_unref(OBJECT(&subpage
->iomem
));
1197 static void phys_sections_free(PhysPageMap
*map
)
1199 while (map
->sections_nb
> 0) {
1200 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1201 phys_section_destroy(section
->mr
);
1203 g_free(map
->sections
);
1207 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1209 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1211 hwaddr base
= section
->offset_within_address_space
1213 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1214 MemoryRegionSection subsection
= {
1215 .offset_within_address_space
= base
,
1216 .size
= int128_make64(TARGET_PAGE_SIZE
),
1220 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1222 if (!(existing
->mr
->subpage
)) {
1223 subpage
= subpage_init(fv
, base
);
1225 subsection
.mr
= &subpage
->iomem
;
1226 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1227 phys_section_add(&d
->map
, &subsection
));
1229 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1231 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1232 end
= start
+ int128_get64(section
->size
) - 1;
1233 subpage_register(subpage
, start
, end
,
1234 phys_section_add(&d
->map
, section
));
1238 static void register_multipage(FlatView
*fv
,
1239 MemoryRegionSection
*section
)
1241 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1242 hwaddr start_addr
= section
->offset_within_address_space
;
1243 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1244 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1248 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1252 * The range in *section* may look like this:
1256 * where s stands for subpage and P for page.
1258 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1260 MemoryRegionSection remain
= *section
;
1261 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1263 /* register first subpage */
1264 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1265 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1266 - remain
.offset_within_address_space
;
1268 MemoryRegionSection now
= remain
;
1269 now
.size
= int128_min(int128_make64(left
), now
.size
);
1270 register_subpage(fv
, &now
);
1271 if (int128_eq(remain
.size
, now
.size
)) {
1274 remain
.size
= int128_sub(remain
.size
, now
.size
);
1275 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1276 remain
.offset_within_region
+= int128_get64(now
.size
);
1279 /* register whole pages */
1280 if (int128_ge(remain
.size
, page_size
)) {
1281 MemoryRegionSection now
= remain
;
1282 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1283 register_multipage(fv
, &now
);
1284 if (int128_eq(remain
.size
, now
.size
)) {
1287 remain
.size
= int128_sub(remain
.size
, now
.size
);
1288 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1289 remain
.offset_within_region
+= int128_get64(now
.size
);
1292 /* register last subpage */
1293 register_subpage(fv
, &remain
);
1296 void qemu_flush_coalesced_mmio_buffer(void)
1299 kvm_flush_coalesced_mmio_buffer();
1302 void qemu_mutex_lock_ramlist(void)
1304 qemu_mutex_lock(&ram_list
.mutex
);
1307 void qemu_mutex_unlock_ramlist(void)
1309 qemu_mutex_unlock(&ram_list
.mutex
);
1312 GString
*ram_block_format(void)
1316 GString
*buf
= g_string_new("");
1318 RCU_READ_LOCK_GUARD();
1319 g_string_append_printf(buf
, "%24s %8s %18s %18s %18s\n",
1320 "Block Name", "PSize", "Offset", "Used", "Total");
1321 RAMBLOCK_FOREACH(block
) {
1322 psize
= size_to_str(block
->page_size
);
1323 g_string_append_printf(buf
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1324 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1325 (uint64_t)block
->offset
,
1326 (uint64_t)block
->used_length
,
1327 (uint64_t)block
->max_length
);
1336 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1337 * may or may not name the same files / on the same filesystem now as
1338 * when we actually open and map them. Iterate over the file
1339 * descriptors instead, and use qemu_fd_getpagesize().
1341 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1343 long *hpsize_min
= opaque
;
1345 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1346 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1347 long hpsize
= host_memory_backend_pagesize(backend
);
1349 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1350 *hpsize_min
= hpsize
;
1357 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1359 long *hpsize_max
= opaque
;
1361 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1362 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1363 long hpsize
= host_memory_backend_pagesize(backend
);
1365 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1366 *hpsize_max
= hpsize
;
1374 * TODO: We assume right now that all mapped host memory backends are
1375 * used as RAM, however some might be used for different purposes.
1377 long qemu_minrampagesize(void)
1379 long hpsize
= LONG_MAX
;
1380 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1382 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1386 long qemu_maxrampagesize(void)
1389 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1391 object_child_foreach(memdev_root
, find_max_backend_pagesize
, &pagesize
);
1395 long qemu_minrampagesize(void)
1397 return qemu_real_host_page_size();
1399 long qemu_maxrampagesize(void)
1401 return qemu_real_host_page_size();
1406 static int64_t get_file_size(int fd
)
1409 #if defined(__linux__)
1412 if (fstat(fd
, &st
) < 0) {
1416 /* Special handling for devdax character devices */
1417 if (S_ISCHR(st
.st_mode
)) {
1418 g_autofree
char *subsystem_path
= NULL
;
1419 g_autofree
char *subsystem
= NULL
;
1421 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1422 major(st
.st_rdev
), minor(st
.st_rdev
));
1423 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1425 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1426 g_autofree
char *size_path
= NULL
;
1427 g_autofree
char *size_str
= NULL
;
1429 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1430 major(st
.st_rdev
), minor(st
.st_rdev
));
1432 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1433 return g_ascii_strtoll(size_str
, NULL
, 0);
1437 #endif /* defined(__linux__) */
1439 /* st.st_size may be zero for special files yet lseek(2) works */
1440 size
= lseek(fd
, 0, SEEK_END
);
1447 static int64_t get_file_align(int fd
)
1450 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1453 if (fstat(fd
, &st
) < 0) {
1457 /* Special handling for devdax character devices */
1458 if (S_ISCHR(st
.st_mode
)) {
1459 g_autofree
char *path
= NULL
;
1460 g_autofree
char *rpath
= NULL
;
1461 struct daxctl_ctx
*ctx
;
1462 struct daxctl_region
*region
;
1465 path
= g_strdup_printf("/sys/dev/char/%d:%d",
1466 major(st
.st_rdev
), minor(st
.st_rdev
));
1467 rpath
= realpath(path
, NULL
);
1472 rc
= daxctl_new(&ctx
);
1477 daxctl_region_foreach(ctx
, region
) {
1478 if (strstr(rpath
, daxctl_region_get_path(region
))) {
1479 align
= daxctl_region_get_align(region
);
1485 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1490 static int file_ram_open(const char *path
,
1491 const char *region_name
,
1497 char *sanitized_name
;
1503 fd
= open(path
, readonly
? O_RDONLY
: O_RDWR
);
1505 /* @path names an existing file, use it */
1508 if (errno
== ENOENT
) {
1509 /* @path names a file that doesn't exist, create it */
1510 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1515 } else if (errno
== EISDIR
) {
1516 /* @path names a directory, create a file there */
1517 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1518 sanitized_name
= g_strdup(region_name
);
1519 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1525 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1527 g_free(sanitized_name
);
1529 fd
= mkstemp(filename
);
1537 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1538 error_setg_errno(errp
, errno
,
1539 "can't open backing store %s for guest RAM",
1544 * Try again on EINTR and EEXIST. The latter happens when
1545 * something else creates the file between our two open().
1552 static void *file_ram_alloc(RAMBlock
*block
,
1560 uint32_t qemu_map_flags
;
1563 block
->page_size
= qemu_fd_getpagesize(fd
);
1564 if (block
->mr
->align
% block
->page_size
) {
1565 error_setg(errp
, "alignment 0x%" PRIx64
1566 " must be multiples of page size 0x%zx",
1567 block
->mr
->align
, block
->page_size
);
1569 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1570 error_setg(errp
, "alignment 0x%" PRIx64
1571 " must be a power of two", block
->mr
->align
);
1574 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1575 #if defined(__s390x__)
1576 if (kvm_enabled()) {
1577 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1581 if (memory
< block
->page_size
) {
1582 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1583 "or larger than page size 0x%zx",
1584 memory
, block
->page_size
);
1588 memory
= ROUND_UP(memory
, block
->page_size
);
1591 * ftruncate is not supported by hugetlbfs in older
1592 * hosts, so don't bother bailing out on errors.
1593 * If anything goes wrong with it under other filesystems,
1596 * Do not truncate the non-empty backend file to avoid corrupting
1597 * the existing data in the file. Disabling shrinking is not
1598 * enough. For example, the current vNVDIMM implementation stores
1599 * the guest NVDIMM labels at the end of the backend file. If the
1600 * backend file is later extended, QEMU will not be able to find
1601 * those labels. Therefore, extending the non-empty backend file
1602 * is disabled as well.
1604 if (truncate
&& ftruncate(fd
, memory
)) {
1605 perror("ftruncate");
1608 qemu_map_flags
= readonly
? QEMU_MAP_READONLY
: 0;
1609 qemu_map_flags
|= (block
->flags
& RAM_SHARED
) ? QEMU_MAP_SHARED
: 0;
1610 qemu_map_flags
|= (block
->flags
& RAM_PMEM
) ? QEMU_MAP_SYNC
: 0;
1611 qemu_map_flags
|= (block
->flags
& RAM_NORESERVE
) ? QEMU_MAP_NORESERVE
: 0;
1612 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
, qemu_map_flags
, offset
);
1613 if (area
== MAP_FAILED
) {
1614 error_setg_errno(errp
, errno
,
1615 "unable to map backing store for guest RAM");
1624 /* Allocate space within the ram_addr_t space that governs the
1626 * Called with the ramlist lock held.
1628 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1630 RAMBlock
*block
, *next_block
;
1631 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1633 assert(size
!= 0); /* it would hand out same offset multiple times */
1635 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1639 RAMBLOCK_FOREACH(block
) {
1640 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1642 /* Align blocks to start on a 'long' in the bitmap
1643 * which makes the bitmap sync'ing take the fast path.
1645 candidate
= block
->offset
+ block
->max_length
;
1646 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1648 /* Search for the closest following block
1651 RAMBLOCK_FOREACH(next_block
) {
1652 if (next_block
->offset
>= candidate
) {
1653 next
= MIN(next
, next_block
->offset
);
1657 /* If it fits remember our place and remember the size
1658 * of gap, but keep going so that we might find a smaller
1659 * gap to fill so avoiding fragmentation.
1661 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1663 mingap
= next
- candidate
;
1666 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1669 if (offset
== RAM_ADDR_MAX
) {
1670 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1675 trace_find_ram_offset(size
, offset
);
1680 static unsigned long last_ram_page(void)
1683 ram_addr_t last
= 0;
1685 RCU_READ_LOCK_GUARD();
1686 RAMBLOCK_FOREACH(block
) {
1687 last
= MAX(last
, block
->offset
+ block
->max_length
);
1689 return last
>> TARGET_PAGE_BITS
;
1692 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1696 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1697 if (!machine_dump_guest_core(current_machine
)) {
1698 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1700 perror("qemu_madvise");
1701 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1702 "but dump_guest_core=off specified\n");
1707 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1712 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
1717 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
1722 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
1724 return rb
->used_length
;
1727 ram_addr_t
qemu_ram_get_max_length(RAMBlock
*rb
)
1729 return rb
->max_length
;
1732 bool qemu_ram_is_shared(RAMBlock
*rb
)
1734 return rb
->flags
& RAM_SHARED
;
1737 bool qemu_ram_is_noreserve(RAMBlock
*rb
)
1739 return rb
->flags
& RAM_NORESERVE
;
1742 /* Note: Only set at the start of postcopy */
1743 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
1745 return rb
->flags
& RAM_UF_ZEROPAGE
;
1748 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
1750 rb
->flags
|= RAM_UF_ZEROPAGE
;
1753 bool qemu_ram_is_migratable(RAMBlock
*rb
)
1755 return rb
->flags
& RAM_MIGRATABLE
;
1758 void qemu_ram_set_migratable(RAMBlock
*rb
)
1760 rb
->flags
|= RAM_MIGRATABLE
;
1763 void qemu_ram_unset_migratable(RAMBlock
*rb
)
1765 rb
->flags
&= ~RAM_MIGRATABLE
;
1768 /* Called with iothread lock held. */
1769 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1774 assert(!new_block
->idstr
[0]);
1777 char *id
= qdev_get_dev_path(dev
);
1779 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1783 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1785 RCU_READ_LOCK_GUARD();
1786 RAMBLOCK_FOREACH(block
) {
1787 if (block
!= new_block
&&
1788 !strcmp(block
->idstr
, new_block
->idstr
)) {
1789 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1796 /* Called with iothread lock held. */
1797 void qemu_ram_unset_idstr(RAMBlock
*block
)
1799 /* FIXME: arch_init.c assumes that this is not called throughout
1800 * migration. Ignore the problem since hot-unplug during migration
1801 * does not work anyway.
1804 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1808 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1810 return rb
->page_size
;
1813 /* Returns the largest size of page in use */
1814 size_t qemu_ram_pagesize_largest(void)
1819 RAMBLOCK_FOREACH(block
) {
1820 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1826 static int memory_try_enable_merging(void *addr
, size_t len
)
1828 if (!machine_mem_merge(current_machine
)) {
1829 /* disabled by the user */
1833 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1837 * Resizing RAM while migrating can result in the migration being canceled.
1838 * Care has to be taken if the guest might have already detected the memory.
1840 * As memory core doesn't know how is memory accessed, it is up to
1841 * resize callback to update device state and/or add assertions to detect
1842 * misuse, if necessary.
1844 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1846 const ram_addr_t oldsize
= block
->used_length
;
1847 const ram_addr_t unaligned_size
= newsize
;
1851 newsize
= HOST_PAGE_ALIGN(newsize
);
1853 if (block
->used_length
== newsize
) {
1855 * We don't have to resize the ram block (which only knows aligned
1856 * sizes), however, we have to notify if the unaligned size changed.
1858 if (unaligned_size
!= memory_region_size(block
->mr
)) {
1859 memory_region_set_size(block
->mr
, unaligned_size
);
1860 if (block
->resized
) {
1861 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1867 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1868 error_setg_errno(errp
, EINVAL
,
1869 "Size mismatch: %s: 0x" RAM_ADDR_FMT
1870 " != 0x" RAM_ADDR_FMT
, block
->idstr
,
1871 newsize
, block
->used_length
);
1875 if (block
->max_length
< newsize
) {
1876 error_setg_errno(errp
, EINVAL
,
1877 "Size too large: %s: 0x" RAM_ADDR_FMT
1878 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1879 newsize
, block
->max_length
);
1883 /* Notify before modifying the ram block and touching the bitmaps. */
1885 ram_block_notify_resize(block
->host
, oldsize
, newsize
);
1888 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1889 block
->used_length
= newsize
;
1890 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1892 memory_region_set_size(block
->mr
, unaligned_size
);
1893 if (block
->resized
) {
1894 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1900 * Trigger sync on the given ram block for range [start, start + length]
1901 * with the backing store if one is available.
1903 * @Note: this is supposed to be a synchronous op.
1905 void qemu_ram_msync(RAMBlock
*block
, ram_addr_t start
, ram_addr_t length
)
1907 /* The requested range should fit in within the block range */
1908 g_assert((start
+ length
) <= block
->used_length
);
1910 #ifdef CONFIG_LIBPMEM
1911 /* The lack of support for pmem should not block the sync */
1912 if (ramblock_is_pmem(block
)) {
1913 void *addr
= ramblock_ptr(block
, start
);
1914 pmem_persist(addr
, length
);
1918 if (block
->fd
>= 0) {
1920 * Case there is no support for PMEM or the memory has not been
1921 * specified as persistent (or is not one) - use the msync.
1922 * Less optimal but still achieves the same goal
1924 void *addr
= ramblock_ptr(block
, start
);
1925 if (qemu_msync(addr
, length
, block
->fd
)) {
1926 warn_report("%s: failed to sync memory range: start: "
1927 RAM_ADDR_FMT
" length: " RAM_ADDR_FMT
,
1928 __func__
, start
, length
);
1933 /* Called with ram_list.mutex held */
1934 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1935 ram_addr_t new_ram_size
)
1937 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1938 DIRTY_MEMORY_BLOCK_SIZE
);
1939 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1940 DIRTY_MEMORY_BLOCK_SIZE
);
1943 /* Only need to extend if block count increased */
1944 if (new_num_blocks
<= old_num_blocks
) {
1948 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1949 DirtyMemoryBlocks
*old_blocks
;
1950 DirtyMemoryBlocks
*new_blocks
;
1953 old_blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1954 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1955 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1957 if (old_num_blocks
) {
1958 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1959 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1962 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1963 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1966 qatomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1969 g_free_rcu(old_blocks
, rcu
);
1974 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1976 const bool noreserve
= qemu_ram_is_noreserve(new_block
);
1977 const bool shared
= qemu_ram_is_shared(new_block
);
1979 RAMBlock
*last_block
= NULL
;
1980 ram_addr_t old_ram_size
, new_ram_size
;
1983 old_ram_size
= last_ram_page();
1985 qemu_mutex_lock_ramlist();
1986 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1988 if (!new_block
->host
) {
1989 if (xen_enabled()) {
1990 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1991 new_block
->mr
, &err
);
1993 error_propagate(errp
, err
);
1994 qemu_mutex_unlock_ramlist();
1998 new_block
->host
= qemu_anon_ram_alloc(new_block
->max_length
,
1999 &new_block
->mr
->align
,
2001 if (!new_block
->host
) {
2002 error_setg_errno(errp
, errno
,
2003 "cannot set up guest memory '%s'",
2004 memory_region_name(new_block
->mr
));
2005 qemu_mutex_unlock_ramlist();
2008 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
2012 new_ram_size
= MAX(old_ram_size
,
2013 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
2014 if (new_ram_size
> old_ram_size
) {
2015 dirty_memory_extend(old_ram_size
, new_ram_size
);
2017 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2018 * QLIST (which has an RCU-friendly variant) does not have insertion at
2019 * tail, so save the last element in last_block.
2021 RAMBLOCK_FOREACH(block
) {
2023 if (block
->max_length
< new_block
->max_length
) {
2028 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2029 } else if (last_block
) {
2030 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2031 } else { /* list is empty */
2032 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2034 ram_list
.mru_block
= NULL
;
2036 /* Write list before version */
2039 qemu_mutex_unlock_ramlist();
2041 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2042 new_block
->used_length
,
2045 if (new_block
->host
) {
2046 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2047 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2049 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
2050 * Configure it unless the machine is a qtest server, in which case
2051 * KVM is not used and it may be forked (eg for fuzzing purposes).
2053 if (!qtest_enabled()) {
2054 qemu_madvise(new_block
->host
, new_block
->max_length
,
2055 QEMU_MADV_DONTFORK
);
2057 ram_block_notify_add(new_block
->host
, new_block
->used_length
,
2058 new_block
->max_length
);
2063 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2064 uint32_t ram_flags
, int fd
, off_t offset
,
2065 bool readonly
, Error
**errp
)
2067 RAMBlock
*new_block
;
2068 Error
*local_err
= NULL
;
2069 int64_t file_size
, file_align
;
2071 /* Just support these ram flags by now. */
2072 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
| RAM_NORESERVE
|
2073 RAM_PROTECTED
)) == 0);
2075 if (xen_enabled()) {
2076 error_setg(errp
, "-mem-path not supported with Xen");
2080 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2082 "host lacks kvm mmu notifiers, -mem-path unsupported");
2086 size
= HOST_PAGE_ALIGN(size
);
2087 file_size
= get_file_size(fd
);
2088 if (file_size
> 0 && file_size
< size
) {
2089 error_setg(errp
, "backing store size 0x%" PRIx64
2090 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2095 file_align
= get_file_align(fd
);
2096 if (file_align
> 0 && file_align
> mr
->align
) {
2097 error_setg(errp
, "backing store align 0x%" PRIx64
2098 " is larger than 'align' option 0x%" PRIx64
,
2099 file_align
, mr
->align
);
2103 new_block
= g_malloc0(sizeof(*new_block
));
2105 new_block
->used_length
= size
;
2106 new_block
->max_length
= size
;
2107 new_block
->flags
= ram_flags
;
2108 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, readonly
,
2109 !file_size
, offset
, errp
);
2110 if (!new_block
->host
) {
2115 ram_block_add(new_block
, &local_err
);
2118 error_propagate(errp
, local_err
);
2126 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2127 uint32_t ram_flags
, const char *mem_path
,
2128 bool readonly
, Error
**errp
)
2134 fd
= file_ram_open(mem_path
, memory_region_name(mr
), readonly
, &created
,
2140 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, 0, readonly
, errp
);
2154 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2155 void (*resized
)(const char*,
2158 void *host
, uint32_t ram_flags
,
2159 MemoryRegion
*mr
, Error
**errp
)
2161 RAMBlock
*new_block
;
2162 Error
*local_err
= NULL
;
2164 assert((ram_flags
& ~(RAM_SHARED
| RAM_RESIZEABLE
| RAM_PREALLOC
|
2165 RAM_NORESERVE
)) == 0);
2166 assert(!host
^ (ram_flags
& RAM_PREALLOC
));
2168 size
= HOST_PAGE_ALIGN(size
);
2169 max_size
= HOST_PAGE_ALIGN(max_size
);
2170 new_block
= g_malloc0(sizeof(*new_block
));
2172 new_block
->resized
= resized
;
2173 new_block
->used_length
= size
;
2174 new_block
->max_length
= max_size
;
2175 assert(max_size
>= size
);
2177 new_block
->page_size
= qemu_real_host_page_size();
2178 new_block
->host
= host
;
2179 new_block
->flags
= ram_flags
;
2180 ram_block_add(new_block
, &local_err
);
2183 error_propagate(errp
, local_err
);
2189 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2190 MemoryRegion
*mr
, Error
**errp
)
2192 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, RAM_PREALLOC
, mr
,
2196 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, uint32_t ram_flags
,
2197 MemoryRegion
*mr
, Error
**errp
)
2199 assert((ram_flags
& ~(RAM_SHARED
| RAM_NORESERVE
)) == 0);
2200 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, ram_flags
, mr
, errp
);
2203 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2204 void (*resized
)(const char*,
2207 MemoryRegion
*mr
, Error
**errp
)
2209 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
,
2210 RAM_RESIZEABLE
, mr
, errp
);
2213 static void reclaim_ramblock(RAMBlock
*block
)
2215 if (block
->flags
& RAM_PREALLOC
) {
2217 } else if (xen_enabled()) {
2218 xen_invalidate_map_cache_entry(block
->host
);
2220 } else if (block
->fd
>= 0) {
2221 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2225 qemu_anon_ram_free(block
->host
, block
->max_length
);
2230 void qemu_ram_free(RAMBlock
*block
)
2237 ram_block_notify_remove(block
->host
, block
->used_length
,
2241 qemu_mutex_lock_ramlist();
2242 QLIST_REMOVE_RCU(block
, next
);
2243 ram_list
.mru_block
= NULL
;
2244 /* Write list before version */
2247 call_rcu(block
, reclaim_ramblock
, rcu
);
2248 qemu_mutex_unlock_ramlist();
2252 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2259 RAMBLOCK_FOREACH(block
) {
2260 offset
= addr
- block
->offset
;
2261 if (offset
< block
->max_length
) {
2262 vaddr
= ramblock_ptr(block
, offset
);
2263 if (block
->flags
& RAM_PREALLOC
) {
2265 } else if (xen_enabled()) {
2269 flags
|= block
->flags
& RAM_SHARED
?
2270 MAP_SHARED
: MAP_PRIVATE
;
2271 flags
|= block
->flags
& RAM_NORESERVE
? MAP_NORESERVE
: 0;
2272 if (block
->fd
>= 0) {
2273 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2274 flags
, block
->fd
, offset
);
2276 flags
|= MAP_ANONYMOUS
;
2277 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2280 if (area
!= vaddr
) {
2281 error_report("Could not remap addr: "
2282 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2286 memory_try_enable_merging(vaddr
, length
);
2287 qemu_ram_setup_dump(vaddr
, length
);
2292 #endif /* !_WIN32 */
2294 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2295 * This should not be used for general purpose DMA. Use address_space_map
2296 * or address_space_rw instead. For local memory (e.g. video ram) that the
2297 * device owns, use memory_region_get_ram_ptr.
2299 * Called within RCU critical section.
2301 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2303 RAMBlock
*block
= ram_block
;
2305 if (block
== NULL
) {
2306 block
= qemu_get_ram_block(addr
);
2307 addr
-= block
->offset
;
2310 if (xen_enabled() && block
->host
== NULL
) {
2311 /* We need to check if the requested address is in the RAM
2312 * because we don't want to map the entire memory in QEMU.
2313 * In that case just map until the end of the page.
2315 if (block
->offset
== 0) {
2316 return xen_map_cache(addr
, 0, 0, false);
2319 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2321 return ramblock_ptr(block
, addr
);
2324 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2325 * but takes a size argument.
2327 * Called within RCU critical section.
2329 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2330 hwaddr
*size
, bool lock
)
2332 RAMBlock
*block
= ram_block
;
2337 if (block
== NULL
) {
2338 block
= qemu_get_ram_block(addr
);
2339 addr
-= block
->offset
;
2341 *size
= MIN(*size
, block
->max_length
- addr
);
2343 if (xen_enabled() && block
->host
== NULL
) {
2344 /* We need to check if the requested address is in the RAM
2345 * because we don't want to map the entire memory in QEMU.
2346 * In that case just map the requested area.
2348 if (block
->offset
== 0) {
2349 return xen_map_cache(addr
, *size
, lock
, lock
);
2352 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2355 return ramblock_ptr(block
, addr
);
2358 /* Return the offset of a hostpointer within a ramblock */
2359 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2361 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2362 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2363 assert(res
< rb
->max_length
);
2369 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2372 * ptr: Host pointer to look up
2373 * round_offset: If true round the result offset down to a page boundary
2374 * *ram_addr: set to result ram_addr
2375 * *offset: set to result offset within the RAMBlock
2377 * Returns: RAMBlock (or NULL if not found)
2379 * By the time this function returns, the returned pointer is not protected
2380 * by RCU anymore. If the caller is not within an RCU critical section and
2381 * does not hold the iothread lock, it must have other means of protecting the
2382 * pointer, such as a reference to the region that includes the incoming
2385 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2389 uint8_t *host
= ptr
;
2391 if (xen_enabled()) {
2392 ram_addr_t ram_addr
;
2393 RCU_READ_LOCK_GUARD();
2394 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2395 block
= qemu_get_ram_block(ram_addr
);
2397 *offset
= ram_addr
- block
->offset
;
2402 RCU_READ_LOCK_GUARD();
2403 block
= qatomic_rcu_read(&ram_list
.mru_block
);
2404 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2408 RAMBLOCK_FOREACH(block
) {
2409 /* This case append when the block is not mapped. */
2410 if (block
->host
== NULL
) {
2413 if (host
- block
->host
< block
->max_length
) {
2421 *offset
= (host
- block
->host
);
2423 *offset
&= TARGET_PAGE_MASK
;
2429 * Finds the named RAMBlock
2431 * name: The name of RAMBlock to find
2433 * Returns: RAMBlock (or NULL if not found)
2435 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2439 RAMBLOCK_FOREACH(block
) {
2440 if (!strcmp(name
, block
->idstr
)) {
2448 /* Some of the softmmu routines need to translate from a host pointer
2449 (typically a TLB entry) back to a ram offset. */
2450 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2455 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2457 return RAM_ADDR_INVALID
;
2460 return block
->offset
+ offset
;
2463 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2464 MemTxAttrs attrs
, void *buf
, hwaddr len
);
2465 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2466 const void *buf
, hwaddr len
);
2467 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2468 bool is_write
, MemTxAttrs attrs
);
2470 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2471 unsigned len
, MemTxAttrs attrs
)
2473 subpage_t
*subpage
= opaque
;
2477 #if defined(DEBUG_SUBPAGE)
2478 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2479 subpage
, len
, addr
);
2481 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2485 *data
= ldn_p(buf
, len
);
2489 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2490 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2492 subpage_t
*subpage
= opaque
;
2495 #if defined(DEBUG_SUBPAGE)
2496 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2497 " value %"PRIx64
"\n",
2498 __func__
, subpage
, len
, addr
, value
);
2500 stn_p(buf
, len
, value
);
2501 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2504 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2505 unsigned len
, bool is_write
,
2508 subpage_t
*subpage
= opaque
;
2509 #if defined(DEBUG_SUBPAGE)
2510 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2511 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2514 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2515 len
, is_write
, attrs
);
2518 static const MemoryRegionOps subpage_ops
= {
2519 .read_with_attrs
= subpage_read
,
2520 .write_with_attrs
= subpage_write
,
2521 .impl
.min_access_size
= 1,
2522 .impl
.max_access_size
= 8,
2523 .valid
.min_access_size
= 1,
2524 .valid
.max_access_size
= 8,
2525 .valid
.accepts
= subpage_accepts
,
2526 .endianness
= DEVICE_NATIVE_ENDIAN
,
2529 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2534 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2536 idx
= SUBPAGE_IDX(start
);
2537 eidx
= SUBPAGE_IDX(end
);
2538 #if defined(DEBUG_SUBPAGE)
2539 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2540 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2542 for (; idx
<= eidx
; idx
++) {
2543 mmio
->sub_section
[idx
] = section
;
2549 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2553 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2554 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2557 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2558 NULL
, TARGET_PAGE_SIZE
);
2559 mmio
->iomem
.subpage
= true;
2560 #if defined(DEBUG_SUBPAGE)
2561 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2562 mmio
, base
, TARGET_PAGE_SIZE
);
2568 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2571 MemoryRegionSection section
= {
2574 .offset_within_address_space
= 0,
2575 .offset_within_region
= 0,
2576 .size
= int128_2_64(),
2579 return phys_section_add(map
, §ion
);
2582 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2583 hwaddr index
, MemTxAttrs attrs
)
2585 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2586 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2587 AddressSpaceDispatch
*d
= qatomic_rcu_read(&cpuas
->memory_dispatch
);
2588 MemoryRegionSection
*sections
= d
->map
.sections
;
2590 return §ions
[index
& ~TARGET_PAGE_MASK
];
2593 static void io_mem_init(void)
2595 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2599 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2601 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2604 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2605 assert(n
== PHYS_SECTION_UNASSIGNED
);
2607 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2612 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2614 phys_sections_free(&d
->map
);
2618 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2622 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2624 CPUAddressSpace
*cpuas
;
2626 /* Wait for the CPU to end the current TB. This avoids the following
2630 * ---------------------- -------------------------
2631 * TLB check -> slow path
2632 * notdirty_mem_write
2636 * TLB check -> fast path
2640 * by pushing the migration thread's memory read after the vCPU thread has
2641 * written the memory.
2643 if (replay_mode
== REPLAY_MODE_NONE
) {
2645 * VGA can make calls to this function while updating the screen.
2646 * In record/replay mode this causes a deadlock, because
2647 * run_on_cpu waits for rr mutex. Therefore no races are possible
2648 * in this case and no need for making run_on_cpu when
2649 * record/replay is enabled.
2651 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2652 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2656 static void tcg_commit(MemoryListener
*listener
)
2658 CPUAddressSpace
*cpuas
;
2659 AddressSpaceDispatch
*d
;
2661 assert(tcg_enabled());
2662 /* since each CPU stores ram addresses in its TLB cache, we must
2663 reset the modified entries */
2664 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2665 cpu_reloading_memory_map();
2666 /* The CPU and TLB are protected by the iothread lock.
2667 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2668 * may have split the RCU critical section.
2670 d
= address_space_to_dispatch(cpuas
->as
);
2671 qatomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2672 tlb_flush(cpuas
->cpu
);
2675 static void memory_map_init(void)
2677 system_memory
= g_malloc(sizeof(*system_memory
));
2679 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2680 address_space_init(&address_space_memory
, system_memory
, "memory");
2682 system_io
= g_malloc(sizeof(*system_io
));
2683 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2685 address_space_init(&address_space_io
, system_io
, "I/O");
2688 MemoryRegion
*get_system_memory(void)
2690 return system_memory
;
2693 MemoryRegion
*get_system_io(void)
2698 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2701 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2702 addr
+= memory_region_get_ram_addr(mr
);
2704 /* No early return if dirty_log_mask is or becomes 0, because
2705 * cpu_physical_memory_set_dirty_range will still call
2706 * xen_modified_memory.
2708 if (dirty_log_mask
) {
2710 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2712 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2713 assert(tcg_enabled());
2714 tb_invalidate_phys_range(addr
, addr
+ length
);
2715 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2717 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2720 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
2723 * In principle this function would work on other memory region types too,
2724 * but the ROM device use case is the only one where this operation is
2725 * necessary. Other memory regions should use the
2726 * address_space_read/write() APIs.
2728 assert(memory_region_is_romd(mr
));
2730 invalidate_and_set_dirty(mr
, addr
, size
);
2733 int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2735 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2737 /* Regions are assumed to support 1-4 byte accesses unless
2738 otherwise specified. */
2739 if (access_size_max
== 0) {
2740 access_size_max
= 4;
2743 /* Bound the maximum access by the alignment of the address. */
2744 if (!mr
->ops
->impl
.unaligned
) {
2745 unsigned align_size_max
= addr
& -addr
;
2746 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2747 access_size_max
= align_size_max
;
2751 /* Don't attempt accesses larger than the maximum. */
2752 if (l
> access_size_max
) {
2753 l
= access_size_max
;
2760 bool prepare_mmio_access(MemoryRegion
*mr
)
2762 bool release_lock
= false;
2764 if (!qemu_mutex_iothread_locked()) {
2765 qemu_mutex_lock_iothread();
2766 release_lock
= true;
2768 if (mr
->flush_coalesced_mmio
) {
2769 qemu_flush_coalesced_mmio_buffer();
2772 return release_lock
;
2776 * flatview_access_allowed
2777 * @mr: #MemoryRegion to be accessed
2778 * @attrs: memory transaction attributes
2779 * @addr: address within that memory region
2780 * @len: the number of bytes to access
2782 * Check if a memory transaction is allowed.
2784 * Returns: true if transaction is allowed, false if denied.
2786 static bool flatview_access_allowed(MemoryRegion
*mr
, MemTxAttrs attrs
,
2787 hwaddr addr
, hwaddr len
)
2789 if (likely(!attrs
.memory
)) {
2792 if (memory_region_is_ram(mr
)) {
2795 qemu_log_mask(LOG_GUEST_ERROR
,
2796 "Invalid access to non-RAM device at "
2797 "addr 0x%" HWADDR_PRIX
", size %" HWADDR_PRIu
", "
2798 "region '%s'\n", addr
, len
, memory_region_name(mr
));
2802 /* Called within RCU critical section. */
2803 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2806 hwaddr len
, hwaddr addr1
,
2807 hwaddr l
, MemoryRegion
*mr
)
2811 MemTxResult result
= MEMTX_OK
;
2812 bool release_lock
= false;
2813 const uint8_t *buf
= ptr
;
2816 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2817 result
|= MEMTX_ACCESS_ERROR
;
2819 } else if (!memory_access_is_direct(mr
, true)) {
2820 release_lock
|= prepare_mmio_access(mr
);
2821 l
= memory_access_size(mr
, l
, addr1
);
2822 /* XXX: could force current_cpu to NULL to avoid
2824 val
= ldn_he_p(buf
, l
);
2825 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
2826 size_memop(l
), attrs
);
2829 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2830 memcpy(ram_ptr
, buf
, l
);
2831 invalidate_and_set_dirty(mr
, addr1
, l
);
2835 qemu_mutex_unlock_iothread();
2836 release_lock
= false;
2848 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2854 /* Called from RCU critical section. */
2855 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2856 const void *buf
, hwaddr len
)
2863 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2864 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2865 return MEMTX_ACCESS_ERROR
;
2867 return flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
2871 /* Called within RCU critical section. */
2872 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
2873 MemTxAttrs attrs
, void *ptr
,
2874 hwaddr len
, hwaddr addr1
, hwaddr l
,
2879 MemTxResult result
= MEMTX_OK
;
2880 bool release_lock
= false;
2883 fuzz_dma_read_cb(addr
, len
, mr
);
2885 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2886 result
|= MEMTX_ACCESS_ERROR
;
2888 } else if (!memory_access_is_direct(mr
, false)) {
2890 release_lock
|= prepare_mmio_access(mr
);
2891 l
= memory_access_size(mr
, l
, addr1
);
2892 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
2893 size_memop(l
), attrs
);
2894 stn_he_p(buf
, l
, val
);
2897 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2898 memcpy(buf
, ram_ptr
, l
);
2902 qemu_mutex_unlock_iothread();
2903 release_lock
= false;
2915 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2921 /* Called from RCU critical section. */
2922 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2923 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2930 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2931 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2932 return MEMTX_ACCESS_ERROR
;
2934 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
2938 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
2939 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2941 MemTxResult result
= MEMTX_OK
;
2945 RCU_READ_LOCK_GUARD();
2946 fv
= address_space_to_flatview(as
);
2947 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
2953 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
2955 const void *buf
, hwaddr len
)
2957 MemTxResult result
= MEMTX_OK
;
2961 RCU_READ_LOCK_GUARD();
2962 fv
= address_space_to_flatview(as
);
2963 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
2969 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2970 void *buf
, hwaddr len
, bool is_write
)
2973 return address_space_write(as
, addr
, attrs
, buf
, len
);
2975 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
2979 MemTxResult
address_space_set(AddressSpace
*as
, hwaddr addr
,
2980 uint8_t c
, hwaddr len
, MemTxAttrs attrs
)
2982 #define FILLBUF_SIZE 512
2983 uint8_t fillbuf
[FILLBUF_SIZE
];
2985 MemTxResult error
= MEMTX_OK
;
2987 memset(fillbuf
, c
, FILLBUF_SIZE
);
2989 l
= len
< FILLBUF_SIZE
? len
: FILLBUF_SIZE
;
2990 error
|= address_space_write(as
, addr
, attrs
, fillbuf
, l
);
2998 void cpu_physical_memory_rw(hwaddr addr
, void *buf
,
2999 hwaddr len
, bool is_write
)
3001 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3002 buf
, len
, is_write
);
3005 enum write_rom_type
{
3010 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
3015 enum write_rom_type type
)
3021 const uint8_t *buf
= ptr
;
3023 RCU_READ_LOCK_GUARD();
3026 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
3028 if (!(memory_region_is_ram(mr
) ||
3029 memory_region_is_romd(mr
))) {
3030 l
= memory_access_size(mr
, l
, addr1
);
3033 ram_ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3036 memcpy(ram_ptr
, buf
, l
);
3037 invalidate_and_set_dirty(mr
, addr1
, l
);
3040 flush_idcache_range((uintptr_t)ram_ptr
, (uintptr_t)ram_ptr
, l
);
3051 /* used for ROM loading : can write in RAM and ROM */
3052 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
3054 const void *buf
, hwaddr len
)
3056 return address_space_write_rom_internal(as
, addr
, attrs
,
3057 buf
, len
, WRITE_DATA
);
3060 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
3063 * This function should do the same thing as an icache flush that was
3064 * triggered from within the guest. For TCG we are always cache coherent,
3065 * so there is no need to flush anything. For KVM / Xen we need to flush
3066 * the host's instruction cache at least.
3068 if (tcg_enabled()) {
3072 address_space_write_rom_internal(&address_space_memory
,
3073 start
, MEMTXATTRS_UNSPECIFIED
,
3074 NULL
, len
, FLUSH_CACHE
);
3085 static BounceBuffer bounce
;
3087 typedef struct MapClient
{
3089 QLIST_ENTRY(MapClient
) link
;
3092 QemuMutex map_client_list_lock
;
3093 static QLIST_HEAD(, MapClient
) map_client_list
3094 = QLIST_HEAD_INITIALIZER(map_client_list
);
3096 static void cpu_unregister_map_client_do(MapClient
*client
)
3098 QLIST_REMOVE(client
, link
);
3102 static void cpu_notify_map_clients_locked(void)
3106 while (!QLIST_EMPTY(&map_client_list
)) {
3107 client
= QLIST_FIRST(&map_client_list
);
3108 qemu_bh_schedule(client
->bh
);
3109 cpu_unregister_map_client_do(client
);
3113 void cpu_register_map_client(QEMUBH
*bh
)
3115 MapClient
*client
= g_malloc(sizeof(*client
));
3117 qemu_mutex_lock(&map_client_list_lock
);
3119 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3120 if (!qatomic_read(&bounce
.in_use
)) {
3121 cpu_notify_map_clients_locked();
3123 qemu_mutex_unlock(&map_client_list_lock
);
3126 void cpu_exec_init_all(void)
3128 qemu_mutex_init(&ram_list
.mutex
);
3129 /* The data structures we set up here depend on knowing the page size,
3130 * so no more changes can be made after this point.
3131 * In an ideal world, nothing we did before we had finished the
3132 * machine setup would care about the target page size, and we could
3133 * do this much later, rather than requiring board models to state
3134 * up front what their requirements are.
3136 finalize_target_page_bits();
3139 qemu_mutex_init(&map_client_list_lock
);
3142 void cpu_unregister_map_client(QEMUBH
*bh
)
3146 qemu_mutex_lock(&map_client_list_lock
);
3147 QLIST_FOREACH(client
, &map_client_list
, link
) {
3148 if (client
->bh
== bh
) {
3149 cpu_unregister_map_client_do(client
);
3153 qemu_mutex_unlock(&map_client_list_lock
);
3156 static void cpu_notify_map_clients(void)
3158 qemu_mutex_lock(&map_client_list_lock
);
3159 cpu_notify_map_clients_locked();
3160 qemu_mutex_unlock(&map_client_list_lock
);
3163 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3164 bool is_write
, MemTxAttrs attrs
)
3171 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3172 if (!memory_access_is_direct(mr
, is_write
)) {
3173 l
= memory_access_size(mr
, l
, addr
);
3174 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3185 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3186 hwaddr len
, bool is_write
,
3191 RCU_READ_LOCK_GUARD();
3192 fv
= address_space_to_flatview(as
);
3193 return flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3197 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3199 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3200 bool is_write
, MemTxAttrs attrs
)
3204 MemoryRegion
*this_mr
;
3210 if (target_len
== 0) {
3215 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3216 &len
, is_write
, attrs
);
3217 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3223 /* Map a physical memory region into a host virtual address.
3224 * May map a subset of the requested range, given by and returned in *plen.
3225 * May return NULL if resources needed to perform the mapping are exhausted.
3226 * Use only for reads OR writes - not for read-modify-write operations.
3227 * Use cpu_register_map_client() to know when retrying the map operation is
3228 * likely to succeed.
3230 void *address_space_map(AddressSpace
*as
,
3247 RCU_READ_LOCK_GUARD();
3248 fv
= address_space_to_flatview(as
);
3249 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3251 if (!memory_access_is_direct(mr
, is_write
)) {
3252 if (qatomic_xchg(&bounce
.in_use
, true)) {
3256 /* Avoid unbounded allocations */
3257 l
= MIN(l
, TARGET_PAGE_SIZE
);
3258 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3262 memory_region_ref(mr
);
3265 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3270 return bounce
.buffer
;
3274 memory_region_ref(mr
);
3275 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3276 l
, is_write
, attrs
);
3277 fuzz_dma_read_cb(addr
, *plen
, mr
);
3278 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3283 /* Unmaps a memory region previously mapped by address_space_map().
3284 * Will also mark the memory as dirty if is_write is true. access_len gives
3285 * the amount of memory that was actually read or written by the caller.
3287 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3288 bool is_write
, hwaddr access_len
)
3290 if (buffer
!= bounce
.buffer
) {
3294 mr
= memory_region_from_host(buffer
, &addr1
);
3297 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3299 if (xen_enabled()) {
3300 xen_invalidate_map_cache_entry(buffer
);
3302 memory_region_unref(mr
);
3306 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3307 bounce
.buffer
, access_len
);
3309 qemu_vfree(bounce
.buffer
);
3310 bounce
.buffer
= NULL
;
3311 memory_region_unref(bounce
.mr
);
3312 qatomic_mb_set(&bounce
.in_use
, false);
3313 cpu_notify_map_clients();
3316 void *cpu_physical_memory_map(hwaddr addr
,
3320 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3321 MEMTXATTRS_UNSPECIFIED
);
3324 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3325 bool is_write
, hwaddr access_len
)
3327 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3330 #define ARG1_DECL AddressSpace *as
3333 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3334 #define RCU_READ_LOCK(...) rcu_read_lock()
3335 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3336 #include "memory_ldst.c.inc"
3338 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3344 AddressSpaceDispatch
*d
;
3352 cache
->fv
= address_space_get_flatview(as
);
3353 d
= flatview_to_dispatch(cache
->fv
);
3354 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3357 * cache->xlat is now relative to cache->mrs.mr, not to the section itself.
3358 * Take that into account to compute how many bytes are there between
3359 * cache->xlat and the end of the section.
3361 diff
= int128_sub(cache
->mrs
.size
,
3362 int128_make64(cache
->xlat
- cache
->mrs
.offset_within_region
));
3363 l
= int128_get64(int128_min(diff
, int128_make64(l
)));
3366 memory_region_ref(mr
);
3367 if (memory_access_is_direct(mr
, is_write
)) {
3368 /* We don't care about the memory attributes here as we're only
3369 * doing this if we found actual RAM, which behaves the same
3370 * regardless of attributes; so UNSPECIFIED is fine.
3372 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3373 cache
->xlat
, l
, is_write
,
3374 MEMTXATTRS_UNSPECIFIED
);
3375 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3381 cache
->is_write
= is_write
;
3385 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3389 assert(cache
->is_write
);
3390 if (likely(cache
->ptr
)) {
3391 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3395 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3397 if (!cache
->mrs
.mr
) {
3401 if (xen_enabled()) {
3402 xen_invalidate_map_cache_entry(cache
->ptr
);
3404 memory_region_unref(cache
->mrs
.mr
);
3405 flatview_unref(cache
->fv
);
3406 cache
->mrs
.mr
= NULL
;
3410 /* Called from RCU critical section. This function has the same
3411 * semantics as address_space_translate, but it only works on a
3412 * predefined range of a MemoryRegion that was mapped with
3413 * address_space_cache_init.
3415 static inline MemoryRegion
*address_space_translate_cached(
3416 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3417 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3419 MemoryRegionSection section
;
3421 IOMMUMemoryRegion
*iommu_mr
;
3422 AddressSpace
*target_as
;
3424 assert(!cache
->ptr
);
3425 *xlat
= addr
+ cache
->xlat
;
3428 iommu_mr
= memory_region_get_iommu(mr
);
3434 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3435 NULL
, is_write
, true,
3440 /* Called from RCU critical section. address_space_read_cached uses this
3441 * out of line function when the target is an MMIO or IOMMU region.
3444 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3445 void *buf
, hwaddr len
)
3451 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3452 MEMTXATTRS_UNSPECIFIED
);
3453 return flatview_read_continue(cache
->fv
,
3454 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3458 /* Called from RCU critical section. address_space_write_cached uses this
3459 * out of line function when the target is an MMIO or IOMMU region.
3462 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3463 const void *buf
, hwaddr len
)
3469 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3470 MEMTXATTRS_UNSPECIFIED
);
3471 return flatview_write_continue(cache
->fv
,
3472 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3476 #define ARG1_DECL MemoryRegionCache *cache
3478 #define SUFFIX _cached_slow
3479 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3480 #define RCU_READ_LOCK() ((void)0)
3481 #define RCU_READ_UNLOCK() ((void)0)
3482 #include "memory_ldst.c.inc"
3484 /* virtual memory access for debug (includes writing to ROM) */
3485 int cpu_memory_rw_debug(CPUState
*cpu
, vaddr addr
,
3486 void *ptr
, size_t len
, bool is_write
)
3492 cpu_synchronize_state(cpu
);
3498 page
= addr
& TARGET_PAGE_MASK
;
3499 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3500 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3501 /* if no physical page mapped, return an error */
3502 if (phys_addr
== -1)
3504 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3507 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3509 res
= address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3512 res
= address_space_read(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3515 if (res
!= MEMTX_OK
) {
3526 * Allows code that needs to deal with migration bitmaps etc to still be built
3527 * target independent.
3529 size_t qemu_target_page_size(void)
3531 return TARGET_PAGE_SIZE
;
3534 int qemu_target_page_bits(void)
3536 return TARGET_PAGE_BITS
;
3539 int qemu_target_page_bits_min(void)
3541 return TARGET_PAGE_BITS_MIN
;
3544 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3550 RCU_READ_LOCK_GUARD();
3551 mr
= address_space_translate(&address_space_memory
,
3552 phys_addr
, &phys_addr
, &l
, false,
3553 MEMTXATTRS_UNSPECIFIED
);
3555 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3559 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3564 RCU_READ_LOCK_GUARD();
3565 RAMBLOCK_FOREACH(block
) {
3566 ret
= func(block
, opaque
);
3575 * Unmap pages of memory from start to start+length such that
3576 * they a) read as 0, b) Trigger whatever fault mechanism
3577 * the OS provides for postcopy.
3578 * The pages must be unmapped by the end of the function.
3579 * Returns: 0 on success, none-0 on failure
3582 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3586 uint8_t *host_startaddr
= rb
->host
+ start
;
3588 if (!QEMU_PTR_IS_ALIGNED(host_startaddr
, rb
->page_size
)) {
3589 error_report("ram_block_discard_range: Unaligned start address: %p",
3594 if ((start
+ length
) <= rb
->max_length
) {
3595 bool need_madvise
, need_fallocate
;
3596 if (!QEMU_IS_ALIGNED(length
, rb
->page_size
)) {
3597 error_report("ram_block_discard_range: Unaligned length: %zx",
3602 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3604 /* The logic here is messy;
3605 * madvise DONTNEED fails for hugepages
3606 * fallocate works on hugepages and shmem
3607 * shared anonymous memory requires madvise REMOVE
3609 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3610 need_fallocate
= rb
->fd
!= -1;
3611 if (need_fallocate
) {
3612 /* For a file, this causes the area of the file to be zero'd
3613 * if read, and for hugetlbfs also causes it to be unmapped
3614 * so a userfault will trigger.
3616 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3617 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3621 error_report("ram_block_discard_range: Failed to fallocate "
3622 "%s:%" PRIx64
" +%zx (%d)",
3623 rb
->idstr
, start
, length
, ret
);
3628 error_report("ram_block_discard_range: fallocate not available/file"
3629 "%s:%" PRIx64
" +%zx (%d)",
3630 rb
->idstr
, start
, length
, ret
);
3635 /* For normal RAM this causes it to be unmapped,
3636 * for shared memory it causes the local mapping to disappear
3637 * and to fall back on the file contents (which we just
3638 * fallocate'd away).
3640 #if defined(CONFIG_MADVISE)
3641 if (qemu_ram_is_shared(rb
) && rb
->fd
< 0) {
3642 ret
= madvise(host_startaddr
, length
, QEMU_MADV_REMOVE
);
3644 ret
= madvise(host_startaddr
, length
, QEMU_MADV_DONTNEED
);
3648 error_report("ram_block_discard_range: Failed to discard range "
3649 "%s:%" PRIx64
" +%zx (%d)",
3650 rb
->idstr
, start
, length
, ret
);
3655 error_report("ram_block_discard_range: MADVISE not available"
3656 "%s:%" PRIx64
" +%zx (%d)",
3657 rb
->idstr
, start
, length
, ret
);
3661 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3662 need_madvise
, need_fallocate
, ret
);
3664 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3665 "/%zx/" RAM_ADDR_FMT
")",
3666 rb
->idstr
, start
, length
, rb
->max_length
);
3673 bool ramblock_is_pmem(RAMBlock
*rb
)
3675 return rb
->flags
& RAM_PMEM
;
3678 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3680 if (start
== end
- 1) {
3681 qemu_printf("\t%3d ", start
);
3683 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
3685 qemu_printf(" skip=%d ", skip
);
3686 if (ptr
== PHYS_MAP_NODE_NIL
) {
3687 qemu_printf(" ptr=NIL");
3689 qemu_printf(" ptr=#%d", ptr
);
3691 qemu_printf(" ptr=[%d]", ptr
);
3696 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3697 int128_sub((size), int128_one())) : 0)
3699 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3703 qemu_printf(" Dispatch\n");
3704 qemu_printf(" Physical sections\n");
3706 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3707 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3708 const char *names
[] = { " [unassigned]", " [not dirty]",
3709 " [ROM]", " [watch]" };
3711 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
3714 s
->offset_within_address_space
,
3715 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
3716 s
->mr
->name
? s
->mr
->name
: "(noname)",
3717 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3718 s
->mr
== root
? " [ROOT]" : "",
3719 s
== d
->mru_section
? " [MRU]" : "",
3720 s
->mr
->is_iommu
? " [iommu]" : "");
3723 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
3724 s
->mr
->alias
->name
: "noname");
3729 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3730 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3731 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3734 Node
*n
= d
->map
.nodes
+ i
;
3736 qemu_printf(" [%d]\n", i
);
3738 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3739 PhysPageEntry
*pe
= *n
+ j
;
3741 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3745 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3751 if (jprev
!= ARRAY_SIZE(*n
)) {
3752 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3757 /* Require any discards to work. */
3758 static unsigned int ram_block_discard_required_cnt
;
3759 /* Require only coordinated discards to work. */
3760 static unsigned int ram_block_coordinated_discard_required_cnt
;
3761 /* Disable any discards. */
3762 static unsigned int ram_block_discard_disabled_cnt
;
3763 /* Disable only uncoordinated discards. */
3764 static unsigned int ram_block_uncoordinated_discard_disabled_cnt
;
3765 static QemuMutex ram_block_discard_disable_mutex
;
3767 static void ram_block_discard_disable_mutex_lock(void)
3769 static gsize initialized
;
3771 if (g_once_init_enter(&initialized
)) {
3772 qemu_mutex_init(&ram_block_discard_disable_mutex
);
3773 g_once_init_leave(&initialized
, 1);
3775 qemu_mutex_lock(&ram_block_discard_disable_mutex
);
3778 static void ram_block_discard_disable_mutex_unlock(void)
3780 qemu_mutex_unlock(&ram_block_discard_disable_mutex
);
3783 int ram_block_discard_disable(bool state
)
3787 ram_block_discard_disable_mutex_lock();
3789 ram_block_discard_disabled_cnt
--;
3790 } else if (ram_block_discard_required_cnt
||
3791 ram_block_coordinated_discard_required_cnt
) {
3794 ram_block_discard_disabled_cnt
++;
3796 ram_block_discard_disable_mutex_unlock();
3800 int ram_block_uncoordinated_discard_disable(bool state
)
3804 ram_block_discard_disable_mutex_lock();
3806 ram_block_uncoordinated_discard_disabled_cnt
--;
3807 } else if (ram_block_discard_required_cnt
) {
3810 ram_block_uncoordinated_discard_disabled_cnt
++;
3812 ram_block_discard_disable_mutex_unlock();
3816 int ram_block_discard_require(bool state
)
3820 ram_block_discard_disable_mutex_lock();
3822 ram_block_discard_required_cnt
--;
3823 } else if (ram_block_discard_disabled_cnt
||
3824 ram_block_uncoordinated_discard_disabled_cnt
) {
3827 ram_block_discard_required_cnt
++;
3829 ram_block_discard_disable_mutex_unlock();
3833 int ram_block_coordinated_discard_require(bool state
)
3837 ram_block_discard_disable_mutex_lock();
3839 ram_block_coordinated_discard_required_cnt
--;
3840 } else if (ram_block_discard_disabled_cnt
) {
3843 ram_block_coordinated_discard_required_cnt
++;
3845 ram_block_discard_disable_mutex_unlock();
3849 bool ram_block_discard_is_disabled(void)
3851 return qatomic_read(&ram_block_discard_disabled_cnt
) ||
3852 qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt
);
3855 bool ram_block_discard_is_required(void)
3857 return qatomic_read(&ram_block_discard_required_cnt
) ||
3858 qatomic_read(&ram_block_coordinated_discard_required_cnt
);