hw/microblaze/petalogix_s3adsp1800_mmu.c

   1 /*
   2  * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
   3  * boards.
   4  *
   5  * Copyright (c) 2009 Edgar E. Iglesias.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "hw/sysbus.h"
  27 #include "hw/hw.h"
  28 #include "net/net.h"
  29 #include "hw/block/flash.h"
  30 #include "sysemu/sysemu.h"
  31 #include "hw/devices.h"
  32 #include "hw/boards.h"
  33 #include "hw/xilinx.h"
  34 #include "sysemu/blockdev.h"
  35 #include "exec/address-spaces.h"
  36
  37 #include "boot.h"
  38
  39 #define LMB_BRAM_SIZE  (128 * 1024)
  40 #define FLASH_SIZE     (16 * 1024 * 1024)
  41
  42 #define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
  43
  44 #define MEMORY_BASEADDR 0x90000000
  45 #define FLASH_BASEADDR 0xa0000000
  46 #define INTC_BASEADDR 0x81800000
  47 #define TIMER_BASEADDR 0x83c00000
  48 #define UARTLITE_BASEADDR 0x84000000
  49 #define ETHLITE_BASEADDR 0x81000000
  50
  51 #define TIMER_IRQ           0
  52 #define ETHLITE_IRQ         1
  53 #define UARTLITE_IRQ        3
  54
  55 static void machine_cpu_reset(MicroBlazeCPU *cpu)
  56 {
  57     CPUMBState *env = &cpu->env;
  58
  59     env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family.  */
  60 }
  61
  62 static void
  63 petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
  64 {
  65     ram_addr_t ram_size = args->ram_size;
  66     const char *cpu_model = args->cpu_model;
  67     DeviceState *dev;
  68     MicroBlazeCPU *cpu;
  69     DriveInfo *dinfo;
  70     int i;
  71     hwaddr ddr_base = MEMORY_BASEADDR;
  72     MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
  73     MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
  74     qemu_irq irq[32];
  75     MemoryRegion *sysmem = get_system_memory();
  76
  77     /* init CPUs */
  78     if (cpu_model == NULL) {
  79         cpu_model = "microblaze";
  80     }
  81     cpu = cpu_mb_init(cpu_model);
  82
  83     /* Attach emulated BRAM through the LMB.  */
  84     memory_region_init_ram(phys_lmb_bram, NULL,
  85                            "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE);
  86     vmstate_register_ram_global(phys_lmb_bram);
  87     memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
  88
  89     memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size);
  90     vmstate_register_ram_global(phys_ram);
  91     memory_region_add_subregion(sysmem, ddr_base, phys_ram);
  92
  93     dinfo = drive_get(IF_PFLASH, 0, 0);
  94     pflash_cfi01_register(FLASH_BASEADDR,
  95                           NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
  96                           dinfo ? dinfo->bdrv : NULL, (64 * 1024),
  97                           FLASH_SIZE >> 16,
  98                           1, 0x89, 0x18, 0x0000, 0x0, 1);
  99
 100     dev = xilinx_intc_create(INTC_BASEADDR, qdev_get_gpio_in(DEVICE(cpu),
 101                              MB_CPU_IRQ), 0xA);
 102     for (i = 0; i < 32; i++) {
 103         irq[i] = qdev_get_gpio_in(dev, i);
 104     }
 105
 106     sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR,
 107                          irq[UARTLITE_IRQ]);
 108     /* 2 timers at irq 2 @ 62 Mhz.  */
 109     xilinx_timer_create(TIMER_BASEADDR, irq[0], 0, 62 * 1000000);
 110     xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0);
 111
 112     microblaze_load_kernel(cpu, ddr_base, ram_size,
 113                            args->initrd_filename,
 114                            BINARY_DEVICE_TREE_FILE,
 115                            machine_cpu_reset);
 116 }
 117
 118 static QEMUMachine petalogix_s3adsp1800_machine = {
 119     .name = "petalogix-s3adsp1800",
 120     .desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800",
 121     .init = petalogix_s3adsp1800_init,
 122     .is_default = 1,
 123 };
 124
 125 static void petalogix_s3adsp1800_machine_init(void)
 126 {
 127     qemu_register_machine(&petalogix_s3adsp1800_machine);
 128 }
 129
 130 machine_init(petalogix_s3adsp1800_machine_init);