hw/pl050.c

   1 /*
   2  * Arm PrimeCell PL050 Keyboard / Mouse Interface
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licenced under the GPL.
   8  */
   9
  10 #include "sysbus.h"
  11 #include "ps2.h"
  12
  13 typedef struct {
  14     SysBusDevice busdev;
  15     void *dev;
  16     uint32_t cr;
  17     uint32_t clk;
  18     uint32_t last;
  19     int pending;
  20     qemu_irq irq;
  21     int is_mouse;
  22 } pl050_state;
  23
  24 static const VMStateDescription vmstate_pl050 = {
  25     .name = "pl050",
  26     .version_id = 1,
  27     .minimum_version_id = 1,
  28     .fields = (VMStateField[]) {
  29         VMSTATE_UINT32(cr, pl050_state),
  30         VMSTATE_UINT32(clk, pl050_state),
  31         VMSTATE_UINT32(last, pl050_state),
  32         VMSTATE_INT32(pending, pl050_state),
  33         VMSTATE_INT32(is_mouse, pl050_state),
  34         VMSTATE_END_OF_LIST()
  35     }
  36 };
  37
  38 #define PL050_TXEMPTY         (1 << 6)
  39 #define PL050_TXBUSY          (1 << 5)
  40 #define PL050_RXFULL          (1 << 4)
  41 #define PL050_RXBUSY          (1 << 3)
  42 #define PL050_RXPARITY        (1 << 2)
  43 #define PL050_KMIC            (1 << 1)
  44 #define PL050_KMID            (1 << 0)
  45
  46 static const unsigned char pl050_id[] =
  47 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  48
  49 static void pl050_update(void *opaque, int level)
  50 {
  51     pl050_state *s = (pl050_state *)opaque;
  52     int raise;
  53
  54     s->pending = level;
  55     raise = (s->pending && (s->cr & 0x10) != 0)
  56             || (s->cr & 0x08) != 0;
  57     qemu_set_irq(s->irq, raise);
  58 }
  59
  60 static uint32_t pl050_read(void *opaque, target_phys_addr_t offset)
  61 {
  62     pl050_state *s = (pl050_state *)opaque;
  63     if (offset >= 0xfe0 && offset < 0x1000)
  64         return pl050_id[(offset - 0xfe0) >> 2];
  65
  66     switch (offset >> 2) {
  67     case 0: /* KMICR */
  68         return s->cr;
  69     case 1: /* KMISTAT */
  70         {
  71             uint8_t val;
  72             uint32_t stat;
  73
  74             val = s->last;
  75             val = val ^ (val >> 4);
  76             val = val ^ (val >> 2);
  77             val = (val ^ (val >> 1)) & 1;
  78
  79             stat = PL050_TXEMPTY;
  80             if (val)
  81                 stat |= PL050_RXPARITY;
  82             if (s->pending)
  83                 stat |= PL050_RXFULL;
  84
  85             return stat;
  86         }
  87     case 2: /* KMIDATA */
  88         if (s->pending)
  89             s->last = ps2_read_data(s->dev);
  90         return s->last;
  91     case 3: /* KMICLKDIV */
  92         return s->clk;
  93     case 4: /* KMIIR */
  94         return s->pending | 2;
  95     default:
  96         hw_error("pl050_read: Bad offset %x\n", (int)offset);
  97         return 0;
  98     }
  99 }
 100
 101 static void pl050_write(void *opaque, target_phys_addr_t offset,
 102                           uint32_t value)
 103 {
 104     pl050_state *s = (pl050_state *)opaque;
 105     switch (offset >> 2) {
 106     case 0: /* KMICR */
 107         s->cr = value;
 108         pl050_update(s, s->pending);
 109         /* ??? Need to implement the enable/disable bit.  */
 110         break;
 111     case 2: /* KMIDATA */
 112         /* ??? This should toggle the TX interrupt line.  */
 113         /* ??? This means kbd/mouse can block each other.  */
 114         if (s->is_mouse) {
 115             ps2_write_mouse(s->dev, value);
 116         } else {
 117             ps2_write_keyboard(s->dev, value);
 118         }
 119         break;
 120     case 3: /* KMICLKDIV */
 121         s->clk = value;
 122         return;
 123     default:
 124         hw_error("pl050_write: Bad offset %x\n", (int)offset);
 125     }
 126 }
 127 static CPUReadMemoryFunc * const pl050_readfn[] = {
 128    pl050_read,
 129    pl050_read,
 130    pl050_read
 131 };
 132
 133 static CPUWriteMemoryFunc * const pl050_writefn[] = {
 134    pl050_write,
 135    pl050_write,
 136    pl050_write
 137 };
 138
 139 static int pl050_init(SysBusDevice *dev, int is_mouse)
 140 {
 141     pl050_state *s = FROM_SYSBUS(pl050_state, dev);
 142     int iomemtype;
 143
 144     iomemtype = cpu_register_io_memory(pl050_readfn,
 145                                        pl050_writefn, s,
 146                                        DEVICE_NATIVE_ENDIAN);
 147     sysbus_init_mmio(dev, 0x1000, iomemtype);
 148     sysbus_init_irq(dev, &s->irq);
 149     s->is_mouse = is_mouse;
 150     if (s->is_mouse)
 151         s->dev = ps2_mouse_init(pl050_update, s);
 152     else
 153         s->dev = ps2_kbd_init(pl050_update, s);
 154     return 0;
 155 }
 156
 157 static int pl050_init_keyboard(SysBusDevice *dev)
 158 {
 159     return pl050_init(dev, 0);
 160 }
 161
 162 static int pl050_init_mouse(SysBusDevice *dev)
 163 {
 164     return pl050_init(dev, 1);
 165 }
 166
 167 static SysBusDeviceInfo pl050_kbd_info = {
 168     .init = pl050_init_keyboard,
 169     .qdev.name  = "pl050_keyboard",
 170     .qdev.size  = sizeof(pl050_state),
 171     .qdev.vmsd = &vmstate_pl050,
 172 };
 173
 174 static SysBusDeviceInfo pl050_mouse_info = {
 175     .init = pl050_init_mouse,
 176     .qdev.name  = "pl050_mouse",
 177     .qdev.size  = sizeof(pl050_state),
 178     .qdev.vmsd = &vmstate_pl050,
 179 };
 180
 181 static void pl050_register_devices(void)
 182 {
 183     sysbus_register_withprop(&pl050_kbd_info);
 184     sysbus_register_withprop(&pl050_mouse_info);
 185 }
 186
 187 device_init(pl050_register_devices)