hw/acpi/ich9.c

   1 /*
   2  * ACPI implementation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6  *                    VA Linux Systems Japan K.K.
   7  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   8  *
   9  * This is based on acpi.c.
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26 #include "qemu/osdep.h"
  27 #include "hw/hw.h"
  28 #include "qapi/error.h"
  29 #include "qapi/visitor.h"
  30 #include "hw/i386/pc.h"
  31 #include "hw/pci/pci.h"
  32 #include "qemu/timer.h"
  33 #include "sysemu/sysemu.h"
  34 #include "hw/acpi/acpi.h"
  35 #include "hw/acpi/tco.h"
  36 #include "exec/address-spaces.h"
  37
  38 #include "hw/i386/ich9.h"
  39 #include "hw/mem/pc-dimm.h"
  40
  41 //#define DEBUG
  42
  43 #ifdef DEBUG
  44 #define ICH9_DEBUG(fmt, ...) \
  45 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
  46 #else
  47 #define ICH9_DEBUG(fmt, ...)    do { } while (0)
  48 #endif
  49
  50 static void ich9_pm_update_sci_fn(ACPIREGS *regs)
  51 {
  52     ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
  53     acpi_update_sci(&pm->acpi_regs, pm->irq);
  54 }
  55
  56 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
  57 {
  58     ICH9LPCPMRegs *pm = opaque;
  59     return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
  60 }
  61
  62 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
  63                             unsigned width)
  64 {
  65     ICH9LPCPMRegs *pm = opaque;
  66     acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
  67     acpi_update_sci(&pm->acpi_regs, pm->irq);
  68 }
  69
  70 static const MemoryRegionOps ich9_gpe_ops = {
  71     .read = ich9_gpe_readb,
  72     .write = ich9_gpe_writeb,
  73     .valid.min_access_size = 1,
  74     .valid.max_access_size = 4,
  75     .impl.min_access_size = 1,
  76     .impl.max_access_size = 1,
  77     .endianness = DEVICE_LITTLE_ENDIAN,
  78 };
  79
  80 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
  81 {
  82     ICH9LPCPMRegs *pm = opaque;
  83     switch (addr) {
  84     case 0:
  85         return pm->smi_en;
  86     case 4:
  87         return pm->smi_sts;
  88     default:
  89         return 0;
  90     }
  91 }
  92
  93 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
  94                             unsigned width)
  95 {
  96     ICH9LPCPMRegs *pm = opaque;
  97     TCOIORegs *tr = &pm->tco_regs;
  98     uint64_t tco_en;
  99
 100     switch (addr) {
 101     case 0:
 102         tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
 103         /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
 104         if (tr->tco.cnt1 & TCO_LOCK) {
 105             val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
 106         }
 107         pm->smi_en &= ~pm->smi_en_wmask;
 108         pm->smi_en |= (val & pm->smi_en_wmask);
 109         break;
 110     }
 111 }
 112
 113 static const MemoryRegionOps ich9_smi_ops = {
 114     .read = ich9_smi_readl,
 115     .write = ich9_smi_writel,
 116     .valid.min_access_size = 4,
 117     .valid.max_access_size = 4,
 118     .endianness = DEVICE_LITTLE_ENDIAN,
 119 };
 120
 121 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
 122 {
 123     ICH9_DEBUG("to 0x%x\n", pm_io_base);
 124
 125     assert((pm_io_base & ICH9_PMIO_MASK) == 0);
 126
 127     pm->pm_io_base = pm_io_base;
 128     memory_region_transaction_begin();
 129     memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
 130     memory_region_set_address(&pm->io, pm->pm_io_base);
 131     memory_region_transaction_commit();
 132 }
 133
 134 static int ich9_pm_post_load(void *opaque, int version_id)
 135 {
 136     ICH9LPCPMRegs *pm = opaque;
 137     uint32_t pm_io_base = pm->pm_io_base;
 138     pm->pm_io_base = 0;
 139     ich9_pm_iospace_update(pm, pm_io_base);
 140     return 0;
 141 }
 142
 143 #define VMSTATE_GPE_ARRAY(_field, _state)                            \
 144  {                                                                   \
 145      .name       = (stringify(_field)),                              \
 146      .version_id = 0,                                                \
 147      .num        = ICH9_PMIO_GPE0_LEN,                               \
 148      .info       = &vmstate_info_uint8,                              \
 149      .size       = sizeof(uint8_t),                                  \
 150      .flags      = VMS_ARRAY | VMS_POINTER,                          \
 151      .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 152  }
 153
 154 static bool vmstate_test_use_memhp(void *opaque)
 155 {
 156     ICH9LPCPMRegs *s = opaque;
 157     return s->acpi_memory_hotplug.is_enabled;
 158 }
 159
 160 static const VMStateDescription vmstate_memhp_state = {
 161     .name = "ich9_pm/memhp",
 162     .version_id = 1,
 163     .minimum_version_id = 1,
 164     .minimum_version_id_old = 1,
 165     .needed = vmstate_test_use_memhp,
 166     .fields      = (VMStateField[]) {
 167         VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
 168         VMSTATE_END_OF_LIST()
 169     }
 170 };
 171
 172 static bool vmstate_test_use_tco(void *opaque)
 173 {
 174     ICH9LPCPMRegs *s = opaque;
 175     return s->enable_tco;
 176 }
 177
 178 static const VMStateDescription vmstate_tco_io_state = {
 179     .name = "ich9_pm/tco",
 180     .version_id = 1,
 181     .minimum_version_id = 1,
 182     .minimum_version_id_old = 1,
 183     .needed = vmstate_test_use_tco,
 184     .fields      = (VMStateField[]) {
 185         VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
 186                        TCOIORegs),
 187         VMSTATE_END_OF_LIST()
 188     }
 189 };
 190
 191 static bool vmstate_test_use_cpuhp(void *opaque)
 192 {
 193     ICH9LPCPMRegs *s = opaque;
 194     return !s->cpu_hotplug_legacy;
 195 }
 196
 197 static int vmstate_cpuhp_pre_load(void *opaque)
 198 {
 199     ICH9LPCPMRegs *s = opaque;
 200     Object *obj = OBJECT(s->gpe_cpu.device);
 201     object_property_set_bool(obj, false, "cpu-hotplug-legacy", &error_abort);
 202     return 0;
 203 }
 204
 205 static const VMStateDescription vmstate_cpuhp_state = {
 206     .name = "ich9_pm/cpuhp",
 207     .version_id = 1,
 208     .minimum_version_id = 1,
 209     .minimum_version_id_old = 1,
 210     .needed = vmstate_test_use_cpuhp,
 211     .pre_load = vmstate_cpuhp_pre_load,
 212     .fields      = (VMStateField[]) {
 213         VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
 214         VMSTATE_END_OF_LIST()
 215     }
 216 };
 217
 218 const VMStateDescription vmstate_ich9_pm = {
 219     .name = "ich9_pm",
 220     .version_id = 1,
 221     .minimum_version_id = 1,
 222     .post_load = ich9_pm_post_load,
 223     .fields = (VMStateField[]) {
 224         VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
 225         VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
 226         VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
 227         VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
 228         VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
 229         VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
 230         VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
 231         VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
 232         VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
 233         VMSTATE_END_OF_LIST()
 234     },
 235     .subsections = (const VMStateDescription*[]) {
 236         &vmstate_memhp_state,
 237         &vmstate_tco_io_state,
 238         &vmstate_cpuhp_state,
 239         NULL
 240     }
 241 };
 242
 243 static void pm_reset(void *opaque)
 244 {
 245     ICH9LPCPMRegs *pm = opaque;
 246     ich9_pm_iospace_update(pm, 0);
 247
 248     acpi_pm1_evt_reset(&pm->acpi_regs);
 249     acpi_pm1_cnt_reset(&pm->acpi_regs);
 250     acpi_pm_tmr_reset(&pm->acpi_regs);
 251     acpi_gpe_reset(&pm->acpi_regs);
 252
 253     pm->smi_en = 0;
 254     if (!pm->smm_enabled) {
 255         /* Mark SMM as already inited to prevent SMM from running. */
 256         pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
 257     }
 258     pm->smi_en_wmask = ~0;
 259
 260     acpi_update_sci(&pm->acpi_regs, pm->irq);
 261 }
 262
 263 static void pm_powerdown_req(Notifier *n, void *opaque)
 264 {
 265     ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
 266
 267     acpi_pm1_evt_power_down(&pm->acpi_regs);
 268 }
 269
 270 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 271                   bool smm_enabled,
 272                   qemu_irq sci_irq)
 273 {
 274     memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
 275     memory_region_set_enabled(&pm->io, false);
 276     memory_region_add_subregion(pci_address_space_io(lpc_pci),
 277                                 0, &pm->io);
 278
 279     acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 280     acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 281     acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
 282                       pm->s4_val);
 283
 284     acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
 285     memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
 286                           "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
 287     memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
 288
 289     memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
 290                           "acpi-smi", 8);
 291     memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 292
 293     pm->smm_enabled = smm_enabled;
 294
 295     pm->enable_tco = true;
 296     acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 297
 298     pm->irq = sci_irq;
 299     qemu_register_reset(pm_reset, pm);
 300     pm->powerdown_notifier.notify = pm_powerdown_req;
 301     qemu_register_powerdown_notifier(&pm->powerdown_notifier);
 302
 303     legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
 304         OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
 305
 306     if (pm->acpi_memory_hotplug.is_enabled) {
 307         acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 308                                  &pm->acpi_memory_hotplug,
 309                                  ACPI_MEMORY_HOTPLUG_BASE);
 310     }
 311 }
 312
 313 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
 314                                  void *opaque, Error **errp)
 315 {
 316     ICH9LPCPMRegs *pm = opaque;
 317     uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
 318
 319     visit_type_uint32(v, name, &value, errp);
 320 }
 321
 322 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
 323 {
 324     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 325
 326     return s->pm.acpi_memory_hotplug.is_enabled;
 327 }
 328
 329 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
 330                                                Error **errp)
 331 {
 332     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 333
 334     s->pm.acpi_memory_hotplug.is_enabled = value;
 335 }
 336
 337 static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
 338 {
 339     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 340
 341     return s->pm.cpu_hotplug_legacy;
 342 }
 343
 344 static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
 345                                            Error **errp)
 346 {
 347     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 348
 349     assert(!value);
 350     if (s->pm.cpu_hotplug_legacy && value == false) {
 351         acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
 352                                    ICH9_CPU_HOTPLUG_IO_BASE);
 353     }
 354     s->pm.cpu_hotplug_legacy = value;
 355 }
 356
 357 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name,
 358                                    void *opaque, Error **errp)
 359 {
 360     ICH9LPCPMRegs *pm = opaque;
 361     uint8_t value = pm->disable_s3;
 362
 363     visit_type_uint8(v, name, &value, errp);
 364 }
 365
 366 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name,
 367                                    void *opaque, Error **errp)
 368 {
 369     ICH9LPCPMRegs *pm = opaque;
 370     Error *local_err = NULL;
 371     uint8_t value;
 372
 373     visit_type_uint8(v, name, &value, &local_err);
 374     if (local_err) {
 375         goto out;
 376     }
 377     pm->disable_s3 = value;
 378 out:
 379     error_propagate(errp, local_err);
 380 }
 381
 382 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name,
 383                                    void *opaque, Error **errp)
 384 {
 385     ICH9LPCPMRegs *pm = opaque;
 386     uint8_t value = pm->disable_s4;
 387
 388     visit_type_uint8(v, name, &value, errp);
 389 }
 390
 391 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name,
 392                                    void *opaque, Error **errp)
 393 {
 394     ICH9LPCPMRegs *pm = opaque;
 395     Error *local_err = NULL;
 396     uint8_t value;
 397
 398     visit_type_uint8(v, name, &value, &local_err);
 399     if (local_err) {
 400         goto out;
 401     }
 402     pm->disable_s4 = value;
 403 out:
 404     error_propagate(errp, local_err);
 405 }
 406
 407 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name,
 408                                void *opaque, Error **errp)
 409 {
 410     ICH9LPCPMRegs *pm = opaque;
 411     uint8_t value = pm->s4_val;
 412
 413     visit_type_uint8(v, name, &value, errp);
 414 }
 415
 416 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name,
 417                                void *opaque, Error **errp)
 418 {
 419     ICH9LPCPMRegs *pm = opaque;
 420     Error *local_err = NULL;
 421     uint8_t value;
 422
 423     visit_type_uint8(v, name, &value, &local_err);
 424     if (local_err) {
 425         goto out;
 426     }
 427     pm->s4_val = value;
 428 out:
 429     error_propagate(errp, local_err);
 430 }
 431
 432 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 433 {
 434     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 435     return s->pm.enable_tco;
 436 }
 437
 438 static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
 439 {
 440     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 441     s->pm.enable_tco = value;
 442 }
 443
 444 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
 445 {
 446     static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 447     pm->acpi_memory_hotplug.is_enabled = true;
 448     pm->cpu_hotplug_legacy = true;
 449     pm->disable_s3 = 0;
 450     pm->disable_s4 = 0;
 451     pm->s4_val = 2;
 452
 453     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
 454                                    &pm->pm_io_base, errp);
 455     object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
 456                         ich9_pm_get_gpe0_blk,
 457                         NULL, NULL, pm, NULL);
 458     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
 459                                    &gpe0_len, errp);
 460     object_property_add_bool(obj, "memory-hotplug-support",
 461                              ich9_pm_get_memory_hotplug_support,
 462                              ich9_pm_set_memory_hotplug_support,
 463                              NULL);
 464     object_property_add_bool(obj, "cpu-hotplug-legacy",
 465                              ich9_pm_get_cpu_hotplug_legacy,
 466                              ich9_pm_set_cpu_hotplug_legacy,
 467                              NULL);
 468     object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
 469                         ich9_pm_get_disable_s3,
 470                         ich9_pm_set_disable_s3,
 471                         NULL, pm, NULL);
 472     object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
 473                         ich9_pm_get_disable_s4,
 474                         ich9_pm_set_disable_s4,
 475                         NULL, pm, NULL);
 476     object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
 477                         ich9_pm_get_s4_val,
 478                         ich9_pm_set_s4_val,
 479                         NULL, pm, NULL);
 480     object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
 481                              ich9_pm_get_enable_tco,
 482                              ich9_pm_set_enable_tco,
 483                              NULL);
 484 }
 485
 486 void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 487                             Error **errp)
 488 {
 489     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 490
 491     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 492         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 493         if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
 494             nvdimm_acpi_plug_cb(hotplug_dev, dev);
 495         } else {
 496             acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
 497                                 dev, errp);
 498         }
 499     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 500         if (lpc->pm.cpu_hotplug_legacy) {
 501             legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
 502         } else {
 503             acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
 504         }
 505     } else {
 506         error_setg(errp, "acpi: device plug request for not supported device"
 507                    " type: %s", object_get_typename(OBJECT(dev)));
 508     }
 509 }
 510
 511 void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 512                                       DeviceState *dev, Error **errp)
 513 {
 514     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 515
 516     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 517         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 518         acpi_memory_unplug_request_cb(hotplug_dev,
 519                                       &lpc->pm.acpi_memory_hotplug, dev,
 520                                       errp);
 521     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 522                !lpc->pm.cpu_hotplug_legacy) {
 523         acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
 524                                    dev, errp);
 525     } else {
 526         error_setg(errp, "acpi: device unplug request for not supported device"
 527                    " type: %s", object_get_typename(OBJECT(dev)));
 528     }
 529 }
 530
 531 void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 532                               Error **errp)
 533 {
 534     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 535
 536     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 537         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 538         acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
 539     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 540                !lpc->pm.cpu_hotplug_legacy) {
 541         acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
 542     } else {
 543         error_setg(errp, "acpi: device unplug for not supported device"
 544                    " type: %s", object_get_typename(OBJECT(dev)));
 545     }
 546 }
 547
 548 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 549 {
 550     ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
 551
 552     acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
 553     if (!s->pm.cpu_hotplug_legacy) {
 554         acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
 555     }
 556 }