target-ppc/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "kvm.h"
   4 #include "qemu-kvm.h"
   5
   6 void cpu_save(QEMUFile *f, void *opaque)
   7 {
   8     CPUState *env = (CPUState *)opaque;
   9     unsigned int i, j;
  10
  11     for (i = 0; i < 32; i++)
  12         qemu_put_betls(f, &env->gpr[i]);
  13 #if !defined(TARGET_PPC64)
  14     for (i = 0; i < 32; i++)
  15         qemu_put_betls(f, &env->gprh[i]);
  16 #endif
  17     qemu_put_betls(f, &env->lr);
  18     qemu_put_betls(f, &env->ctr);
  19     for (i = 0; i < 8; i++)
  20         qemu_put_be32s(f, &env->crf[i]);
  21     qemu_put_betls(f, &env->xer);
  22     qemu_put_betls(f, &env->reserve_addr);
  23     qemu_put_betls(f, &env->msr);
  24     for (i = 0; i < 4; i++)
  25         qemu_put_betls(f, &env->tgpr[i]);
  26     for (i = 0; i < 32; i++) {
  27         union {
  28             float64 d;
  29             uint64_t l;
  30         } u;
  31         u.d = env->fpr[i];
  32         qemu_put_be64(f, u.l);
  33     }
  34     qemu_put_be32s(f, &env->fpscr);
  35     qemu_put_sbe32s(f, &env->access_type);
  36 #if !defined(CONFIG_USER_ONLY)
  37 #if defined(TARGET_PPC64)
  38     qemu_put_betls(f, &env->asr);
  39     qemu_put_sbe32s(f, &env->slb_nr);
  40 #endif
  41     qemu_put_betls(f, &env->sdr1);
  42     for (i = 0; i < 32; i++)
  43         qemu_put_betls(f, &env->sr[i]);
  44     for (i = 0; i < 2; i++)
  45         for (j = 0; j < 8; j++)
  46             qemu_put_betls(f, &env->DBAT[i][j]);
  47     for (i = 0; i < 2; i++)
  48         for (j = 0; j < 8; j++)
  49             qemu_put_betls(f, &env->IBAT[i][j]);
  50     qemu_put_sbe32s(f, &env->nb_tlb);
  51     qemu_put_sbe32s(f, &env->tlb_per_way);
  52     qemu_put_sbe32s(f, &env->nb_ways);
  53     qemu_put_sbe32s(f, &env->last_way);
  54     qemu_put_sbe32s(f, &env->id_tlbs);
  55     qemu_put_sbe32s(f, &env->nb_pids);
  56     if (env->tlb) {
  57         // XXX assumes 6xx
  58         for (i = 0; i < env->nb_tlb; i++) {
  59             qemu_put_betls(f, &env->tlb[i].tlb6.pte0);
  60             qemu_put_betls(f, &env->tlb[i].tlb6.pte1);
  61             qemu_put_betls(f, &env->tlb[i].tlb6.EPN);
  62         }
  63     }
  64     for (i = 0; i < 4; i++)
  65         qemu_put_betls(f, &env->pb[i]);
  66 #endif
  67     for (i = 0; i < 1024; i++)
  68         qemu_put_betls(f, &env->spr[i]);
  69     qemu_put_be32s(f, &env->vscr);
  70     qemu_put_be64s(f, &env->spe_acc);
  71     qemu_put_be32s(f, &env->spe_fscr);
  72     qemu_put_betls(f, &env->msr_mask);
  73     qemu_put_be32s(f, &env->flags);
  74     qemu_put_sbe32s(f, &env->error_code);
  75     qemu_put_be32s(f, &env->pending_interrupts);
  76 #if !defined(CONFIG_USER_ONLY)
  77     qemu_put_be32s(f, &env->irq_input_state);
  78     for (i = 0; i < POWERPC_EXCP_NB; i++)
  79         qemu_put_betls(f, &env->excp_vectors[i]);
  80     qemu_put_betls(f, &env->excp_prefix);
  81     qemu_put_betls(f, &env->hreset_excp_prefix);
  82     qemu_put_betls(f, &env->ivor_mask);
  83     qemu_put_betls(f, &env->ivpr_mask);
  84     qemu_put_betls(f, &env->hreset_vector);
  85 #endif
  86     qemu_put_betls(f, &env->nip);
  87     qemu_put_betls(f, &env->hflags);
  88     qemu_put_betls(f, &env->hflags_nmsr);
  89     qemu_put_sbe32s(f, &env->mmu_idx);
  90     qemu_put_sbe32s(f, &env->power_mode);
  91 }
  92
  93 int cpu_load(QEMUFile *f, void *opaque, int version_id)
  94 {
  95     CPUState *env = (CPUState *)opaque;
  96     unsigned int i, j;
  97
  98     for (i = 0; i < 32; i++)
  99         qemu_get_betls(f, &env->gpr[i]);
 100 #if !defined(TARGET_PPC64)
 101     for (i = 0; i < 32; i++)
 102         qemu_get_betls(f, &env->gprh[i]);
 103 #endif
 104     qemu_get_betls(f, &env->lr);
 105     qemu_get_betls(f, &env->ctr);
 106     for (i = 0; i < 8; i++)
 107         qemu_get_be32s(f, &env->crf[i]);
 108     qemu_get_betls(f, &env->xer);
 109     qemu_get_betls(f, &env->reserve_addr);
 110     qemu_get_betls(f, &env->msr);
 111     for (i = 0; i < 4; i++)
 112         qemu_get_betls(f, &env->tgpr[i]);
 113     for (i = 0; i < 32; i++) {
 114         union {
 115             float64 d;
 116             uint64_t l;
 117         } u;
 118         u.l = qemu_get_be64(f);
 119         env->fpr[i] = u.d;
 120     }
 121     qemu_get_be32s(f, &env->fpscr);
 122     qemu_get_sbe32s(f, &env->access_type);
 123 #if !defined(CONFIG_USER_ONLY)
 124 #if defined(TARGET_PPC64)
 125     qemu_get_betls(f, &env->asr);
 126     qemu_get_sbe32s(f, &env->slb_nr);
 127 #endif
 128     qemu_get_betls(f, &env->sdr1);
 129     for (i = 0; i < 32; i++)
 130         qemu_get_betls(f, &env->sr[i]);
 131     for (i = 0; i < 2; i++)
 132         for (j = 0; j < 8; j++)
 133             qemu_get_betls(f, &env->DBAT[i][j]);
 134     for (i = 0; i < 2; i++)
 135         for (j = 0; j < 8; j++)
 136             qemu_get_betls(f, &env->IBAT[i][j]);
 137     qemu_get_sbe32s(f, &env->nb_tlb);
 138     qemu_get_sbe32s(f, &env->tlb_per_way);
 139     qemu_get_sbe32s(f, &env->nb_ways);
 140     qemu_get_sbe32s(f, &env->last_way);
 141     qemu_get_sbe32s(f, &env->id_tlbs);
 142     qemu_get_sbe32s(f, &env->nb_pids);
 143     if (env->tlb) {
 144         // XXX assumes 6xx
 145         for (i = 0; i < env->nb_tlb; i++) {
 146             qemu_get_betls(f, &env->tlb[i].tlb6.pte0);
 147             qemu_get_betls(f, &env->tlb[i].tlb6.pte1);
 148             qemu_get_betls(f, &env->tlb[i].tlb6.EPN);
 149         }
 150     }
 151     for (i = 0; i < 4; i++)
 152         qemu_get_betls(f, &env->pb[i]);
 153 #endif
 154     for (i = 0; i < 1024; i++)
 155         qemu_get_betls(f, &env->spr[i]);
 156     qemu_get_be32s(f, &env->vscr);
 157     qemu_get_be64s(f, &env->spe_acc);
 158     qemu_get_be32s(f, &env->spe_fscr);
 159     qemu_get_betls(f, &env->msr_mask);
 160     qemu_get_be32s(f, &env->flags);
 161     qemu_get_sbe32s(f, &env->error_code);
 162     qemu_get_be32s(f, &env->pending_interrupts);
 163 #if !defined(CONFIG_USER_ONLY)
 164     qemu_get_be32s(f, &env->irq_input_state);
 165     for (i = 0; i < POWERPC_EXCP_NB; i++)
 166         qemu_get_betls(f, &env->excp_vectors[i]);
 167     qemu_get_betls(f, &env->excp_prefix);
 168     qemu_get_betls(f, &env->hreset_excp_prefix);
 169     qemu_get_betls(f, &env->ivor_mask);
 170     qemu_get_betls(f, &env->ivpr_mask);
 171     qemu_get_betls(f, &env->hreset_vector);
 172 #endif
 173     qemu_get_betls(f, &env->nip);
 174     qemu_get_betls(f, &env->hflags);
 175     qemu_get_betls(f, &env->hflags_nmsr);
 176     qemu_get_sbe32s(f, &env->mmu_idx);
 177     qemu_get_sbe32s(f, &env->power_mode);
 178
 179     return 0;
 180 }