hw/ppce500_mpc8544ds.c

   1 /*
   2  * Qemu PowerPC MPC8544DS board emualtion
   3  *
   4  * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Yu Liu,     <yu.liu@freescale.com>
   7  *
   8  * This file is derived from hw/ppc440_bamboo.c,
   9  * the copyright for that material belongs to the original owners.
  10  *
  11  * This is free software; you can redistribute it and/or modify
  12  * it under the terms of  the GNU General  Public License as published by
  13  * the Free Software Foundation;  either version 2 of the  License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #include <dirent.h>
  18
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #include "net.h"
  22 #include "hw.h"
  23 #include "pc.h"
  24 #include "pci.h"
  25 #include "boards.h"
  26 #include "sysemu.h"
  27 #include "kvm.h"
  28 #include "kvm_ppc.h"
  29 #include "device_tree.h"
  30 #include "openpic.h"
  31 #include "ppce500.h"
  32 #include "loader.h"
  33 #include "elf.h"
  34 #include "qemu-kvm.h"
  35
  36 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
  37 #define UIMAGE_LOAD_BASE           0
  38 #define DTB_LOAD_BASE              0x600000
  39 #define INITRD_LOAD_BASE           0x2000000
  40
  41 #define RAM_SIZES_ALIGN            (64UL << 20)
  42
  43 #define MPC8544_CCSRBAR_BASE       0xE0000000
  44 #define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000)
  45 #define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500)
  46 #define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600)
  47 #define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000)
  48 #define MPC8544_PCI_REGS_SIZE      0x1000
  49 #define MPC8544_PCI_IO             0xE1000000
  50 #define MPC8544_PCI_IOLEN          0x10000
  51
  52 #ifdef CONFIG_FDT
  53 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
  54 {
  55     uint32_t cell;
  56     int ret;
  57
  58     ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
  59     if (ret < 0) {
  60         fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
  61         goto out;
  62     }
  63
  64     ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
  65                                 prop, cell);
  66     if (ret < 0) {
  67         fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
  68         goto out;
  69     }
  70
  71 out:
  72     return ret;
  73 }
  74 #endif
  75
  76 static void *mpc8544_load_device_tree(target_phys_addr_t addr,
  77                                      uint32_t ramsize,
  78                                      target_phys_addr_t initrd_base,
  79                                      target_phys_addr_t initrd_size,
  80                                      const char *kernel_cmdline)
  81 {
  82     void *fdt = NULL;
  83 #ifdef CONFIG_FDT
  84     uint32_t mem_reg_property[] = {0, ramsize};
  85     char *filename;
  86     int fdt_size;
  87     int ret;
  88
  89     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  90     if (!filename) {
  91         goto out;
  92     }
  93     fdt = load_device_tree(filename, &fdt_size);
  94     qemu_free(filename);
  95     if (fdt == NULL) {
  96         goto out;
  97     }
  98
  99     /* Manipulate device tree in memory. */
 100     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
 101                                sizeof(mem_reg_property));
 102     if (ret < 0)
 103         fprintf(stderr, "couldn't set /memory/reg\n");
 104
 105     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 106                                     initrd_base);
 107     if (ret < 0)
 108         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 109
 110     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 111                                     (initrd_base + initrd_size));
 112     if (ret < 0)
 113         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 114
 115     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 116                                       kernel_cmdline);
 117     if (ret < 0)
 118         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 119
 120     if (kvm_enabled()) {
 121         struct dirent *dirp;
 122         DIR *dp;
 123         char buf[128];
 124
 125         if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
 126             printf("Can't open directory /proc/device-tree/cpus/\n");
 127             goto out;
 128         }
 129
 130         buf[0] = '\0';
 131         while ((dirp = readdir(dp)) != NULL) {
 132             if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
 133                 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
 134                 break;
 135             }
 136         }
 137         closedir(dp);
 138         if (buf[0] == '\0') {
 139             printf("Unknow host!\n");
 140             goto out;
 141         }
 142
 143         mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
 144         mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
 145     }
 146
 147     cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
 148
 149 out:
 150 #endif
 151
 152     return fdt;
 153 }
 154
 155 static void mpc8544ds_init(ram_addr_t ram_size,
 156                          const char *boot_device,
 157                          const char *kernel_filename,
 158                          const char *kernel_cmdline,
 159                          const char *initrd_filename,
 160                          const char *cpu_model)
 161 {
 162     PCIBus *pci_bus;
 163     CPUState *env;
 164     uint64_t elf_entry;
 165     uint64_t elf_lowaddr;
 166     target_phys_addr_t entry=0;
 167     target_phys_addr_t loadaddr=UIMAGE_LOAD_BASE;
 168     target_long kernel_size=0;
 169     target_ulong dt_base=DTB_LOAD_BASE;
 170     target_ulong initrd_base=INITRD_LOAD_BASE;
 171     target_long initrd_size=0;
 172     void *fdt;
 173     int i=0;
 174     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
 175     qemu_irq *irqs, *mpic, *pci_irqs;
 176     SerialState * serial[2];
 177
 178     /* Setup CPU */
 179     env = cpu_ppc_init("e500v2_v30");
 180     if (!env) {
 181         fprintf(stderr, "Unable to initialize CPU!\n");
 182         exit(1);
 183     }
 184
 185     /* Fixup Memory size on a alignment boundary */
 186     ram_size &= ~(RAM_SIZES_ALIGN - 1);
 187
 188     /* Register Memory */
 189     cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
 190
 191     /* MPIC */
 192     irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 193     irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
 194     irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
 195     mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
 196
 197     /* Serial */
 198     if (serial_hds[0])
 199         serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
 200                                0, mpic[12+26], 399193,
 201                         serial_hds[0], 1);
 202
 203     if (serial_hds[1])
 204         serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
 205                         0, mpic[12+26], 399193,
 206                         serial_hds[0], 1);
 207
 208     /* PCI */
 209     pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
 210     pci_irqs[0] = mpic[pci_irq_nrs[0]];
 211     pci_irqs[1] = mpic[pci_irq_nrs[1]];
 212     pci_irqs[2] = mpic[pci_irq_nrs[2]];
 213     pci_irqs[3] = mpic[pci_irq_nrs[3]];
 214     pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
 215     if (!pci_bus)
 216         printf("couldn't create PCI controller!\n");
 217
 218     isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
 219
 220     if (pci_bus) {
 221         /* Register network interfaces. */
 222         for (i = 0; i < nb_nics; i++) {
 223             pci_nic_init_nofail(&nd_table[i], "virtio", NULL);
 224         }
 225     }
 226
 227     /* Load kernel. */
 228     if (kernel_filename) {
 229         kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 230         if (kernel_size < 0) {
 231             kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
 232                                    NULL, 1, ELF_MACHINE, 0);
 233             entry = elf_entry;
 234             loadaddr = elf_lowaddr;
 235         }
 236         /* XXX try again as binary */
 237         if (kernel_size < 0) {
 238             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 239                     kernel_filename);
 240             exit(1);
 241         }
 242     }
 243
 244     /* Load initrd. */
 245     if (initrd_filename) {
 246         initrd_size = load_image_targphys(initrd_filename, initrd_base,
 247                                           ram_size - initrd_base);
 248
 249         if (initrd_size < 0) {
 250             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 251                     initrd_filename);
 252             exit(1);
 253         }
 254     }
 255
 256     /* If we're loading a kernel directly, we must load the device tree too. */
 257     if (kernel_filename) {
 258         fdt = mpc8544_load_device_tree(dt_base, ram_size,
 259                                       initrd_base, initrd_size, kernel_cmdline);
 260         if (fdt == NULL) {
 261             fprintf(stderr, "couldn't load device tree\n");
 262             exit(1);
 263         }
 264
 265         /* Set initial guest state. */
 266         env->gpr[1] = (16<<20) - 8;
 267         env->gpr[3] = dt_base;
 268         env->nip = entry;
 269         /* XXX we currently depend on KVM to create some initial TLB entries. */
 270     }
 271
 272     if (kvm_enabled())
 273         kvmppc_init();
 274
 275     return;
 276 }
 277
 278 static QEMUMachine mpc8544ds_machine = {
 279     .name = "mpc8544ds",
 280     .desc = "mpc8544ds",
 281     .init = mpc8544ds_init,
 282 };
 283
 284 static void mpc8544ds_machine_init(void)
 285 {
 286     qemu_register_machine(&mpc8544ds_machine);
 287 }
 288
 289 machine_init(mpc8544ds_machine_init);