hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "pc.h"
  13 #include "isa.h"
  14 #include "net.h"
  15 #include "sysemu.h"
  16 #include "boards.h"
  17 #include "flash.h"
  18 #include "qemu-log.h"
  19 #include "mips-bios.h"
  20 #include "ide.h"
  21 #include "loader.h"
  22 #include "elf.h"
  23
  24 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
  25
  26 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  27
  28 #define MAX_IDE_BUS 2
  29
  30 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  31 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  32 static const int ide_irq[2] = { 14, 15 };
  33
  34 static PITState *pit; /* PIT i8254 */
  35
  36 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  37
  38 static struct _loaderparams {
  39     int ram_size;
  40     const char *kernel_filename;
  41     const char *kernel_cmdline;
  42     const char *initrd_filename;
  43 } loaderparams;
  44
  45 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  46                               uint32_t val)
  47 {
  48     if ((addr & 0xffff) == 0 && val == 42)
  49         qemu_system_reset_request ();
  50     else if ((addr & 0xffff) == 4 && val == 42)
  51         qemu_system_shutdown_request ();
  52 }
  53
  54 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  55 {
  56     return 0;
  57 }
  58
  59 static CPUWriteMemoryFunc * const mips_qemu_write[] = {
  60     &mips_qemu_writel,
  61     &mips_qemu_writel,
  62     &mips_qemu_writel,
  63 };
  64
  65 static CPUReadMemoryFunc * const mips_qemu_read[] = {
  66     &mips_qemu_readl,
  67     &mips_qemu_readl,
  68     &mips_qemu_readl,
  69 };
  70
  71 static int mips_qemu_iomemtype = 0;
  72
  73 static void load_kernel (CPUState *env)
  74 {
  75     int64_t entry, kernel_low, kernel_high;
  76     long kernel_size, initrd_size;
  77     ram_addr_t initrd_offset;
  78     int ret;
  79     int big_endian;
  80
  81 #ifdef TARGET_WORDS_BIGENDIAN
  82     big_endian = 1;
  83 #else
  84     big_endian = 0;
  85 #endif
  86     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
  87                            (uint64_t *)&entry, (uint64_t *)&kernel_low,
  88                            (uint64_t *)&kernel_high, big_endian, ELF_MACHINE, 1);
  89     if (kernel_size >= 0) {
  90         if ((entry & ~0x7fffffffULL) == 0x80000000)
  91             entry = (int32_t)entry;
  92         env->active_tc.PC = entry;
  93     } else {
  94         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  95                 loaderparams.kernel_filename);
  96         exit(1);
  97     }
  98
  99     /* load initrd */
 100     initrd_size = 0;
 101     initrd_offset = 0;
 102     if (loaderparams.initrd_filename) {
 103         initrd_size = get_image_size (loaderparams.initrd_filename);
 104         if (initrd_size > 0) {
 105             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 106             if (initrd_offset + initrd_size > ram_size) {
 107                 fprintf(stderr,
 108                         "qemu: memory too small for initial ram disk '%s'\n",
 109                         loaderparams.initrd_filename);
 110                 exit(1);
 111             }
 112             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 113                                               initrd_offset,
 114                                               ram_size - initrd_offset);
 115         }
 116         if (initrd_size == (target_ulong) -1) {
 117             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 118                     loaderparams.initrd_filename);
 119             exit(1);
 120         }
 121     }
 122
 123     /* Store command line.  */
 124     if (initrd_size > 0) {
 125         char buf[64];
 126         ret = snprintf(buf, 64, "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
 127                        PHYS_TO_VIRT((uint32_t)initrd_offset),
 128                        initrd_size);
 129         cpu_physical_memory_write((16 << 20) - 256, (void *)buf, 64);
 130     } else {
 131         ret = 0;
 132     }
 133     pstrcpy_targphys("cmdline", (16 << 20) - 256 + ret, 256,
 134                      loaderparams.kernel_cmdline);
 135
 136     stl_phys((16 << 20) - 260, 0x12345678);
 137     stl_phys((16 << 20) - 264, ram_size);
 138 }
 139
 140 static void main_cpu_reset(void *opaque)
 141 {
 142     CPUState *env = opaque;
 143     cpu_reset(env);
 144
 145     if (loaderparams.kernel_filename)
 146         load_kernel (env);
 147 }
 148
 149 static const int sector_len = 32 * 1024;
 150 static
 151 void mips_r4k_init (ram_addr_t ram_size,
 152                     const char *boot_device,
 153                     const char *kernel_filename, const char *kernel_cmdline,
 154                     const char *initrd_filename, const char *cpu_model)
 155 {
 156     char *filename;
 157     ram_addr_t ram_offset;
 158     ram_addr_t bios_offset;
 159     int bios_size;
 160     CPUState *env;
 161     RTCState *rtc_state;
 162     int i;
 163     qemu_irq *i8259;
 164     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 165     DriveInfo *dinfo;
 166
 167     /* init CPUs */
 168     if (cpu_model == NULL) {
 169 #ifdef TARGET_MIPS64
 170         cpu_model = "R4000";
 171 #else
 172         cpu_model = "24Kf";
 173 #endif
 174     }
 175     env = cpu_init(cpu_model);
 176     if (!env) {
 177         fprintf(stderr, "Unable to find CPU definition\n");
 178         exit(1);
 179     }
 180     qemu_register_reset(main_cpu_reset, env);
 181
 182     /* allocate RAM */
 183     if (ram_size > (256 << 20)) {
 184         fprintf(stderr,
 185                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 186                 ((unsigned int)ram_size / (1 << 20)));
 187         exit(1);
 188     }
 189     ram_offset = qemu_ram_alloc(ram_size);
 190
 191     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 192
 193     if (!mips_qemu_iomemtype) {
 194         mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
 195                                                      mips_qemu_write, NULL);
 196     }
 197     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 198
 199     /* Try to load a BIOS image. If this fails, we continue regardless,
 200        but initialize the hardware ourselves. When a kernel gets
 201        preloaded we also initialize the hardware, since the BIOS wasn't
 202        run. */
 203     if (bios_name == NULL)
 204         bios_name = BIOS_FILENAME;
 205     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 206     if (filename) {
 207         bios_size = get_image_size(filename);
 208     } else {
 209         bios_size = -1;
 210     }
 211     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 212         bios_offset = qemu_ram_alloc(BIOS_SIZE);
 213         cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
 214                                      bios_offset | IO_MEM_ROM);
 215
 216         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 217     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 218         uint32_t mips_rom = 0x00400000;
 219         bios_offset = qemu_ram_alloc(mips_rom);
 220         if (!pflash_cfi01_register(0x1fc00000, bios_offset,
 221             dinfo->bdrv, sector_len, mips_rom / sector_len,
 222             4, 0, 0, 0, 0)) {
 223             fprintf(stderr, "qemu: Error registering flash memory.\n");
 224         }
 225     }
 226     else {
 227         /* not fatal */
 228         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 229                 bios_name);
 230     }
 231     if (filename) {
 232         qemu_free(filename);
 233     }
 234
 235     if (kernel_filename) {
 236         loaderparams.ram_size = ram_size;
 237         loaderparams.kernel_filename = kernel_filename;
 238         loaderparams.kernel_cmdline = kernel_cmdline;
 239         loaderparams.initrd_filename = initrd_filename;
 240         load_kernel (env);
 241     }
 242
 243     /* Init CPU internal devices */
 244     cpu_mips_irq_init_cpu(env);
 245     cpu_mips_clock_init(env);
 246
 247     /* The PIC is attached to the MIPS CPU INT0 pin */
 248     i8259 = i8259_init(env->irq[2]);
 249     isa_bus_new(NULL);
 250     isa_bus_irqs(i8259);
 251
 252     rtc_state = rtc_init(2000);
 253
 254     /* Register 64 KB of ISA IO space at 0x14000000 */
 255     isa_mmio_init(0x14000000, 0x00010000);
 256     isa_mem_base = 0x10000000;
 257
 258     pit = pit_init(0x40, i8259[0]);
 259
 260     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 261         if (serial_hds[i]) {
 262             serial_isa_init(i, serial_hds[i]);
 263         }
 264     }
 265
 266     isa_vga_init();
 267
 268     if (nd_table[0].vlan)
 269         isa_ne2000_init(0x300, 9, &nd_table[0]);
 270
 271     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 272         fprintf(stderr, "qemu: too many IDE bus\n");
 273         exit(1);
 274     }
 275
 276     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 277         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 278     }
 279
 280     for(i = 0; i < MAX_IDE_BUS; i++)
 281         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 282                      hd[MAX_IDE_DEVS * i],
 283                      hd[MAX_IDE_DEVS * i + 1]);
 284
 285     isa_create_simple("i8042");
 286 }
 287
 288 static QEMUMachine mips_machine = {
 289     .name = "mips",
 290     .desc = "mips r4k platform",
 291     .init = mips_r4k_init,
 292 };
 293
 294 static void mips_machine_init(void)
 295 {
 296     qemu_register_machine(&mips_machine);
 297 }
 298
 299 machine_init(mips_machine_init);