Merge branch 'upstream-merge'
[qemu-kvm/markmc.git] / hw / device-assignment.h
blob31696ba5497a285c59327785f30f3dd6e080c44a
1 /*
2 * Copyright (c) 2007, Neocleus Corporation.
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Data structures for storing PCI state
20 * Adapted to kvm by Qumranet
22 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
23 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
24 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
25 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
28 #ifndef __DEVICE_ASSIGNMENT_H__
29 #define __DEVICE_ASSIGNMENT_H__
31 #include <sys/mman.h>
32 #include "qemu-common.h"
33 #include "qemu-queue.h"
34 #include "pci.h"
36 /* From include/linux/pci.h in the kernel sources */
37 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
39 typedef struct PCIHostDevice {
40 int bus;
41 int dev;
42 int func;
43 } PCIHostDevice;
45 typedef struct {
46 int type; /* Memory or port I/O */
47 int valid;
48 uint32_t base_addr;
49 uint32_t size; /* size of the region */
50 int resource_fd;
51 } PCIRegion;
53 typedef struct {
54 uint8_t bus, dev, func; /* Bus inside domain, device and function */
55 int irq; /* IRQ number */
56 uint16_t region_number; /* number of active regions */
58 /* Port I/O or MMIO Regions */
59 PCIRegion regions[PCI_NUM_REGIONS];
60 int config_fd;
61 } PCIDevRegions;
63 typedef struct {
64 target_phys_addr_t e_physbase;
65 uint32_t memory_index;
66 union {
67 void *r_virtbase; /* mmapped access address for memory regions */
68 uint32_t r_baseport; /* the base guest port for I/O regions */
69 } u;
70 int num; /* our index within v_addrs[] */
71 uint32_t e_size; /* emulated size of region in bytes */
72 uint32_t r_size; /* real size of region in bytes */
73 } AssignedDevRegion;
75 typedef struct AssignedDevice {
76 PCIDevice dev;
77 PCIHostDevice host;
78 uint32_t use_iommu;
79 int intpin;
80 uint8_t debug_flags;
81 AssignedDevRegion v_addrs[PCI_NUM_REGIONS];
82 PCIDevRegions real_device;
83 int run;
84 int girq;
85 unsigned char h_busnr;
86 unsigned int h_devfn;
87 int irq_requested_type;
88 int bound;
89 struct pci_dev *pdev;
90 struct {
91 #define ASSIGNED_DEVICE_CAP_MSI (1 << 0)
92 #define ASSIGNED_DEVICE_CAP_MSIX (1 << 1)
93 uint32_t available;
94 #define ASSIGNED_DEVICE_MSI_ENABLED (1 << 0)
95 #define ASSIGNED_DEVICE_MSIX_ENABLED (1 << 1)
96 #define ASSIGNED_DEVICE_MSIX_MASKED (1 << 2)
97 uint32_t state;
98 } cap;
99 int irq_entries_nr;
100 struct kvm_irq_routing_entry *entry;
101 void *msix_table_page;
102 target_phys_addr_t msix_table_addr;
103 int mmio_index;
104 int need_emulate_cmd;
105 QLIST_ENTRY(AssignedDevice) next;
106 } AssignedDevice;
108 QemuOpts *add_assigned_device(const char *arg);
109 void add_assigned_devices(PCIBus *bus, const char **devices, int n_devices);
110 void assigned_dev_update_irqs(void);
112 #define MAX_DEV_ASSIGN_CMDLINE 8
114 extern const char *assigned_devices[MAX_DEV_ASSIGN_CMDLINE];
115 extern int assigned_devices_index;
117 #endif /* __DEVICE_ASSIGNMENT_H__ */