Merge commit '1d41b0c1ec66d38355a1e76c29dd2200433335f6' into upstream-merge
[qemu-kvm/markmc.git] / kvm / scripts / vmxcap
blob50fb86eeb5af31dadb39367d9f08f04b4b083d51
1 #!/usr/bin/python
3 MSR_IA32_VMX_BASIC = 0x480
4 MSR_IA32_VMX_PINBASED_CTLS = 0x481
5 MSR_IA32_VMX_PROCBASED_CTLS = 0x482
6 MSR_IA32_VMX_EXIT_CTLS = 0x483
7 MSR_IA32_VMX_ENTRY_CTLS = 0x484
8 MSR_IA32_VMX_MISC_CTLS = 0x485
9 MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
10 MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
11 MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
12 MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
13 MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
15 class msr(object):
16 def __init__(self):
17 try:
18 self.f = file('/dev/cpu/0/msr')
19 except:
20 self.f = file('/dev/msr0')
21 def read(self, index, default = None):
22 import struct
23 self.f.seek(index)
24 try:
25 return struct.unpack('Q', self.f.read(8))[0]
26 except:
27 return default
29 class Control(object):
30 def __init__(self, name, bits, cap_msr, true_cap_msr = None):
31 self.name = name
32 self.bits = bits
33 self.cap_msr = cap_msr
34 self.true_cap_msr = true_cap_msr
35 def read2(self, nr):
36 m = msr()
37 val = m.read(nr, 0)
38 return (val & 0xffffffff, val >> 32)
39 def show(self):
40 print self.name
41 mbz, mb1 = self.read2(self.cap_msr)
42 tmbz, tmb1 = 0, 0
43 if self.true_cap_msr:
44 tmbz, tmb1 = self.read2(self.true_cap_msr)
45 for bit in sorted(self.bits.keys()):
46 zero = not (mbz & (1 << bit))
47 one = mb1 & (1 << bit)
48 true_zero = not (tmbz & (1 << bit))
49 true_one = tmb1 & (1 << bit)
50 s= '?'
51 if (self.true_cap_msr and true_zero and true_one
52 and one and not zero):
53 s = 'default'
54 elif zero and not one:
55 s = 'no'
56 elif one and not zero:
57 s = 'forced'
58 elif one and zero:
59 s = 'yes'
60 print ' %-40s %s' % (self.bits[bit], s)
62 controls = [
63 Control(
64 name = 'pin-based controls',
65 bits = {
66 0: 'External interrupt exiting',
67 3: 'NMI exiting',
68 5: 'Virtual NMIs',
69 6: 'Activate VMX-preemption timer',
71 cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
72 true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
75 Control(
76 name = 'primary processor-based controls',
77 bits = {
78 2: 'Interrupt window exiting',
79 3: 'Use TSC offsetting',
80 7: 'HLT exiting',
81 9: 'INVLPG exiting',
82 10: 'MWAIT exiting',
83 11: 'RDPMC exiting',
84 12: 'RDTSC exiting',
85 15: 'CR3-load exiting',
86 16: 'CR3-store exiting',
87 19: 'CR8-load exiting',
88 20: 'CR8-store exiting',
89 21: 'Use TPR shadow',
90 22: 'NMI-window exiting',
91 23: 'MOV-DR exiting',
92 24: 'Unconditional I/O exiting',
93 25: 'Use I/O bitmaps',
94 27: 'Monitor trap flag',
95 28: 'Use MSR bitmaps',
96 29: 'MONITOR exiting',
97 30: 'PAUSE exiting',
98 31: 'Activate secondary control',
100 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
101 true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
104 Control(
105 name = 'secondary processor-based controls',
106 bits = {
107 0: 'Virtualize APIC accesses',
108 1: 'Enable EPT',
109 2: 'Descriptor-table exiting',
110 4: 'Virtualize x2APIC mode',
111 5: 'Enable VPID',
112 6: 'WBINVD exiting',
113 7: 'Unrestricted guest',
114 10: 'PAUSE-loop exiting',
116 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
119 Control(
120 name = 'VM-Exit controls',
121 bits = {
122 2: 'Save debug controls',
123 9: 'Host address-space size',
124 12: 'Load IA32_PERF_GLOBAL_CTRL',
125 15: 'Acknowledge interrupt on exit',
126 18: 'Save IA32_PAT',
127 19: 'Load IA32_PAT',
128 20: 'Save IA32_EFER',
129 21: 'Load IA32_EFER',
130 22: 'Save VMX-preemption timer value',
132 cap_msr = MSR_IA32_VMX_EXIT_CTLS,
133 true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
136 Control(
137 name = 'VM-Entry controls',
138 bits = {
139 2: 'Load debug controls',
140 9: 'IA-64 mode guest',
141 10: 'Entry to SMM',
142 11: 'Deactivate dual-monitor treatment',
143 13: 'Load IA32_PERF_GLOBAL_CTRL',
144 14: 'Load IA32_PAT',
145 15: 'Load IA32_EFER',
147 cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
148 true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
152 for c in controls:
153 c.show()