gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "monitor.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #endif
  37 #include "qemu-kvm.h"
  38
  39 #define MAX_PACKET_LENGTH 4096
  40
  41 #include "qemu_socket.h"
  42 #include "kvm.h"
  43
  44
  45 enum {
  46     GDB_SIGNAL_0 = 0,
  47     GDB_SIGNAL_INT = 2,
  48     GDB_SIGNAL_TRAP = 5,
  49     GDB_SIGNAL_UNKNOWN = 143
  50 };
  51
  52 #ifdef CONFIG_USER_ONLY
  53
  54 /* Map target signal numbers to GDB protocol signal numbers and vice
  55  * versa.  For user emulation's currently supported systems, we can
  56  * assume most signals are defined.
  57  */
  58
  59 static int gdb_signal_table[] = {
  60     0,
  61     TARGET_SIGHUP,
  62     TARGET_SIGINT,
  63     TARGET_SIGQUIT,
  64     TARGET_SIGILL,
  65     TARGET_SIGTRAP,
  66     TARGET_SIGABRT,
  67     -1, /* SIGEMT */
  68     TARGET_SIGFPE,
  69     TARGET_SIGKILL,
  70     TARGET_SIGBUS,
  71     TARGET_SIGSEGV,
  72     TARGET_SIGSYS,
  73     TARGET_SIGPIPE,
  74     TARGET_SIGALRM,
  75     TARGET_SIGTERM,
  76     TARGET_SIGURG,
  77     TARGET_SIGSTOP,
  78     TARGET_SIGTSTP,
  79     TARGET_SIGCONT,
  80     TARGET_SIGCHLD,
  81     TARGET_SIGTTIN,
  82     TARGET_SIGTTOU,
  83     TARGET_SIGIO,
  84     TARGET_SIGXCPU,
  85     TARGET_SIGXFSZ,
  86     TARGET_SIGVTALRM,
  87     TARGET_SIGPROF,
  88     TARGET_SIGWINCH,
  89     -1, /* SIGLOST */
  90     TARGET_SIGUSR1,
  91     TARGET_SIGUSR2,
  92 #ifdef TARGET_SIGPWR
  93     TARGET_SIGPWR,
  94 #else
  95     -1,
  96 #endif
  97     -1, /* SIGPOLL */
  98     -1,
  99     -1,
 100     -1,
 101     -1,
 102     -1,
 103     -1,
 104     -1,
 105     -1,
 106     -1,
 107     -1,
 108     -1,
 109 #ifdef __SIGRTMIN
 110     __SIGRTMIN + 1,
 111     __SIGRTMIN + 2,
 112     __SIGRTMIN + 3,
 113     __SIGRTMIN + 4,
 114     __SIGRTMIN + 5,
 115     __SIGRTMIN + 6,
 116     __SIGRTMIN + 7,
 117     __SIGRTMIN + 8,
 118     __SIGRTMIN + 9,
 119     __SIGRTMIN + 10,
 120     __SIGRTMIN + 11,
 121     __SIGRTMIN + 12,
 122     __SIGRTMIN + 13,
 123     __SIGRTMIN + 14,
 124     __SIGRTMIN + 15,
 125     __SIGRTMIN + 16,
 126     __SIGRTMIN + 17,
 127     __SIGRTMIN + 18,
 128     __SIGRTMIN + 19,
 129     __SIGRTMIN + 20,
 130     __SIGRTMIN + 21,
 131     __SIGRTMIN + 22,
 132     __SIGRTMIN + 23,
 133     __SIGRTMIN + 24,
 134     __SIGRTMIN + 25,
 135     __SIGRTMIN + 26,
 136     __SIGRTMIN + 27,
 137     __SIGRTMIN + 28,
 138     __SIGRTMIN + 29,
 139     __SIGRTMIN + 30,
 140     __SIGRTMIN + 31,
 141     -1, /* SIGCANCEL */
 142     __SIGRTMIN,
 143     __SIGRTMIN + 32,
 144     __SIGRTMIN + 33,
 145     __SIGRTMIN + 34,
 146     __SIGRTMIN + 35,
 147     __SIGRTMIN + 36,
 148     __SIGRTMIN + 37,
 149     __SIGRTMIN + 38,
 150     __SIGRTMIN + 39,
 151     __SIGRTMIN + 40,
 152     __SIGRTMIN + 41,
 153     __SIGRTMIN + 42,
 154     __SIGRTMIN + 43,
 155     __SIGRTMIN + 44,
 156     __SIGRTMIN + 45,
 157     __SIGRTMIN + 46,
 158     __SIGRTMIN + 47,
 159     __SIGRTMIN + 48,
 160     __SIGRTMIN + 49,
 161     __SIGRTMIN + 50,
 162     __SIGRTMIN + 51,
 163     __SIGRTMIN + 52,
 164     __SIGRTMIN + 53,
 165     __SIGRTMIN + 54,
 166     __SIGRTMIN + 55,
 167     __SIGRTMIN + 56,
 168     __SIGRTMIN + 57,
 169     __SIGRTMIN + 58,
 170     __SIGRTMIN + 59,
 171     __SIGRTMIN + 60,
 172     __SIGRTMIN + 61,
 173     __SIGRTMIN + 62,
 174     __SIGRTMIN + 63,
 175     __SIGRTMIN + 64,
 176     __SIGRTMIN + 65,
 177     __SIGRTMIN + 66,
 178     __SIGRTMIN + 67,
 179     __SIGRTMIN + 68,
 180     __SIGRTMIN + 69,
 181     __SIGRTMIN + 70,
 182     __SIGRTMIN + 71,
 183     __SIGRTMIN + 72,
 184     __SIGRTMIN + 73,
 185     __SIGRTMIN + 74,
 186     __SIGRTMIN + 75,
 187     __SIGRTMIN + 76,
 188     __SIGRTMIN + 77,
 189     __SIGRTMIN + 78,
 190     __SIGRTMIN + 79,
 191     __SIGRTMIN + 80,
 192     __SIGRTMIN + 81,
 193     __SIGRTMIN + 82,
 194     __SIGRTMIN + 83,
 195     __SIGRTMIN + 84,
 196     __SIGRTMIN + 85,
 197     __SIGRTMIN + 86,
 198     __SIGRTMIN + 87,
 199     __SIGRTMIN + 88,
 200     __SIGRTMIN + 89,
 201     __SIGRTMIN + 90,
 202     __SIGRTMIN + 91,
 203     __SIGRTMIN + 92,
 204     __SIGRTMIN + 93,
 205     __SIGRTMIN + 94,
 206     __SIGRTMIN + 95,
 207     -1, /* SIGINFO */
 208     -1, /* UNKNOWN */
 209     -1, /* DEFAULT */
 210     -1,
 211     -1,
 212     -1,
 213     -1,
 214     -1,
 215     -1
 216 #endif
 217 };
 218 #else
 219 /* In system mode we only need SIGINT and SIGTRAP; other signals
 220    are not yet supported.  */
 221
 222 enum {
 223     TARGET_SIGINT = 2,
 224     TARGET_SIGTRAP = 5
 225 };
 226
 227 static int gdb_signal_table[] = {
 228     -1,
 229     -1,
 230     TARGET_SIGINT,
 231     -1,
 232     -1,
 233     TARGET_SIGTRAP
 234 };
 235 #endif
 236
 237 #ifdef CONFIG_USER_ONLY
 238 static int target_signal_to_gdb (int sig)
 239 {
 240     int i;
 241     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
 242         if (gdb_signal_table[i] == sig)
 243             return i;
 244     return GDB_SIGNAL_UNKNOWN;
 245 }
 246 #endif
 247
 248 static int gdb_signal_to_target (int sig)
 249 {
 250     if (sig < ARRAY_SIZE (gdb_signal_table))
 251         return gdb_signal_table[sig];
 252     else
 253         return -1;
 254 }
 255
 256 //#define DEBUG_GDB
 257
 258 typedef struct GDBRegisterState {
 259     int base_reg;
 260     int num_regs;
 261     gdb_reg_cb get_reg;
 262     gdb_reg_cb set_reg;
 263     const char *xml;
 264     struct GDBRegisterState *next;
 265 } GDBRegisterState;
 266
 267 enum RSState {
 268     RS_INACTIVE,
 269     RS_IDLE,
 270     RS_GETLINE,
 271     RS_CHKSUM1,
 272     RS_CHKSUM2,
 273     RS_SYSCALL,
 274 };
 275 typedef struct GDBState {
 276     CPUState *c_cpu; /* current CPU for step/continue ops */
 277     CPUState *g_cpu; /* current CPU for other ops */
 278     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
 279     enum RSState state; /* parsing state */
 280     char line_buf[MAX_PACKET_LENGTH];
 281     int line_buf_index;
 282     int line_csum;
 283     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
 284     int last_packet_len;
 285     int signal;
 286 #ifdef CONFIG_USER_ONLY
 287     int fd;
 288     int running_state;
 289 #else
 290     CharDriverState *chr;
 291     CharDriverState *mon_chr;
 292 #endif
 293 } GDBState;
 294
 295 /* By default use no IRQs and no timers while single stepping so as to
 296  * make single stepping like an ICE HW step.
 297  */
 298 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
 299
 300 static GDBState *gdbserver_state;
 301
 302 /* This is an ugly hack to cope with both new and old gdb.
 303    If gdb sends qXfer:features:read then assume we're talking to a newish
 304    gdb that understands target descriptions.  */
 305 static int gdb_has_xml;
 306
 307 #ifdef CONFIG_USER_ONLY
 308 /* XXX: This is not thread safe.  Do we care?  */
 309 static int gdbserver_fd = -1;
 310
 311 static int get_char(GDBState *s)
 312 {
 313     uint8_t ch;
 314     int ret;
 315
 316     for(;;) {
 317         ret = recv(s->fd, &ch, 1, 0);
 318         if (ret < 0) {
 319             if (errno == ECONNRESET)
 320                 s->fd = -1;
 321             if (errno != EINTR && errno != EAGAIN)
 322                 return -1;
 323         } else if (ret == 0) {
 324             close(s->fd);
 325             s->fd = -1;
 326             return -1;
 327         } else {
 328             break;
 329         }
 330     }
 331     return ch;
 332 }
 333 #endif
 334
 335 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 336
 337 static enum {
 338     GDB_SYS_UNKNOWN,
 339     GDB_SYS_ENABLED,
 340     GDB_SYS_DISABLED,
 341 } gdb_syscall_mode;
 342
 343 /* If gdb is connected when the first semihosting syscall occurs then use
 344    remote gdb syscalls.  Otherwise use native file IO.  */
 345 int use_gdb_syscalls(void)
 346 {
 347     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 348         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
 349                                             : GDB_SYS_DISABLED);
 350     }
 351     return gdb_syscall_mode == GDB_SYS_ENABLED;
 352 }
 353
 354 /* Resume execution.  */
 355 static inline void gdb_continue(GDBState *s)
 356 {
 357 #ifdef CONFIG_USER_ONLY
 358     s->running_state = 1;
 359 #else
 360     vm_start();
 361 #endif
 362 }
 363
 364 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 365 {
 366 #ifdef CONFIG_USER_ONLY
 367     int ret;
 368
 369     while (len > 0) {
 370         ret = send(s->fd, buf, len, 0);
 371         if (ret < 0) {
 372             if (errno != EINTR && errno != EAGAIN)
 373                 return;
 374         } else {
 375             buf += ret;
 376             len -= ret;
 377         }
 378     }
 379 #else
 380     qemu_chr_write(s->chr, buf, len);
 381 #endif
 382 }
 383
 384 static inline int fromhex(int v)
 385 {
 386     if (v >= '0' && v <= '9')
 387         return v - '0';
 388     else if (v >= 'A' && v <= 'F')
 389         return v - 'A' + 10;
 390     else if (v >= 'a' && v <= 'f')
 391         return v - 'a' + 10;
 392     else
 393         return 0;
 394 }
 395
 396 static inline int tohex(int v)
 397 {
 398     if (v < 10)
 399         return v + '0';
 400     else
 401         return v - 10 + 'a';
 402 }
 403
 404 static void memtohex(char *buf, const uint8_t *mem, int len)
 405 {
 406     int i, c;
 407     char *q;
 408     q = buf;
 409     for(i = 0; i < len; i++) {
 410         c = mem[i];
 411         *q++ = tohex(c >> 4);
 412         *q++ = tohex(c & 0xf);
 413     }
 414     *q = '\0';
 415 }
 416
 417 static void hextomem(uint8_t *mem, const char *buf, int len)
 418 {
 419     int i;
 420
 421     for(i = 0; i < len; i++) {
 422         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 423         buf += 2;
 424     }
 425 }
 426
 427 /* return -1 if error, 0 if OK */
 428 static int put_packet_binary(GDBState *s, const char *buf, int len)
 429 {
 430     int csum, i;
 431     uint8_t *p;
 432
 433     for(;;) {
 434         p = s->last_packet;
 435         *(p++) = '$';
 436         memcpy(p, buf, len);
 437         p += len;
 438         csum = 0;
 439         for(i = 0; i < len; i++) {
 440             csum += buf[i];
 441         }
 442         *(p++) = '#';
 443         *(p++) = tohex((csum >> 4) & 0xf);
 444         *(p++) = tohex((csum) & 0xf);
 445
 446         s->last_packet_len = p - s->last_packet;
 447         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 448
 449 #ifdef CONFIG_USER_ONLY
 450         i = get_char(s);
 451         if (i < 0)
 452             return -1;
 453         if (i == '+')
 454             break;
 455 #else
 456         break;
 457 #endif
 458     }
 459     return 0;
 460 }
 461
 462 /* return -1 if error, 0 if OK */
 463 static int put_packet(GDBState *s, const char *buf)
 464 {
 465 #ifdef DEBUG_GDB
 466     printf("reply='%s'\n", buf);
 467 #endif
 468
 469     return put_packet_binary(s, buf, strlen(buf));
 470 }
 471
 472 /* The GDB remote protocol transfers values in target byte order.  This means
 473    we can use the raw memory access routines to access the value buffer.
 474    Conveniently, these also handle the case where the buffer is mis-aligned.
 475  */
 476 #define GET_REG8(val) do { \
 477     stb_p(mem_buf, val); \
 478     return 1; \
 479     } while(0)
 480 #define GET_REG16(val) do { \
 481     stw_p(mem_buf, val); \
 482     return 2; \
 483     } while(0)
 484 #define GET_REG32(val) do { \
 485     stl_p(mem_buf, val); \
 486     return 4; \
 487     } while(0)
 488 #define GET_REG64(val) do { \
 489     stq_p(mem_buf, val); \
 490     return 8; \
 491     } while(0)
 492
 493 #if TARGET_LONG_BITS == 64
 494 #define GET_REGL(val) GET_REG64(val)
 495 #define ldtul_p(addr) ldq_p(addr)
 496 #else
 497 #define GET_REGL(val) GET_REG32(val)
 498 #define ldtul_p(addr) ldl_p(addr)
 499 #endif
 500
 501 #if defined(TARGET_I386)
 502
 503 #ifdef TARGET_X86_64
 504 static const int gpr_map[16] = {
 505     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 506     8, 9, 10, 11, 12, 13, 14, 15
 507 };
 508 #else
 509 #define gpr_map gpr_map32
 510 #endif
 511 static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
 512
 513 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
 514
 515 #define IDX_IP_REG      CPU_NB_REGS
 516 #define IDX_FLAGS_REG   (IDX_IP_REG + 1)
 517 #define IDX_SEG_REGS    (IDX_FLAGS_REG + 1)
 518 #define IDX_FP_REGS     (IDX_SEG_REGS + 6)
 519 #define IDX_XMM_REGS    (IDX_FP_REGS + 16)
 520 #define IDX_MXCSR_REG   (IDX_XMM_REGS + CPU_NB_REGS)
 521
 522 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 523 {
 524     if (n < CPU_NB_REGS) {
 525         if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 526             GET_REG64(env->regs[gpr_map[n]]);
 527         } else if (n < CPU_NB_REGS32) {
 528             GET_REG32(env->regs[gpr_map32[n]]);
 529         }
 530     } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
 531 #ifdef USE_X86LDOUBLE
 532         /* FIXME: byteswap float values - after fixing fpregs layout. */
 533         memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
 534 #else
 535         memset(mem_buf, 0, 10);
 536 #endif
 537         return 10;
 538     } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
 539         n -= IDX_XMM_REGS;
 540         if (n < CPU_NB_REGS32 ||
 541             (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
 542             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
 543             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
 544             return 16;
 545         }
 546     } else {
 547         switch (n) {
 548         case IDX_IP_REG:
 549             if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 550                 GET_REG64(env->eip);
 551             } else {
 552                 GET_REG32(env->eip);
 553             }
 554         case IDX_FLAGS_REG: GET_REG32(env->eflags);
 555
 556         case IDX_SEG_REGS:     GET_REG32(env->segs[R_CS].selector);
 557         case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector);
 558         case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector);
 559         case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector);
 560         case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector);
 561         case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector);
 562
 563         case IDX_FP_REGS + 8:  GET_REG32(env->fpuc);
 564         case IDX_FP_REGS + 9:  GET_REG32((env->fpus & ~0x3800) |
 565                                          (env->fpstt & 0x7) << 11);
 566         case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */
 567         case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */
 568         case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */
 569         case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */
 570         case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */
 571         case IDX_FP_REGS + 15: GET_REG32(0); /* fop */
 572
 573         case IDX_MXCSR_REG: GET_REG32(env->mxcsr);
 574         }
 575     }
 576     return 0;
 577 }
 578
 579 static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
 580 {
 581     uint16_t selector = ldl_p(mem_buf);
 582
 583     if (selector != env->segs[sreg].selector) {
 584 #if defined(CONFIG_USER_ONLY)
 585         cpu_x86_load_seg(env, sreg, selector);
 586 #else
 587         unsigned int limit, flags;
 588         target_ulong base;
 589
 590         if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
 591             base = selector << 4;
 592             limit = 0xffff;
 593             flags = 0;
 594         } else {
 595             if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags))
 596                 return 4;
 597         }
 598         cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags);
 599 #endif
 600     }
 601     return 4;
 602 }
 603
 604 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 605 {
 606     uint32_t tmp;
 607
 608     if (n < CPU_NB_REGS) {
 609         if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 610             env->regs[gpr_map[n]] = ldtul_p(mem_buf);
 611             return sizeof(target_ulong);
 612         } else if (n < CPU_NB_REGS32) {
 613             n = gpr_map32[n];
 614             env->regs[n] &= ~0xffffffffUL;
 615             env->regs[n] |= (uint32_t)ldl_p(mem_buf);
 616             return 4;
 617         }
 618     } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
 619 #ifdef USE_X86LDOUBLE
 620         /* FIXME: byteswap float values - after fixing fpregs layout. */
 621         memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
 622 #endif
 623         return 10;
 624     } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
 625         n -= IDX_XMM_REGS;
 626         if (n < CPU_NB_REGS32 ||
 627             (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
 628             env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf);
 629             env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8);
 630             return 16;
 631         }
 632     } else {
 633         switch (n) {
 634         case IDX_IP_REG:
 635             if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 636                 env->eip = ldq_p(mem_buf);
 637                 return 8;
 638             } else {
 639                 env->eip &= ~0xffffffffUL;
 640                 env->eip |= (uint32_t)ldl_p(mem_buf);
 641                 return 4;
 642             }
 643         case IDX_FLAGS_REG:
 644             env->eflags = ldl_p(mem_buf);
 645             return 4;
 646
 647         case IDX_SEG_REGS:     return cpu_x86_gdb_load_seg(env, R_CS, mem_buf);
 648         case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf);
 649         case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf);
 650         case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf);
 651         case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf);
 652         case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf);
 653
 654         case IDX_FP_REGS + 8:
 655             env->fpuc = ldl_p(mem_buf);
 656             return 4;
 657         case IDX_FP_REGS + 9:
 658             tmp = ldl_p(mem_buf);
 659             env->fpstt = (tmp >> 11) & 7;
 660             env->fpus = tmp & ~0x3800;
 661             return 4;
 662         case IDX_FP_REGS + 10: /* ftag */  return 4;
 663         case IDX_FP_REGS + 11: /* fiseg */ return 4;
 664         case IDX_FP_REGS + 12: /* fioff */ return 4;
 665         case IDX_FP_REGS + 13: /* foseg */ return 4;
 666         case IDX_FP_REGS + 14: /* fooff */ return 4;
 667         case IDX_FP_REGS + 15: /* fop */   return 4;
 668
 669         case IDX_MXCSR_REG:
 670             env->mxcsr = ldl_p(mem_buf);
 671             return 4;
 672         }
 673     }
 674     /* Unrecognised register.  */
 675     return 0;
 676 }
 677
 678 #elif defined (TARGET_PPC)
 679
 680 /* Old gdb always expects FP registers.  Newer (xml-aware) gdb only
 681    expects whatever the target description contains.  Due to a
 682    historical mishap the FP registers appear in between core integer
 683    regs and PC, MSR, CR, and so forth.  We hack round this by giving the
 684    FP regs zero size when talking to a newer gdb.  */
 685 #define NUM_CORE_REGS 71
 686 #if defined (TARGET_PPC64)
 687 #define GDB_CORE_XML "power64-core.xml"
 688 #else
 689 #define GDB_CORE_XML "power-core.xml"
 690 #endif
 691
 692 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 693 {
 694     if (n < 32) {
 695         /* gprs */
 696         GET_REGL(env->gpr[n]);
 697     } else if (n < 64) {
 698         /* fprs */
 699         if (gdb_has_xml)
 700             return 0;
 701         stfq_p(mem_buf, env->fpr[n-32]);
 702         return 8;
 703     } else {
 704         switch (n) {
 705         case 64: GET_REGL(env->nip);
 706         case 65: GET_REGL(env->msr);
 707         case 66:
 708             {
 709                 uint32_t cr = 0;
 710                 int i;
 711                 for (i = 0; i < 8; i++)
 712                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
 713                 GET_REG32(cr);
 714             }
 715         case 67: GET_REGL(env->lr);
 716         case 68: GET_REGL(env->ctr);
 717         case 69: GET_REGL(env->xer);
 718         case 70:
 719             {
 720                 if (gdb_has_xml)
 721                     return 0;
 722                 GET_REG32(0); /* fpscr */
 723             }
 724         }
 725     }
 726     return 0;
 727 }
 728
 729 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 730 {
 731     if (n < 32) {
 732         /* gprs */
 733         env->gpr[n] = ldtul_p(mem_buf);
 734         return sizeof(target_ulong);
 735     } else if (n < 64) {
 736         /* fprs */
 737         if (gdb_has_xml)
 738             return 0;
 739         env->fpr[n-32] = ldfq_p(mem_buf);
 740         return 8;
 741     } else {
 742         switch (n) {
 743         case 64:
 744             env->nip = ldtul_p(mem_buf);
 745             return sizeof(target_ulong);
 746         case 65:
 747             ppc_store_msr(env, ldtul_p(mem_buf));
 748             return sizeof(target_ulong);
 749         case 66:
 750             {
 751                 uint32_t cr = ldl_p(mem_buf);
 752                 int i;
 753                 for (i = 0; i < 8; i++)
 754                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
 755                 return 4;
 756             }
 757         case 67:
 758             env->lr = ldtul_p(mem_buf);
 759             return sizeof(target_ulong);
 760         case 68:
 761             env->ctr = ldtul_p(mem_buf);
 762             return sizeof(target_ulong);
 763         case 69:
 764             env->xer = ldtul_p(mem_buf);
 765             return sizeof(target_ulong);
 766         case 70:
 767             /* fpscr */
 768             if (gdb_has_xml)
 769                 return 0;
 770             return 4;
 771         }
 772     }
 773     return 0;
 774 }
 775
 776 #elif defined (TARGET_SPARC)
 777
 778 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
 779 #define NUM_CORE_REGS 86
 780 #else
 781 #define NUM_CORE_REGS 72
 782 #endif
 783
 784 #ifdef TARGET_ABI32
 785 #define GET_REGA(val) GET_REG32(val)
 786 #else
 787 #define GET_REGA(val) GET_REGL(val)
 788 #endif
 789
 790 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 791 {
 792     if (n < 8) {
 793         /* g0..g7 */
 794         GET_REGA(env->gregs[n]);
 795     }
 796     if (n < 32) {
 797         /* register window */
 798         GET_REGA(env->regwptr[n - 8]);
 799     }
 800 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 801     if (n < 64) {
 802         /* fprs */
 803         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 804     }
 805     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 806     switch (n) {
 807     case 64: GET_REGA(env->y);
 808     case 65: GET_REGA(GET_PSR(env));
 809     case 66: GET_REGA(env->wim);
 810     case 67: GET_REGA(env->tbr);
 811     case 68: GET_REGA(env->pc);
 812     case 69: GET_REGA(env->npc);
 813     case 70: GET_REGA(env->fsr);
 814     case 71: GET_REGA(0); /* csr */
 815     default: GET_REGA(0);
 816     }
 817 #else
 818     if (n < 64) {
 819         /* f0-f31 */
 820         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 821     }
 822     if (n < 80) {
 823         /* f32-f62 (double width, even numbers only) */
 824         uint64_t val;
 825
 826         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
 827         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
 828         GET_REG64(val);
 829     }
 830     switch (n) {
 831     case 80: GET_REGL(env->pc);
 832     case 81: GET_REGL(env->npc);
 833     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
 834                            ((env->asi & 0xff) << 24) |
 835                            ((env->pstate & 0xfff) << 8) |
 836                            GET_CWP64(env));
 837     case 83: GET_REGL(env->fsr);
 838     case 84: GET_REGL(env->fprs);
 839     case 85: GET_REGL(env->y);
 840     }
 841 #endif
 842     return 0;
 843 }
 844
 845 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 846 {
 847 #if defined(TARGET_ABI32)
 848     abi_ulong tmp;
 849
 850     tmp = ldl_p(mem_buf);
 851 #else
 852     target_ulong tmp;
 853
 854     tmp = ldtul_p(mem_buf);
 855 #endif
 856
 857     if (n < 8) {
 858         /* g0..g7 */
 859         env->gregs[n] = tmp;
 860     } else if (n < 32) {
 861         /* register window */
 862         env->regwptr[n - 8] = tmp;
 863     }
 864 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 865     else if (n < 64) {
 866         /* fprs */
 867         *((uint32_t *)&env->fpr[n - 32]) = tmp;
 868     } else {
 869         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 870         switch (n) {
 871         case 64: env->y = tmp; break;
 872         case 65: PUT_PSR(env, tmp); break;
 873         case 66: env->wim = tmp; break;
 874         case 67: env->tbr = tmp; break;
 875         case 68: env->pc = tmp; break;
 876         case 69: env->npc = tmp; break;
 877         case 70: env->fsr = tmp; break;
 878         default: return 0;
 879         }
 880     }
 881     return 4;
 882 #else
 883     else if (n < 64) {
 884         /* f0-f31 */
 885         env->fpr[n] = ldfl_p(mem_buf);
 886         return 4;
 887     } else if (n < 80) {
 888         /* f32-f62 (double width, even numbers only) */
 889         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
 890         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
 891     } else {
 892         switch (n) {
 893         case 80: env->pc = tmp; break;
 894         case 81: env->npc = tmp; break;
 895         case 82:
 896             PUT_CCR(env, tmp >> 32);
 897             env->asi = (tmp >> 24) & 0xff;
 898             env->pstate = (tmp >> 8) & 0xfff;
 899             PUT_CWP64(env, tmp & 0xff);
 900             break;
 901         case 83: env->fsr = tmp; break;
 902         case 84: env->fprs = tmp; break;
 903         case 85: env->y = tmp; break;
 904         default: return 0;
 905         }
 906     }
 907     return 8;
 908 #endif
 909 }
 910 #elif defined (TARGET_ARM)
 911
 912 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
 913    whatever the target description contains.  Due to a historical mishap
 914    the FPA registers appear in between core integer regs and the CPSR.
 915    We hack round this by giving the FPA regs zero size when talking to a
 916    newer gdb.  */
 917 #define NUM_CORE_REGS 26
 918 #define GDB_CORE_XML "arm-core.xml"
 919
 920 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 921 {
 922     if (n < 16) {
 923         /* Core integer register.  */
 924         GET_REG32(env->regs[n]);
 925     }
 926     if (n < 24) {
 927         /* FPA registers.  */
 928         if (gdb_has_xml)
 929             return 0;
 930         memset(mem_buf, 0, 12);
 931         return 12;
 932     }
 933     switch (n) {
 934     case 24:
 935         /* FPA status register.  */
 936         if (gdb_has_xml)
 937             return 0;
 938         GET_REG32(0);
 939     case 25:
 940         /* CPSR */
 941         GET_REG32(cpsr_read(env));
 942     }
 943     /* Unknown register.  */
 944     return 0;
 945 }
 946
 947 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 948 {
 949     uint32_t tmp;
 950
 951     tmp = ldl_p(mem_buf);
 952
 953     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
 954        cause problems if we ever implement the Jazelle DBX extensions.  */
 955     if (n == 15)
 956         tmp &= ~1;
 957
 958     if (n < 16) {
 959         /* Core integer register.  */
 960         env->regs[n] = tmp;
 961         return 4;
 962     }
 963     if (n < 24) { /* 16-23 */
 964         /* FPA registers (ignored).  */
 965         if (gdb_has_xml)
 966             return 0;
 967         return 12;
 968     }
 969     switch (n) {
 970     case 24:
 971         /* FPA status register (ignored).  */
 972         if (gdb_has_xml)
 973             return 0;
 974         return 4;
 975     case 25:
 976         /* CPSR */
 977         cpsr_write (env, tmp, 0xffffffff);
 978         return 4;
 979     }
 980     /* Unknown register.  */
 981     return 0;
 982 }
 983
 984 #elif defined (TARGET_M68K)
 985
 986 #define NUM_CORE_REGS 18
 987
 988 #define GDB_CORE_XML "cf-core.xml"
 989
 990 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 991 {
 992     if (n < 8) {
 993         /* D0-D7 */
 994         GET_REG32(env->dregs[n]);
 995     } else if (n < 16) {
 996         /* A0-A7 */
 997         GET_REG32(env->aregs[n - 8]);
 998     } else {
 999         switch (n) {
1000         case 16: GET_REG32(env->sr);
1001         case 17: GET_REG32(env->pc);
1002         }
1003     }
1004     /* FP registers not included here because they vary between
1005        ColdFire and m68k.  Use XML bits for these.  */
1006     return 0;
1007 }
1008
1009 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1010 {
1011     uint32_t tmp;
1012
1013     tmp = ldl_p(mem_buf);
1014
1015     if (n < 8) {
1016         /* D0-D7 */
1017         env->dregs[n] = tmp;
1018     } else if (n < 8) {
1019         /* A0-A7 */
1020         env->aregs[n - 8] = tmp;
1021     } else {
1022         switch (n) {
1023         case 16: env->sr = tmp; break;
1024         case 17: env->pc = tmp; break;
1025         default: return 0;
1026         }
1027     }
1028     return 4;
1029 }
1030 #elif defined (TARGET_MIPS)
1031
1032 #define NUM_CORE_REGS 73
1033
1034 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1035 {
1036     if (n < 32) {
1037         GET_REGL(env->active_tc.gpr[n]);
1038     }
1039     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
1040         if (n >= 38 && n < 70) {
1041             if (env->CP0_Status & (1 << CP0St_FR))
1042                 GET_REGL(env->active_fpu.fpr[n - 38].d);
1043             else
1044                 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
1045         }
1046         switch (n) {
1047         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
1048         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
1049         }
1050     }
1051     switch (n) {
1052     case 32: GET_REGL((int32_t)env->CP0_Status);
1053     case 33: GET_REGL(env->active_tc.LO[0]);
1054     case 34: GET_REGL(env->active_tc.HI[0]);
1055     case 35: GET_REGL(env->CP0_BadVAddr);
1056     case 36: GET_REGL((int32_t)env->CP0_Cause);
1057     case 37: GET_REGL(env->active_tc.PC);
1058     case 72: GET_REGL(0); /* fp */
1059     case 89: GET_REGL((int32_t)env->CP0_PRid);
1060     }
1061     if (n >= 73 && n <= 88) {
1062         /* 16 embedded regs.  */
1063         GET_REGL(0);
1064     }
1065
1066     return 0;
1067 }
1068
1069 /* convert MIPS rounding mode in FCR31 to IEEE library */
1070 static unsigned int ieee_rm[] =
1071   {
1072     float_round_nearest_even,
1073     float_round_to_zero,
1074     float_round_up,
1075     float_round_down
1076   };
1077 #define RESTORE_ROUNDING_MODE \
1078     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1079
1080 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1081 {
1082     target_ulong tmp;
1083
1084     tmp = ldtul_p(mem_buf);
1085
1086     if (n < 32) {
1087         env->active_tc.gpr[n] = tmp;
1088         return sizeof(target_ulong);
1089     }
1090     if (env->CP0_Config1 & (1 << CP0C1_FP)
1091             && n >= 38 && n < 73) {
1092         if (n < 70) {
1093             if (env->CP0_Status & (1 << CP0St_FR))
1094               env->active_fpu.fpr[n - 38].d = tmp;
1095             else
1096               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1097         }
1098         switch (n) {
1099         case 70:
1100             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1101             /* set rounding mode */
1102             RESTORE_ROUNDING_MODE;
1103 #ifndef CONFIG_SOFTFLOAT
1104             /* no floating point exception for native float */
1105             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1106 #endif
1107             break;
1108         case 71: env->active_fpu.fcr0 = tmp; break;
1109         }
1110         return sizeof(target_ulong);
1111     }
1112     switch (n) {
1113     case 32: env->CP0_Status = tmp; break;
1114     case 33: env->active_tc.LO[0] = tmp; break;
1115     case 34: env->active_tc.HI[0] = tmp; break;
1116     case 35: env->CP0_BadVAddr = tmp; break;
1117     case 36: env->CP0_Cause = tmp; break;
1118     case 37: env->active_tc.PC = tmp; break;
1119     case 72: /* fp, ignored */ break;
1120     default:
1121         if (n > 89)
1122             return 0;
1123         /* Other registers are readonly.  Ignore writes.  */
1124         break;
1125     }
1126
1127     return sizeof(target_ulong);
1128 }
1129 #elif defined (TARGET_SH4)
1130
1131 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1132 /* FIXME: We should use XML for this.  */
1133
1134 #define NUM_CORE_REGS 59
1135
1136 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1137 {
1138     if (n < 8) {
1139         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1140             GET_REGL(env->gregs[n + 16]);
1141         } else {
1142             GET_REGL(env->gregs[n]);
1143         }
1144     } else if (n < 16) {
1145         GET_REGL(env->gregs[n - 8]);
1146     } else if (n >= 25 && n < 41) {
1147         GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1148     } else if (n >= 43 && n < 51) {
1149         GET_REGL(env->gregs[n - 43]);
1150     } else if (n >= 51 && n < 59) {
1151         GET_REGL(env->gregs[n - (51 - 16)]);
1152     }
1153     switch (n) {
1154     case 16: GET_REGL(env->pc);
1155     case 17: GET_REGL(env->pr);
1156     case 18: GET_REGL(env->gbr);
1157     case 19: GET_REGL(env->vbr);
1158     case 20: GET_REGL(env->mach);
1159     case 21: GET_REGL(env->macl);
1160     case 22: GET_REGL(env->sr);
1161     case 23: GET_REGL(env->fpul);
1162     case 24: GET_REGL(env->fpscr);
1163     case 41: GET_REGL(env->ssr);
1164     case 42: GET_REGL(env->spc);
1165     }
1166
1167     return 0;
1168 }
1169
1170 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1171 {
1172     uint32_t tmp;
1173
1174     tmp = ldl_p(mem_buf);
1175
1176     if (n < 8) {
1177         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1178             env->gregs[n + 16] = tmp;
1179         } else {
1180             env->gregs[n] = tmp;
1181         }
1182         return 4;
1183     } else if (n < 16) {
1184         env->gregs[n - 8] = tmp;
1185         return 4;
1186     } else if (n >= 25 && n < 41) {
1187         env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1188     } else if (n >= 43 && n < 51) {
1189         env->gregs[n - 43] = tmp;
1190         return 4;
1191     } else if (n >= 51 && n < 59) {
1192         env->gregs[n - (51 - 16)] = tmp;
1193         return 4;
1194     }
1195     switch (n) {
1196     case 16: env->pc = tmp;
1197     case 17: env->pr = tmp;
1198     case 18: env->gbr = tmp;
1199     case 19: env->vbr = tmp;
1200     case 20: env->mach = tmp;
1201     case 21: env->macl = tmp;
1202     case 22: env->sr = tmp;
1203     case 23: env->fpul = tmp;
1204     case 24: env->fpscr = tmp;
1205     case 41: env->ssr = tmp;
1206     case 42: env->spc = tmp;
1207     default: return 0;
1208     }
1209
1210     return 4;
1211 }
1212 #elif defined (TARGET_MICROBLAZE)
1213
1214 #define NUM_CORE_REGS (32 + 5)
1215
1216 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1217 {
1218     if (n < 32) {
1219         GET_REG32(env->regs[n]);
1220     } else {
1221         GET_REG32(env->sregs[n - 32]);
1222     }
1223     return 0;
1224 }
1225
1226 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1227 {
1228     uint32_t tmp;
1229
1230     if (n > NUM_CORE_REGS)
1231         return 0;
1232
1233     tmp = ldl_p(mem_buf);
1234
1235     if (n < 32) {
1236         env->regs[n] = tmp;
1237     } else {
1238         env->sregs[n - 32] = tmp;
1239     }
1240     return 4;
1241 }
1242 #elif defined (TARGET_CRIS)
1243
1244 #define NUM_CORE_REGS 49
1245
1246 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1247 {
1248     uint8_t srs;
1249
1250     srs = env->pregs[PR_SRS];
1251     if (n < 16) {
1252         GET_REG32(env->regs[n]);
1253     }
1254
1255     if (n >= 21 && n < 32) {
1256         GET_REG32(env->pregs[n - 16]);
1257     }
1258     if (n >= 33 && n < 49) {
1259         GET_REG32(env->sregs[srs][n - 33]);
1260     }
1261     switch (n) {
1262     case 16: GET_REG8(env->pregs[0]);
1263     case 17: GET_REG8(env->pregs[1]);
1264     case 18: GET_REG32(env->pregs[2]);
1265     case 19: GET_REG8(srs);
1266     case 20: GET_REG16(env->pregs[4]);
1267     case 32: GET_REG32(env->pc);
1268     }
1269
1270     return 0;
1271 }
1272
1273 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1274 {
1275     uint32_t tmp;
1276
1277     if (n > 49)
1278         return 0;
1279
1280     tmp = ldl_p(mem_buf);
1281
1282     if (n < 16) {
1283         env->regs[n] = tmp;
1284     }
1285
1286     if (n >= 21 && n < 32) {
1287         env->pregs[n - 16] = tmp;
1288     }
1289
1290     /* FIXME: Should support function regs be writable?  */
1291     switch (n) {
1292     case 16: return 1;
1293     case 17: return 1;
1294     case 18: env->pregs[PR_PID] = tmp; break;
1295     case 19: return 1;
1296     case 20: return 2;
1297     case 32: env->pc = tmp; break;
1298     }
1299
1300     return 4;
1301 }
1302 #elif defined (TARGET_ALPHA)
1303
1304 #define NUM_CORE_REGS 65
1305
1306 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1307 {
1308     if (n < 31) {
1309        GET_REGL(env->ir[n]);
1310     }
1311     else if (n == 31) {
1312        GET_REGL(0);
1313     }
1314     else if (n<63) {
1315        uint64_t val;
1316
1317        val = *((uint64_t *)&env->fir[n-32]);
1318        GET_REGL(val);
1319     }
1320     else if (n==63) {
1321        GET_REGL(env->fpcr);
1322     }
1323     else if (n==64) {
1324        GET_REGL(env->pc);
1325     }
1326     else {
1327        GET_REGL(0);
1328     }
1329
1330     return 0;
1331 }
1332
1333 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1334 {
1335     target_ulong tmp;
1336     tmp = ldtul_p(mem_buf);
1337
1338     if (n < 31) {
1339         env->ir[n] = tmp;
1340     }
1341
1342     if (n > 31 && n < 63) {
1343         env->fir[n - 32] = ldfl_p(mem_buf);
1344     }
1345
1346     if (n == 64 ) {
1347        env->pc=tmp;
1348     }
1349
1350     return 8;
1351 }
1352 #else
1353
1354 #define NUM_CORE_REGS 0
1355
1356 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1357 {
1358     return 0;
1359 }
1360
1361 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1362 {
1363     return 0;
1364 }
1365
1366 #endif
1367
1368 static int num_g_regs = NUM_CORE_REGS;
1369
1370 #ifdef GDB_CORE_XML
1371 /* Encode data using the encoding for 'x' packets.  */
1372 static int memtox(char *buf, const char *mem, int len)
1373 {
1374     char *p = buf;
1375     char c;
1376
1377     while (len--) {
1378         c = *(mem++);
1379         switch (c) {
1380         case '#': case '$': case '*': case '}':
1381             *(p++) = '}';
1382             *(p++) = c ^ 0x20;
1383             break;
1384         default:
1385             *(p++) = c;
1386             break;
1387         }
1388     }
1389     return p - buf;
1390 }
1391
1392 static const char *get_feature_xml(const char *p, const char **newp)
1393 {
1394     extern const char *const xml_builtin[][2];
1395     size_t len;
1396     int i;
1397     const char *name;
1398     static char target_xml[1024];
1399
1400     len = 0;
1401     while (p[len] && p[len] != ':')
1402         len++;
1403     *newp = p + len;
1404
1405     name = NULL;
1406     if (strncmp(p, "target.xml", len) == 0) {
1407         /* Generate the XML description for this CPU.  */
1408         if (!target_xml[0]) {
1409             GDBRegisterState *r;
1410
1411             snprintf(target_xml, sizeof(target_xml),
1412                      "<?xml version=\"1.0\"?>"
1413                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1414                      "<target>"
1415                      "<xi:include href=\"%s\"/>",
1416                      GDB_CORE_XML);
1417
1418             for (r = first_cpu->gdb_regs; r; r = r->next) {
1419                 pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1420                 pstrcat(target_xml, sizeof(target_xml), r->xml);
1421                 pstrcat(target_xml, sizeof(target_xml), "\"/>");
1422             }
1423             pstrcat(target_xml, sizeof(target_xml), "</target>");
1424         }
1425         return target_xml;
1426     }
1427     for (i = 0; ; i++) {
1428         name = xml_builtin[i][0];
1429         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1430             break;
1431     }
1432     return name ? xml_builtin[i][1] : NULL;
1433 }
1434 #endif
1435
1436 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1437 {
1438     GDBRegisterState *r;
1439
1440     if (reg < NUM_CORE_REGS)
1441         return cpu_gdb_read_register(env, mem_buf, reg);
1442
1443     for (r = env->gdb_regs; r; r = r->next) {
1444         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1445             return r->get_reg(env, mem_buf, reg - r->base_reg);
1446         }
1447     }
1448     return 0;
1449 }
1450
1451 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1452 {
1453     GDBRegisterState *r;
1454
1455     if (reg < NUM_CORE_REGS)
1456         return cpu_gdb_write_register(env, mem_buf, reg);
1457
1458     for (r = env->gdb_regs; r; r = r->next) {
1459         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1460             return r->set_reg(env, mem_buf, reg - r->base_reg);
1461         }
1462     }
1463     return 0;
1464 }
1465
1466 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1467    specifies the first register number and these registers are included in
1468    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1469    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1470  */
1471
1472 void gdb_register_coprocessor(CPUState * env,
1473                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1474                              int num_regs, const char *xml, int g_pos)
1475 {
1476     GDBRegisterState *s;
1477     GDBRegisterState **p;
1478     static int last_reg = NUM_CORE_REGS;
1479
1480     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1481     s->base_reg = last_reg;
1482     s->num_regs = num_regs;
1483     s->get_reg = get_reg;
1484     s->set_reg = set_reg;
1485     s->xml = xml;
1486     p = &env->gdb_regs;
1487     while (*p) {
1488         /* Check for duplicates.  */
1489         if (strcmp((*p)->xml, xml) == 0)
1490             return;
1491         p = &(*p)->next;
1492     }
1493     /* Add to end of list.  */
1494     last_reg += num_regs;
1495     *p = s;
1496     if (g_pos) {
1497         if (g_pos != s->base_reg) {
1498             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1499                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1500         } else {
1501             num_g_regs = last_reg;
1502         }
1503     }
1504 }
1505
1506 #ifndef CONFIG_USER_ONLY
1507 static const int xlat_gdb_type[] = {
1508     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1509     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1510     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1511 };
1512 #endif
1513
1514 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1515 {
1516     CPUState *env;
1517     int err = 0;
1518
1519     if (kvm_enabled())
1520         return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1521
1522     switch (type) {
1523     case GDB_BREAKPOINT_SW:
1524     case GDB_BREAKPOINT_HW:
1525         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1526             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1527             if (err)
1528                 break;
1529         }
1530         return err;
1531 #ifndef CONFIG_USER_ONLY
1532     case GDB_WATCHPOINT_WRITE:
1533     case GDB_WATCHPOINT_READ:
1534     case GDB_WATCHPOINT_ACCESS:
1535         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1536             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1537                                         NULL);
1538             if (err)
1539                 break;
1540         }
1541         return err;
1542 #endif
1543     default:
1544         return -ENOSYS;
1545     }
1546 }
1547
1548 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1549 {
1550     CPUState *env;
1551     int err = 0;
1552
1553     if (kvm_enabled())
1554         return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1555
1556     switch (type) {
1557     case GDB_BREAKPOINT_SW:
1558     case GDB_BREAKPOINT_HW:
1559         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1560             err = cpu_breakpoint_remove(env, addr, BP_GDB);
1561             if (err)
1562                 break;
1563         }
1564         return err;
1565 #ifndef CONFIG_USER_ONLY
1566     case GDB_WATCHPOINT_WRITE:
1567     case GDB_WATCHPOINT_READ:
1568     case GDB_WATCHPOINT_ACCESS:
1569         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1570             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1571             if (err)
1572                 break;
1573         }
1574         return err;
1575 #endif
1576     default:
1577         return -ENOSYS;
1578     }
1579 }
1580
1581 static void gdb_breakpoint_remove_all(void)
1582 {
1583     CPUState *env;
1584
1585     if (kvm_enabled()) {
1586         kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1587         return;
1588     }
1589
1590     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1591         cpu_breakpoint_remove_all(env, BP_GDB);
1592 #ifndef CONFIG_USER_ONLY
1593         cpu_watchpoint_remove_all(env, BP_GDB);
1594 #endif
1595     }
1596 }
1597
1598 static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1599 {
1600 #if defined(TARGET_I386)
1601     cpu_synchronize_state(s->c_cpu);
1602     s->c_cpu->eip = pc;
1603 #elif defined (TARGET_PPC)
1604     s->c_cpu->nip = pc;
1605 #elif defined (TARGET_SPARC)
1606     s->c_cpu->pc = pc;
1607     s->c_cpu->npc = pc + 4;
1608 #elif defined (TARGET_ARM)
1609     s->c_cpu->regs[15] = pc;
1610 #elif defined (TARGET_SH4)
1611     s->c_cpu->pc = pc;
1612 #elif defined (TARGET_MIPS)
1613     s->c_cpu->active_tc.PC = pc;
1614 #elif defined (TARGET_MICROBLAZE)
1615     s->c_cpu->sregs[SR_PC] = pc;
1616 #elif defined (TARGET_CRIS)
1617     s->c_cpu->pc = pc;
1618 #elif defined (TARGET_ALPHA)
1619     s->c_cpu->pc = pc;
1620 #endif
1621 }
1622
1623 static inline int gdb_id(CPUState *env)
1624 {
1625 #if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL)
1626     return env->host_tid;
1627 #else
1628     return env->cpu_index + 1;
1629 #endif
1630 }
1631
1632 static CPUState *find_cpu(uint32_t thread_id)
1633 {
1634     CPUState *env;
1635
1636     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1637         if (gdb_id(env) == thread_id) {
1638             return env;
1639         }
1640     }
1641
1642     return NULL;
1643 }
1644
1645 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1646 {
1647     CPUState *env;
1648     const char *p;
1649     uint32_t thread;
1650     int ch, reg_size, type, res;
1651     char buf[MAX_PACKET_LENGTH];
1652     uint8_t mem_buf[MAX_PACKET_LENGTH];
1653     uint8_t *registers;
1654     target_ulong addr, len;
1655
1656 #ifdef DEBUG_GDB
1657     printf("command='%s'\n", line_buf);
1658 #endif
1659     p = line_buf;
1660     ch = *p++;
1661     switch(ch) {
1662     case '?':
1663         /* TODO: Make this return the correct value for user-mode.  */
1664         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1665                  gdb_id(s->c_cpu));
1666         put_packet(s, buf);
1667         /* Remove all the breakpoints when this query is issued,
1668          * because gdb is doing and initial connect and the state
1669          * should be cleaned up.
1670          */
1671         gdb_breakpoint_remove_all();
1672         break;
1673     case 'c':
1674         if (*p != '\0') {
1675             addr = strtoull(p, (char **)&p, 16);
1676             gdb_set_cpu_pc(s, addr);
1677         }
1678         s->signal = 0;
1679         gdb_continue(s);
1680         return RS_IDLE;
1681     case 'C':
1682         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1683         if (s->signal == -1)
1684             s->signal = 0;
1685         gdb_continue(s);
1686         return RS_IDLE;
1687     case 'v':
1688         if (strncmp(p, "Cont", 4) == 0) {
1689             int res_signal, res_thread;
1690
1691             p += 4;
1692             if (*p == '?') {
1693                 put_packet(s, "vCont;c;C;s;S");
1694                 break;
1695             }
1696             res = 0;
1697             res_signal = 0;
1698             res_thread = 0;
1699             while (*p) {
1700                 int action, signal;
1701
1702                 if (*p++ != ';') {
1703                     res = 0;
1704                     break;
1705                 }
1706                 action = *p++;
1707                 signal = 0;
1708                 if (action == 'C' || action == 'S') {
1709                     signal = strtoul(p, (char **)&p, 16);
1710                 } else if (action != 'c' && action != 's') {
1711                     res = 0;
1712                     break;
1713                 }
1714                 thread = 0;
1715                 if (*p == ':') {
1716                     thread = strtoull(p+1, (char **)&p, 16);
1717                 }
1718                 action = tolower(action);
1719                 if (res == 0 || (res == 'c' && action == 's')) {
1720                     res = action;
1721                     res_signal = signal;
1722                     res_thread = thread;
1723                 }
1724             }
1725             if (res) {
1726                 if (res_thread != -1 && res_thread != 0) {
1727                     env = find_cpu(res_thread);
1728                     if (env == NULL) {
1729                         put_packet(s, "E22");
1730                         break;
1731                     }
1732                     s->c_cpu = env;
1733                 }
1734                 if (res == 's') {
1735                     cpu_single_step(s->c_cpu, sstep_flags);
1736                 }
1737                 s->signal = res_signal;
1738                 gdb_continue(s);
1739                 return RS_IDLE;
1740             }
1741             break;
1742         } else {
1743             goto unknown_command;
1744         }
1745     case 'k':
1746         /* Kill the target */
1747         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1748         exit(0);
1749     case 'D':
1750         /* Detach packet */
1751         gdb_breakpoint_remove_all();
1752         gdb_continue(s);
1753         put_packet(s, "OK");
1754         break;
1755     case 's':
1756         if (*p != '\0') {
1757             addr = strtoull(p, (char **)&p, 16);
1758             gdb_set_cpu_pc(s, addr);
1759         }
1760         cpu_single_step(s->c_cpu, sstep_flags);
1761         gdb_continue(s);
1762         return RS_IDLE;
1763     case 'F':
1764         {
1765             target_ulong ret;
1766             target_ulong err;
1767
1768             ret = strtoull(p, (char **)&p, 16);
1769             if (*p == ',') {
1770                 p++;
1771                 err = strtoull(p, (char **)&p, 16);
1772             } else {
1773                 err = 0;
1774             }
1775             if (*p == ',')
1776                 p++;
1777             type = *p;
1778             if (gdb_current_syscall_cb)
1779                 gdb_current_syscall_cb(s->c_cpu, ret, err);
1780             if (type == 'C') {
1781                 put_packet(s, "T02");
1782             } else {
1783                 gdb_continue(s);
1784             }
1785         }
1786         break;
1787     case 'g':
1788         cpu_synchronize_state(s->g_cpu);
1789         len = 0;
1790         for (addr = 0; addr < num_g_regs; addr++) {
1791             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1792             len += reg_size;
1793         }
1794         memtohex(buf, mem_buf, len);
1795         put_packet(s, buf);
1796         break;
1797     case 'G':
1798         cpu_synchronize_state(s->g_cpu);
1799         registers = mem_buf;
1800         len = strlen(p) / 2;
1801         hextomem((uint8_t *)registers, p, len);
1802         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1803             reg_size = gdb_write_register(s->g_cpu, registers, addr);
1804             len -= reg_size;
1805             registers += reg_size;
1806         }
1807         put_packet(s, "OK");
1808         break;
1809     case 'm':
1810         addr = strtoull(p, (char **)&p, 16);
1811         if (*p == ',')
1812             p++;
1813         len = strtoull(p, NULL, 16);
1814         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1815             put_packet (s, "E14");
1816         } else {
1817             memtohex(buf, mem_buf, len);
1818             put_packet(s, buf);
1819         }
1820         break;
1821     case 'M':
1822         addr = strtoull(p, (char **)&p, 16);
1823         if (*p == ',')
1824             p++;
1825         len = strtoull(p, (char **)&p, 16);
1826         if (*p == ':')
1827             p++;
1828         hextomem(mem_buf, p, len);
1829         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1830             put_packet(s, "E14");
1831         else
1832             put_packet(s, "OK");
1833         break;
1834     case 'p':
1835         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1836            This works, but can be very slow.  Anything new enough to
1837            understand XML also knows how to use this properly.  */
1838         if (!gdb_has_xml)
1839             goto unknown_command;
1840         addr = strtoull(p, (char **)&p, 16);
1841         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1842         if (reg_size) {
1843             memtohex(buf, mem_buf, reg_size);
1844             put_packet(s, buf);
1845         } else {
1846             put_packet(s, "E14");
1847         }
1848         break;
1849     case 'P':
1850         if (!gdb_has_xml)
1851             goto unknown_command;
1852         addr = strtoull(p, (char **)&p, 16);
1853         if (*p == '=')
1854             p++;
1855         reg_size = strlen(p) / 2;
1856         hextomem(mem_buf, p, reg_size);
1857         gdb_write_register(s->g_cpu, mem_buf, addr);
1858         put_packet(s, "OK");
1859         break;
1860     case 'Z':
1861     case 'z':
1862         type = strtoul(p, (char **)&p, 16);
1863         if (*p == ',')
1864             p++;
1865         addr = strtoull(p, (char **)&p, 16);
1866         if (*p == ',')
1867             p++;
1868         len = strtoull(p, (char **)&p, 16);
1869         if (ch == 'Z')
1870             res = gdb_breakpoint_insert(addr, len, type);
1871         else
1872             res = gdb_breakpoint_remove(addr, len, type);
1873         if (res >= 0)
1874              put_packet(s, "OK");
1875         else if (res == -ENOSYS)
1876             put_packet(s, "");
1877         else
1878             put_packet(s, "E22");
1879         break;
1880     case 'H':
1881         type = *p++;
1882         thread = strtoull(p, (char **)&p, 16);
1883         if (thread == -1 || thread == 0) {
1884             put_packet(s, "OK");
1885             break;
1886         }
1887         env = find_cpu(thread);
1888         if (env == NULL) {
1889             put_packet(s, "E22");
1890             break;
1891         }
1892         switch (type) {
1893         case 'c':
1894             s->c_cpu = env;
1895             put_packet(s, "OK");
1896             break;
1897         case 'g':
1898             s->g_cpu = env;
1899             put_packet(s, "OK");
1900             break;
1901         default:
1902              put_packet(s, "E22");
1903              break;
1904         }
1905         break;
1906     case 'T':
1907         thread = strtoull(p, (char **)&p, 16);
1908         env = find_cpu(thread);
1909
1910         if (env != NULL) {
1911             put_packet(s, "OK");
1912         } else {
1913             put_packet(s, "E22");
1914         }
1915         break;
1916     case 'q':
1917     case 'Q':
1918         /* parse any 'q' packets here */
1919         if (!strcmp(p,"qemu.sstepbits")) {
1920             /* Query Breakpoint bit definitions */
1921             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1922                      SSTEP_ENABLE,
1923                      SSTEP_NOIRQ,
1924                      SSTEP_NOTIMER);
1925             put_packet(s, buf);
1926             break;
1927         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1928             /* Display or change the sstep_flags */
1929             p += 10;
1930             if (*p != '=') {
1931                 /* Display current setting */
1932                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1933                 put_packet(s, buf);
1934                 break;
1935             }
1936             p++;
1937             type = strtoul(p, (char **)&p, 16);
1938             sstep_flags = type;
1939             put_packet(s, "OK");
1940             break;
1941         } else if (strcmp(p,"C") == 0) {
1942             /* "Current thread" remains vague in the spec, so always return
1943              *  the first CPU (gdb returns the first thread). */
1944             put_packet(s, "QC1");
1945             break;
1946         } else if (strcmp(p,"fThreadInfo") == 0) {
1947             s->query_cpu = first_cpu;
1948             goto report_cpuinfo;
1949         } else if (strcmp(p,"sThreadInfo") == 0) {
1950         report_cpuinfo:
1951             if (s->query_cpu) {
1952                 snprintf(buf, sizeof(buf), "m%x", gdb_id(s->query_cpu));
1953                 put_packet(s, buf);
1954                 s->query_cpu = s->query_cpu->next_cpu;
1955             } else
1956                 put_packet(s, "l");
1957             break;
1958         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1959             thread = strtoull(p+16, (char **)&p, 16);
1960             env = find_cpu(thread);
1961             if (env != NULL) {
1962                 cpu_synchronize_state(env);
1963                 len = snprintf((char *)mem_buf, sizeof(mem_buf),
1964                                "CPU#%d [%s]", env->cpu_index,
1965                                env->halted ? "halted " : "running");
1966                 memtohex(buf, mem_buf, len);
1967                 put_packet(s, buf);
1968             }
1969             break;
1970         }
1971 #ifdef CONFIG_USER_ONLY
1972         else if (strncmp(p, "Offsets", 7) == 0) {
1973             TaskState *ts = s->c_cpu->opaque;
1974
1975             snprintf(buf, sizeof(buf),
1976                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1977                      ";Bss=" TARGET_ABI_FMT_lx,
1978                      ts->info->code_offset,
1979                      ts->info->data_offset,
1980                      ts->info->data_offset);
1981             put_packet(s, buf);
1982             break;
1983         }
1984 #else /* !CONFIG_USER_ONLY */
1985         else if (strncmp(p, "Rcmd,", 5) == 0) {
1986             int len = strlen(p + 5);
1987
1988             if ((len % 2) != 0) {
1989                 put_packet(s, "E01");
1990                 break;
1991             }
1992             hextomem(mem_buf, p + 5, len);
1993             len = len / 2;
1994             mem_buf[len++] = 0;
1995             qemu_chr_read(s->mon_chr, mem_buf, len);
1996             put_packet(s, "OK");
1997             break;
1998         }
1999 #endif /* !CONFIG_USER_ONLY */
2000         if (strncmp(p, "Supported", 9) == 0) {
2001             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
2002 #ifdef GDB_CORE_XML
2003             pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
2004 #endif
2005             put_packet(s, buf);
2006             break;
2007         }
2008 #ifdef GDB_CORE_XML
2009         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
2010             const char *xml;
2011             target_ulong total_len;
2012
2013             gdb_has_xml = 1;
2014             p += 19;
2015             xml = get_feature_xml(p, &p);
2016             if (!xml) {
2017                 snprintf(buf, sizeof(buf), "E00");
2018                 put_packet(s, buf);
2019                 break;
2020             }
2021
2022             if (*p == ':')
2023                 p++;
2024             addr = strtoul(p, (char **)&p, 16);
2025             if (*p == ',')
2026                 p++;
2027             len = strtoul(p, (char **)&p, 16);
2028
2029             total_len = strlen(xml);
2030             if (addr > total_len) {
2031                 snprintf(buf, sizeof(buf), "E00");
2032                 put_packet(s, buf);
2033                 break;
2034             }
2035             if (len > (MAX_PACKET_LENGTH - 5) / 2)
2036                 len = (MAX_PACKET_LENGTH - 5) / 2;
2037             if (len < total_len - addr) {
2038                 buf[0] = 'm';
2039                 len = memtox(buf + 1, xml + addr, len);
2040             } else {
2041                 buf[0] = 'l';
2042                 len = memtox(buf + 1, xml + addr, total_len - addr);
2043             }
2044             put_packet_binary(s, buf, len + 1);
2045             break;
2046         }
2047 #endif
2048         /* Unrecognised 'q' command.  */
2049         goto unknown_command;
2050
2051     default:
2052     unknown_command:
2053         /* put empty packet */
2054         buf[0] = '\0';
2055         put_packet(s, buf);
2056         break;
2057     }
2058     return RS_IDLE;
2059 }
2060
2061 void gdb_set_stop_cpu(CPUState *env)
2062 {
2063     gdbserver_state->c_cpu = env;
2064     gdbserver_state->g_cpu = env;
2065 }
2066
2067 #ifndef CONFIG_USER_ONLY
2068 static void gdb_vm_state_change(void *opaque, int running, int reason)
2069 {
2070     GDBState *s = gdbserver_state;
2071     CPUState *env = s->c_cpu;
2072     char buf[256];
2073     const char *type;
2074     int ret;
2075
2076     if (running || (reason != EXCP_DEBUG && reason != EXCP_INTERRUPT) ||
2077         s->state == RS_INACTIVE || s->state == RS_SYSCALL)
2078         return;
2079
2080     /* disable single step if it was enable */
2081     cpu_single_step(env, 0);
2082
2083     if (reason == EXCP_DEBUG) {
2084         if (env->watchpoint_hit) {
2085             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
2086             case BP_MEM_READ:
2087                 type = "r";
2088                 break;
2089             case BP_MEM_ACCESS:
2090                 type = "a";
2091                 break;
2092             default:
2093                 type = "";
2094                 break;
2095             }
2096             snprintf(buf, sizeof(buf),
2097                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
2098                      GDB_SIGNAL_TRAP, gdb_id(env), type,
2099                      env->watchpoint_hit->vaddr);
2100             put_packet(s, buf);
2101             env->watchpoint_hit = NULL;
2102             return;
2103         }
2104         tb_flush(env);
2105         ret = GDB_SIGNAL_TRAP;
2106     } else {
2107         ret = GDB_SIGNAL_INT;
2108     }
2109     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, gdb_id(env));
2110     put_packet(s, buf);
2111 }
2112 #endif
2113
2114 /* Send a gdb syscall request.
2115    This accepts limited printf-style format specifiers, specifically:
2116     %x  - target_ulong argument printed in hex.
2117     %lx - 64-bit argument printed in hex.
2118     %s  - string pointer (target_ulong) and length (int) pair.  */
2119 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
2120 {
2121     va_list va;
2122     char buf[256];
2123     char *p;
2124     target_ulong addr;
2125     uint64_t i64;
2126     GDBState *s;
2127
2128     s = gdbserver_state;
2129     if (!s)
2130         return;
2131     gdb_current_syscall_cb = cb;
2132     s->state = RS_SYSCALL;
2133 #ifndef CONFIG_USER_ONLY
2134     vm_stop(EXCP_DEBUG);
2135 #endif
2136     s->state = RS_IDLE;
2137     va_start(va, fmt);
2138     p = buf;
2139     *(p++) = 'F';
2140     while (*fmt) {
2141         if (*fmt == '%') {
2142             fmt++;
2143             switch (*fmt++) {
2144             case 'x':
2145                 addr = va_arg(va, target_ulong);
2146                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
2147                 break;
2148             case 'l':
2149                 if (*(fmt++) != 'x')
2150                     goto bad_format;
2151                 i64 = va_arg(va, uint64_t);
2152                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
2153                 break;
2154             case 's':
2155                 addr = va_arg(va, target_ulong);
2156                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
2157                               addr, va_arg(va, int));
2158                 break;
2159             default:
2160             bad_format:
2161                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2162                         fmt - 1);
2163                 break;
2164             }
2165         } else {
2166             *(p++) = *(fmt++);
2167         }
2168     }
2169     *p = 0;
2170     va_end(va);
2171     put_packet(s, buf);
2172 #ifdef CONFIG_USER_ONLY
2173     gdb_handlesig(s->c_cpu, 0);
2174 #else
2175     cpu_exit(s->c_cpu);
2176 #endif
2177 }
2178
2179 static void gdb_read_byte(GDBState *s, int ch)
2180 {
2181     int i, csum;
2182     uint8_t reply;
2183
2184 #ifndef CONFIG_USER_ONLY
2185     if (s->last_packet_len) {
2186         /* Waiting for a response to the last packet.  If we see the start
2187            of a new command then abandon the previous response.  */
2188         if (ch == '-') {
2189 #ifdef DEBUG_GDB
2190             printf("Got NACK, retransmitting\n");
2191 #endif
2192             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2193         }
2194 #ifdef DEBUG_GDB
2195         else if (ch == '+')
2196             printf("Got ACK\n");
2197         else
2198             printf("Got '%c' when expecting ACK/NACK\n", ch);
2199 #endif
2200         if (ch == '+' || ch == '$')
2201             s->last_packet_len = 0;
2202         if (ch != '$')
2203             return;
2204     }
2205     if (vm_running) {
2206         /* when the CPU is running, we cannot do anything except stop
2207            it when receiving a char */
2208         vm_stop(EXCP_INTERRUPT);
2209     } else
2210 #endif
2211     {
2212         switch(s->state) {
2213         case RS_IDLE:
2214             if (ch == '$') {
2215                 s->line_buf_index = 0;
2216                 s->state = RS_GETLINE;
2217             }
2218             break;
2219         case RS_GETLINE:
2220             if (ch == '#') {
2221             s->state = RS_CHKSUM1;
2222             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2223                 s->state = RS_IDLE;
2224             } else {
2225             s->line_buf[s->line_buf_index++] = ch;
2226             }
2227             break;
2228         case RS_CHKSUM1:
2229             s->line_buf[s->line_buf_index] = '\0';
2230             s->line_csum = fromhex(ch) << 4;
2231             s->state = RS_CHKSUM2;
2232             break;
2233         case RS_CHKSUM2:
2234             s->line_csum |= fromhex(ch);
2235             csum = 0;
2236             for(i = 0; i < s->line_buf_index; i++) {
2237                 csum += s->line_buf[i];
2238             }
2239             if (s->line_csum != (csum & 0xff)) {
2240                 reply = '-';
2241                 put_buffer(s, &reply, 1);
2242                 s->state = RS_IDLE;
2243             } else {
2244                 reply = '+';
2245                 put_buffer(s, &reply, 1);
2246                 s->state = gdb_handle_packet(s, s->line_buf);
2247             }
2248             break;
2249         default:
2250             abort();
2251         }
2252     }
2253 }
2254
2255 #ifdef CONFIG_USER_ONLY
2256 int
2257 gdb_queuesig (void)
2258 {
2259     GDBState *s;
2260
2261     s = gdbserver_state;
2262
2263     if (gdbserver_fd < 0 || s->fd < 0)
2264         return 0;
2265     else
2266         return 1;
2267 }
2268
2269 int
2270 gdb_handlesig (CPUState *env, int sig)
2271 {
2272   GDBState *s;
2273   char buf[256];
2274   int n;
2275
2276   s = gdbserver_state;
2277   if (gdbserver_fd < 0 || s->fd < 0)
2278     return sig;
2279
2280   /* disable single step if it was enabled */
2281   cpu_single_step(env, 0);
2282   tb_flush(env);
2283
2284   if (sig != 0)
2285     {
2286       snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2287       put_packet(s, buf);
2288     }
2289   /* put_packet() might have detected that the peer terminated the
2290      connection.  */
2291   if (s->fd < 0)
2292       return sig;
2293
2294   sig = 0;
2295   s->state = RS_IDLE;
2296   s->running_state = 0;
2297   while (s->running_state == 0) {
2298       n = read (s->fd, buf, 256);
2299       if (n > 0)
2300         {
2301           int i;
2302
2303           for (i = 0; i < n; i++)
2304             gdb_read_byte (s, buf[i]);
2305         }
2306       else if (n == 0 || errno != EAGAIN)
2307         {
2308           /* XXX: Connection closed.  Should probably wait for annother
2309              connection before continuing.  */
2310           return sig;
2311         }
2312   }
2313   sig = s->signal;
2314   s->signal = 0;
2315   return sig;
2316 }
2317
2318 /* Tell the remote gdb that the process has exited.  */
2319 void gdb_exit(CPUState *env, int code)
2320 {
2321   GDBState *s;
2322   char buf[4];
2323
2324   s = gdbserver_state;
2325   if (gdbserver_fd < 0 || s->fd < 0)
2326     return;
2327
2328   snprintf(buf, sizeof(buf), "W%02x", code);
2329   put_packet(s, buf);
2330 }
2331
2332 /* Tell the remote gdb that the process has exited due to SIG.  */
2333 void gdb_signalled(CPUState *env, int sig)
2334 {
2335   GDBState *s;
2336   char buf[4];
2337
2338   s = gdbserver_state;
2339   if (gdbserver_fd < 0 || s->fd < 0)
2340     return;
2341
2342   snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2343   put_packet(s, buf);
2344 }
2345
2346 static void gdb_accept(void)
2347 {
2348     GDBState *s;
2349     struct sockaddr_in sockaddr;
2350     socklen_t len;
2351     int val, fd;
2352
2353     for(;;) {
2354         len = sizeof(sockaddr);
2355         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2356         if (fd < 0 && errno != EINTR) {
2357             perror("accept");
2358             return;
2359         } else if (fd >= 0) {
2360             break;
2361         }
2362     }
2363
2364     /* set short latency */
2365     val = 1;
2366     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2367
2368     s = qemu_mallocz(sizeof(GDBState));
2369     s->c_cpu = first_cpu;
2370     s->g_cpu = first_cpu;
2371     s->fd = fd;
2372     gdb_has_xml = 0;
2373
2374     gdbserver_state = s;
2375
2376     fcntl(fd, F_SETFL, O_NONBLOCK);
2377 }
2378
2379 static int gdbserver_open(int port)
2380 {
2381     struct sockaddr_in sockaddr;
2382     int fd, val, ret;
2383
2384     fd = socket(PF_INET, SOCK_STREAM, 0);
2385     if (fd < 0) {
2386         perror("socket");
2387         return -1;
2388     }
2389
2390     /* allow fast reuse */
2391     val = 1;
2392     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2393
2394     sockaddr.sin_family = AF_INET;
2395     sockaddr.sin_port = htons(port);
2396     sockaddr.sin_addr.s_addr = 0;
2397     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2398     if (ret < 0) {
2399         perror("bind");
2400         return -1;
2401     }
2402     ret = listen(fd, 0);
2403     if (ret < 0) {
2404         perror("listen");
2405         return -1;
2406     }
2407     return fd;
2408 }
2409
2410 int gdbserver_start(int port)
2411 {
2412     gdbserver_fd = gdbserver_open(port);
2413     if (gdbserver_fd < 0)
2414         return -1;
2415     /* accept connections */
2416     gdb_accept();
2417     return 0;
2418 }
2419
2420 /* Disable gdb stub for child processes.  */
2421 void gdbserver_fork(CPUState *env)
2422 {
2423     GDBState *s = gdbserver_state;
2424     if (gdbserver_fd < 0 || s->fd < 0)
2425       return;
2426     close(s->fd);
2427     s->fd = -1;
2428     cpu_breakpoint_remove_all(env, BP_GDB);
2429     cpu_watchpoint_remove_all(env, BP_GDB);
2430 }
2431 #else
2432 static int gdb_chr_can_receive(void *opaque)
2433 {
2434   /* We can handle an arbitrarily large amount of data.
2435    Pick the maximum packet size, which is as good as anything.  */
2436   return MAX_PACKET_LENGTH;
2437 }
2438
2439 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2440 {
2441     int i;
2442
2443     for (i = 0; i < size; i++) {
2444         gdb_read_byte(gdbserver_state, buf[i]);
2445     }
2446 }
2447
2448 static void gdb_chr_event(void *opaque, int event)
2449 {
2450     switch (event) {
2451     case CHR_EVENT_OPENED:
2452         vm_stop(EXCP_INTERRUPT);
2453         gdb_has_xml = 0;
2454         break;
2455     default:
2456         break;
2457     }
2458 }
2459
2460 static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2461 {
2462     char buf[MAX_PACKET_LENGTH];
2463
2464     buf[0] = 'O';
2465     if (len > (MAX_PACKET_LENGTH/2) - 1)
2466         len = (MAX_PACKET_LENGTH/2) - 1;
2467     memtohex(buf + 1, (uint8_t *)msg, len);
2468     put_packet(s, buf);
2469 }
2470
2471 static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2472 {
2473     const char *p = (const char *)buf;
2474     int max_sz;
2475
2476     max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2477     for (;;) {
2478         if (len <= max_sz) {
2479             gdb_monitor_output(gdbserver_state, p, len);
2480             break;
2481         }
2482         gdb_monitor_output(gdbserver_state, p, max_sz);
2483         p += max_sz;
2484         len -= max_sz;
2485     }
2486     return len;
2487 }
2488
2489 #ifndef _WIN32
2490 static void gdb_sigterm_handler(int signal)
2491 {
2492     if (vm_running)
2493         vm_stop(EXCP_INTERRUPT);
2494 }
2495 #endif
2496
2497 int gdbserver_start(const char *device)
2498 {
2499     GDBState *s;
2500     char gdbstub_device_name[128];
2501     CharDriverState *chr = NULL;
2502     CharDriverState *mon_chr;
2503
2504     if (!device)
2505         return -1;
2506     if (strcmp(device, "none") != 0) {
2507         if (strstart(device, "tcp:", NULL)) {
2508             /* enforce required TCP attributes */
2509             snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2510                      "%s,nowait,nodelay,server", device);
2511             device = gdbstub_device_name;
2512         }
2513 #ifndef _WIN32
2514         else if (strcmp(device, "stdio") == 0) {
2515             struct sigaction act;
2516
2517             memset(&act, 0, sizeof(act));
2518             act.sa_handler = gdb_sigterm_handler;
2519             sigaction(SIGINT, &act, NULL);
2520         }
2521 #endif
2522         chr = qemu_chr_open("gdb", device, NULL);
2523         if (!chr)
2524             return -1;
2525
2526         qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2527                               gdb_chr_event, NULL);
2528     }
2529
2530     s = gdbserver_state;
2531     if (!s) {
2532         s = qemu_mallocz(sizeof(GDBState));
2533         gdbserver_state = s;
2534
2535         qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2536
2537         /* Initialize a monitor terminal for gdb */
2538         mon_chr = qemu_mallocz(sizeof(*mon_chr));
2539         mon_chr->chr_write = gdb_monitor_write;
2540         monitor_init(mon_chr, 0);
2541     } else {
2542         if (s->chr)
2543             qemu_chr_close(s->chr);
2544         mon_chr = s->mon_chr;
2545         memset(s, 0, sizeof(GDBState));
2546     }
2547     s->c_cpu = first_cpu;
2548     s->g_cpu = first_cpu;
2549     s->chr = chr;
2550     s->state = chr ? RS_IDLE : RS_INACTIVE;
2551     s->mon_chr = mon_chr;
2552
2553     return 0;
2554 }
2555 #endif