5 void cpu_save(QEMUFile
*f
, void *opaque
)
7 CPUState
*env
= (CPUState
*)opaque
;
10 cpu_synchronize_state(env
);
12 for (i
= 0; i
< 32; i
++)
13 qemu_put_betls(f
, &env
->gpr
[i
]);
14 #if !defined(TARGET_PPC64)
15 for (i
= 0; i
< 32; i
++)
16 qemu_put_betls(f
, &env
->gprh
[i
]);
18 qemu_put_betls(f
, &env
->lr
);
19 qemu_put_betls(f
, &env
->ctr
);
20 for (i
= 0; i
< 8; i
++)
21 qemu_put_be32s(f
, &env
->crf
[i
]);
22 qemu_put_betls(f
, &env
->xer
);
23 qemu_put_betls(f
, &env
->reserve_addr
);
24 qemu_put_betls(f
, &env
->msr
);
25 for (i
= 0; i
< 4; i
++)
26 qemu_put_betls(f
, &env
->tgpr
[i
]);
27 for (i
= 0; i
< 32; i
++) {
33 qemu_put_be64(f
, u
.l
);
35 qemu_put_be32s(f
, &env
->fpscr
);
36 qemu_put_sbe32s(f
, &env
->access_type
);
37 #if !defined(CONFIG_USER_ONLY)
38 #if defined(TARGET_PPC64)
39 qemu_put_betls(f
, &env
->asr
);
40 qemu_put_sbe32s(f
, &env
->slb_nr
);
42 qemu_put_betls(f
, &env
->sdr1
);
43 for (i
= 0; i
< 32; i
++)
44 qemu_put_betls(f
, &env
->sr
[i
]);
45 for (i
= 0; i
< 2; i
++)
46 for (j
= 0; j
< 8; j
++)
47 qemu_put_betls(f
, &env
->DBAT
[i
][j
]);
48 for (i
= 0; i
< 2; i
++)
49 for (j
= 0; j
< 8; j
++)
50 qemu_put_betls(f
, &env
->IBAT
[i
][j
]);
51 qemu_put_sbe32s(f
, &env
->nb_tlb
);
52 qemu_put_sbe32s(f
, &env
->tlb_per_way
);
53 qemu_put_sbe32s(f
, &env
->nb_ways
);
54 qemu_put_sbe32s(f
, &env
->last_way
);
55 qemu_put_sbe32s(f
, &env
->id_tlbs
);
56 qemu_put_sbe32s(f
, &env
->nb_pids
);
59 for (i
= 0; i
< env
->nb_tlb
; i
++) {
60 qemu_put_betls(f
, &env
->tlb
[i
].tlb6
.pte0
);
61 qemu_put_betls(f
, &env
->tlb
[i
].tlb6
.pte1
);
62 qemu_put_betls(f
, &env
->tlb
[i
].tlb6
.EPN
);
65 for (i
= 0; i
< 4; i
++)
66 qemu_put_betls(f
, &env
->pb
[i
]);
68 for (i
= 0; i
< 1024; i
++)
69 qemu_put_betls(f
, &env
->spr
[i
]);
70 qemu_put_be32s(f
, &env
->vscr
);
71 qemu_put_be64s(f
, &env
->spe_acc
);
72 qemu_put_be32s(f
, &env
->spe_fscr
);
73 qemu_put_betls(f
, &env
->msr_mask
);
74 qemu_put_be32s(f
, &env
->flags
);
75 qemu_put_sbe32s(f
, &env
->error_code
);
76 qemu_put_be32s(f
, &env
->pending_interrupts
);
77 #if !defined(CONFIG_USER_ONLY)
78 qemu_put_be32s(f
, &env
->irq_input_state
);
79 for (i
= 0; i
< POWERPC_EXCP_NB
; i
++)
80 qemu_put_betls(f
, &env
->excp_vectors
[i
]);
81 qemu_put_betls(f
, &env
->excp_prefix
);
82 qemu_put_betls(f
, &env
->hreset_excp_prefix
);
83 qemu_put_betls(f
, &env
->ivor_mask
);
84 qemu_put_betls(f
, &env
->ivpr_mask
);
85 qemu_put_betls(f
, &env
->hreset_vector
);
87 qemu_put_betls(f
, &env
->nip
);
88 qemu_put_betls(f
, &env
->hflags
);
89 qemu_put_betls(f
, &env
->hflags_nmsr
);
90 qemu_put_sbe32s(f
, &env
->mmu_idx
);
91 qemu_put_sbe32s(f
, &env
->power_mode
);
94 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
)
96 CPUState
*env
= (CPUState
*)opaque
;
99 cpu_synchronize_state(env
);
101 for (i
= 0; i
< 32; i
++)
102 qemu_get_betls(f
, &env
->gpr
[i
]);
103 #if !defined(TARGET_PPC64)
104 for (i
= 0; i
< 32; i
++)
105 qemu_get_betls(f
, &env
->gprh
[i
]);
107 qemu_get_betls(f
, &env
->lr
);
108 qemu_get_betls(f
, &env
->ctr
);
109 for (i
= 0; i
< 8; i
++)
110 qemu_get_be32s(f
, &env
->crf
[i
]);
111 qemu_get_betls(f
, &env
->xer
);
112 qemu_get_betls(f
, &env
->reserve_addr
);
113 qemu_get_betls(f
, &env
->msr
);
114 for (i
= 0; i
< 4; i
++)
115 qemu_get_betls(f
, &env
->tgpr
[i
]);
116 for (i
= 0; i
< 32; i
++) {
121 u
.l
= qemu_get_be64(f
);
124 qemu_get_be32s(f
, &env
->fpscr
);
125 qemu_get_sbe32s(f
, &env
->access_type
);
126 #if !defined(CONFIG_USER_ONLY)
127 #if defined(TARGET_PPC64)
128 qemu_get_betls(f
, &env
->asr
);
129 qemu_get_sbe32s(f
, &env
->slb_nr
);
131 qemu_get_betls(f
, &env
->sdr1
);
132 for (i
= 0; i
< 32; i
++)
133 qemu_get_betls(f
, &env
->sr
[i
]);
134 for (i
= 0; i
< 2; i
++)
135 for (j
= 0; j
< 8; j
++)
136 qemu_get_betls(f
, &env
->DBAT
[i
][j
]);
137 for (i
= 0; i
< 2; i
++)
138 for (j
= 0; j
< 8; j
++)
139 qemu_get_betls(f
, &env
->IBAT
[i
][j
]);
140 qemu_get_sbe32s(f
, &env
->nb_tlb
);
141 qemu_get_sbe32s(f
, &env
->tlb_per_way
);
142 qemu_get_sbe32s(f
, &env
->nb_ways
);
143 qemu_get_sbe32s(f
, &env
->last_way
);
144 qemu_get_sbe32s(f
, &env
->id_tlbs
);
145 qemu_get_sbe32s(f
, &env
->nb_pids
);
148 for (i
= 0; i
< env
->nb_tlb
; i
++) {
149 qemu_get_betls(f
, &env
->tlb
[i
].tlb6
.pte0
);
150 qemu_get_betls(f
, &env
->tlb
[i
].tlb6
.pte1
);
151 qemu_get_betls(f
, &env
->tlb
[i
].tlb6
.EPN
);
154 for (i
= 0; i
< 4; i
++)
155 qemu_get_betls(f
, &env
->pb
[i
]);
157 for (i
= 0; i
< 1024; i
++)
158 qemu_get_betls(f
, &env
->spr
[i
]);
159 qemu_get_be32s(f
, &env
->vscr
);
160 qemu_get_be64s(f
, &env
->spe_acc
);
161 qemu_get_be32s(f
, &env
->spe_fscr
);
162 qemu_get_betls(f
, &env
->msr_mask
);
163 qemu_get_be32s(f
, &env
->flags
);
164 qemu_get_sbe32s(f
, &env
->error_code
);
165 qemu_get_be32s(f
, &env
->pending_interrupts
);
166 #if !defined(CONFIG_USER_ONLY)
167 qemu_get_be32s(f
, &env
->irq_input_state
);
168 for (i
= 0; i
< POWERPC_EXCP_NB
; i
++)
169 qemu_get_betls(f
, &env
->excp_vectors
[i
]);
170 qemu_get_betls(f
, &env
->excp_prefix
);
171 qemu_get_betls(f
, &env
->hreset_excp_prefix
);
172 qemu_get_betls(f
, &env
->ivor_mask
);
173 qemu_get_betls(f
, &env
->ivpr_mask
);
174 qemu_get_betls(f
, &env
->hreset_vector
);
176 qemu_get_betls(f
, &env
->nip
);
177 qemu_get_betls(f
, &env
->hflags
);
178 qemu_get_betls(f
, &env
->hflags_nmsr
);
179 qemu_get_sbe32s(f
, &env
->mmu_idx
);
180 qemu_get_sbe32s(f
, &env
->power_mode
);