2 * PXA270-based Clamshell PDA platforms.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This code is licensed under the GNU GPL v2.
18 #include "qemu-timer.h"
23 #include "audio/audio.h"
27 #define REG_FMT "0x%02lx"
30 #define FLASH_BASE 0x0c000000
31 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
32 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
33 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
34 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
35 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
36 #define FLASH_FLASHIO 0x14 /* Flash I/O */
37 #define FLASH_FLASHCTL 0x18 /* Flash Control */
39 #define FLASHCTL_CE0 (1 << 0)
40 #define FLASHCTL_CLE (1 << 1)
41 #define FLASHCTL_ALE (1 << 2)
42 #define FLASHCTL_WP (1 << 3)
43 #define FLASHCTL_CE1 (1 << 4)
44 #define FLASHCTL_RYBY (1 << 5)
45 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
53 static uint32_t sl_readb(void *opaque
, target_phys_addr_t addr
)
55 SLNANDState
*s
= (SLNANDState
*) opaque
;
59 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
61 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
62 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
64 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
66 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
67 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
73 return s
->ecc
.count
& 0xff;
76 nand_getpins(s
->nand
, &ryby
);
78 return s
->ctl
| FLASHCTL_RYBY
;
83 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
));
86 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
91 static uint32_t sl_readl(void *opaque
, target_phys_addr_t addr
)
93 SLNANDState
*s
= (SLNANDState
*) opaque
;
95 if (addr
== FLASH_FLASHIO
)
96 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) |
97 (ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) << 16);
99 return sl_readb(opaque
, addr
);
102 static void sl_writeb(void *opaque
, target_phys_addr_t addr
,
105 SLNANDState
*s
= (SLNANDState
*) opaque
;
109 /* Value is ignored. */
114 s
->ctl
= value
& 0xff & ~FLASHCTL_RYBY
;
115 nand_setpins(s
->nand
,
116 s
->ctl
& FLASHCTL_CLE
,
117 s
->ctl
& FLASHCTL_ALE
,
118 s
->ctl
& FLASHCTL_NCE
,
119 s
->ctl
& FLASHCTL_WP
,
124 nand_setio(s
->nand
, ecc_digest(&s
->ecc
, value
& 0xff));
128 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
132 static void sl_save(QEMUFile
*f
, void *opaque
)
134 SLNANDState
*s
= (SLNANDState
*) opaque
;
136 qemu_put_8s(f
, &s
->ctl
);
140 static int sl_load(QEMUFile
*f
, void *opaque
, int version_id
)
142 SLNANDState
*s
= (SLNANDState
*) opaque
;
144 qemu_get_8s(f
, &s
->ctl
);
155 static void sl_flash_register(PXA2xxState
*cpu
, int size
)
159 CPUReadMemoryFunc
* const sl_readfn
[] = {
164 CPUWriteMemoryFunc
* const sl_writefn
[] = {
170 s
= (SLNANDState
*) qemu_mallocz(sizeof(SLNANDState
));
172 if (size
== FLASH_128M
)
173 s
->nand
= nand_init(NAND_MFR_SAMSUNG
, 0x73);
174 else if (size
== FLASH_1024M
)
175 s
->nand
= nand_init(NAND_MFR_SAMSUNG
, 0xf1);
177 iomemtype
= cpu_register_io_memory(sl_readfn
,
179 cpu_register_physical_memory(FLASH_BASE
, 0x40, iomemtype
);
181 register_savevm("sl_flash", 0, 0, sl_save
, sl_load
, s
);
186 #define SPITZ_KEY_STROBE_NUM 11
187 #define SPITZ_KEY_SENSE_NUM 7
189 static const int spitz_gpio_key_sense
[SPITZ_KEY_SENSE_NUM
] = {
190 12, 17, 91, 34, 36, 38, 39
193 static const int spitz_gpio_key_strobe
[SPITZ_KEY_STROBE_NUM
] = {
194 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
197 /* Eighth additional row maps the special keys */
198 static int spitz_keymap
[SPITZ_KEY_SENSE_NUM
+ 1][SPITZ_KEY_STROBE_NUM
] = {
199 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
200 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
201 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
202 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
203 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
204 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
205 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
206 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
209 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
210 #define SPITZ_GPIO_SYNC 16 /* Sync button */
211 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
212 #define SPITZ_GPIO_SWA 97 /* Lid */
213 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
215 /* The special buttons are mapped to unused keys */
216 static const int spitz_gpiomap
[5] = {
217 SPITZ_GPIO_AK_INT
, SPITZ_GPIO_SYNC
, SPITZ_GPIO_ON_KEY
,
218 SPITZ_GPIO_SWA
, SPITZ_GPIO_SWB
,
220 static int spitz_gpio_invert
[5] = { 0, 0, 0, 0, 0, };
223 qemu_irq sense
[SPITZ_KEY_SENSE_NUM
];
227 uint16_t keyrow
[SPITZ_KEY_SENSE_NUM
];
228 uint16_t strobe_state
;
229 uint16_t sense_state
;
231 uint16_t pre_map
[0x100];
235 int fifopos
, fifolen
;
237 } SpitzKeyboardState
;
239 static void spitz_keyboard_sense_update(SpitzKeyboardState
*s
)
242 uint16_t strobe
, sense
= 0;
243 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++) {
244 strobe
= s
->keyrow
[i
] & s
->strobe_state
;
247 if (!(s
->sense_state
& (1 << i
)))
248 qemu_irq_raise(s
->sense
[i
]);
249 } else if (s
->sense_state
& (1 << i
))
250 qemu_irq_lower(s
->sense
[i
]);
253 s
->sense_state
= sense
;
256 static void spitz_keyboard_strobe(void *opaque
, int line
, int level
)
258 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
261 s
->strobe_state
|= 1 << line
;
263 s
->strobe_state
&= ~(1 << line
);
264 spitz_keyboard_sense_update(s
);
267 static void spitz_keyboard_keydown(SpitzKeyboardState
*s
, int keycode
)
269 int spitz_keycode
= s
->keymap
[keycode
& 0x7f];
270 if (spitz_keycode
== -1)
273 /* Handle the additional keys */
274 if ((spitz_keycode
>> 4) == SPITZ_KEY_SENSE_NUM
) {
275 qemu_set_irq(s
->gpiomap
[spitz_keycode
& 0xf], (keycode
< 0x80) ^
276 spitz_gpio_invert
[spitz_keycode
& 0xf]);
281 s
->keyrow
[spitz_keycode
>> 4] &= ~(1 << (spitz_keycode
& 0xf));
283 s
->keyrow
[spitz_keycode
>> 4] |= 1 << (spitz_keycode
& 0xf);
285 spitz_keyboard_sense_update(s
);
288 #define SHIFT (1 << 7)
289 #define CTRL (1 << 8)
292 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
294 static void spitz_keyboard_handler(SpitzKeyboardState
*s
, int keycode
)
299 case 0x2a: /* Left Shift */
305 case 0x36: /* Right Shift */
311 case 0x1d: /* Control */
325 code
= s
->pre_map
[mapcode
= ((s
->modifiers
& 3) ?
327 (keycode
& ~SHIFT
))];
329 if (code
!= mapcode
) {
331 if ((code
& SHIFT
) && !(s
->modifiers
& 1))
332 QUEUE_KEY(0x2a | (keycode
& 0x80));
333 if ((code
& CTRL
) && !(s
->modifiers
& 4))
334 QUEUE_KEY(0x1d | (keycode
& 0x80));
335 if ((code
& FN
) && !(s
->modifiers
& 8))
336 QUEUE_KEY(0x38 | (keycode
& 0x80));
337 if ((code
& FN
) && (s
->modifiers
& 1))
338 QUEUE_KEY(0x2a | (~keycode
& 0x80));
339 if ((code
& FN
) && (s
->modifiers
& 2))
340 QUEUE_KEY(0x36 | (~keycode
& 0x80));
342 if (keycode
& 0x80) {
343 if ((s
->imodifiers
& 1 ) && !(s
->modifiers
& 1))
344 QUEUE_KEY(0x2a | 0x80);
345 if ((s
->imodifiers
& 4 ) && !(s
->modifiers
& 4))
346 QUEUE_KEY(0x1d | 0x80);
347 if ((s
->imodifiers
& 8 ) && !(s
->modifiers
& 8))
348 QUEUE_KEY(0x38 | 0x80);
349 if ((s
->imodifiers
& 0x10) && (s
->modifiers
& 1))
351 if ((s
->imodifiers
& 0x20) && (s
->modifiers
& 2))
355 if ((code
& SHIFT
) && !((s
->modifiers
| s
->imodifiers
) & 1)) {
359 if ((code
& CTRL
) && !((s
->modifiers
| s
->imodifiers
) & 4)) {
363 if ((code
& FN
) && !((s
->modifiers
| s
->imodifiers
) & 8)) {
367 if ((code
& FN
) && (s
->modifiers
& 1) &&
368 !(s
->imodifiers
& 0x10)) {
369 QUEUE_KEY(0x2a | 0x80);
370 s
->imodifiers
|= 0x10;
372 if ((code
& FN
) && (s
->modifiers
& 2) &&
373 !(s
->imodifiers
& 0x20)) {
374 QUEUE_KEY(0x36 | 0x80);
375 s
->imodifiers
|= 0x20;
381 QUEUE_KEY((code
& 0x7f) | (keycode
& 0x80));
384 static void spitz_keyboard_tick(void *opaque
)
386 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
389 spitz_keyboard_keydown(s
, s
->fifo
[s
->fifopos
++]);
391 if (s
->fifopos
>= 16)
395 qemu_mod_timer(s
->kbdtimer
, qemu_get_clock(vm_clock
) + ticks_per_sec
/ 32);
398 static void spitz_keyboard_pre_map(SpitzKeyboardState
*s
)
401 for (i
= 0; i
< 0x100; i
++)
403 s
->pre_map
[0x02 | SHIFT
] = 0x02 | SHIFT
; /* exclam */
404 s
->pre_map
[0x28 | SHIFT
] = 0x03 | SHIFT
; /* quotedbl */
405 s
->pre_map
[0x04 | SHIFT
] = 0x04 | SHIFT
; /* numbersign */
406 s
->pre_map
[0x05 | SHIFT
] = 0x05 | SHIFT
; /* dollar */
407 s
->pre_map
[0x06 | SHIFT
] = 0x06 | SHIFT
; /* percent */
408 s
->pre_map
[0x08 | SHIFT
] = 0x07 | SHIFT
; /* ampersand */
409 s
->pre_map
[0x28 ] = 0x08 | SHIFT
; /* apostrophe */
410 s
->pre_map
[0x0a | SHIFT
] = 0x09 | SHIFT
; /* parenleft */
411 s
->pre_map
[0x0b | SHIFT
] = 0x0a | SHIFT
; /* parenright */
412 s
->pre_map
[0x29 | SHIFT
] = 0x0b | SHIFT
; /* asciitilde */
413 s
->pre_map
[0x03 | SHIFT
] = 0x0c | SHIFT
; /* at */
414 s
->pre_map
[0xd3 ] = 0x0e | FN
; /* Delete */
415 s
->pre_map
[0x3a ] = 0x0f | FN
; /* Caps_Lock */
416 s
->pre_map
[0x07 | SHIFT
] = 0x11 | FN
; /* asciicircum */
417 s
->pre_map
[0x0d ] = 0x12 | FN
; /* equal */
418 s
->pre_map
[0x0d | SHIFT
] = 0x13 | FN
; /* plus */
419 s
->pre_map
[0x1a ] = 0x14 | FN
; /* bracketleft */
420 s
->pre_map
[0x1b ] = 0x15 | FN
; /* bracketright */
421 s
->pre_map
[0x1a | SHIFT
] = 0x16 | FN
; /* braceleft */
422 s
->pre_map
[0x1b | SHIFT
] = 0x17 | FN
; /* braceright */
423 s
->pre_map
[0x27 ] = 0x22 | FN
; /* semicolon */
424 s
->pre_map
[0x27 | SHIFT
] = 0x23 | FN
; /* colon */
425 s
->pre_map
[0x09 | SHIFT
] = 0x24 | FN
; /* asterisk */
426 s
->pre_map
[0x2b ] = 0x25 | FN
; /* backslash */
427 s
->pre_map
[0x2b | SHIFT
] = 0x26 | FN
; /* bar */
428 s
->pre_map
[0x0c | SHIFT
] = 0x30 | FN
; /* underscore */
429 s
->pre_map
[0x33 | SHIFT
] = 0x33 | FN
; /* less */
430 s
->pre_map
[0x35 ] = 0x33 | SHIFT
; /* slash */
431 s
->pre_map
[0x34 | SHIFT
] = 0x34 | FN
; /* greater */
432 s
->pre_map
[0x35 | SHIFT
] = 0x34 | SHIFT
; /* question */
433 s
->pre_map
[0x49 ] = 0x48 | FN
; /* Page_Up */
434 s
->pre_map
[0x51 ] = 0x50 | FN
; /* Page_Down */
440 s
->kbdtimer
= qemu_new_timer(vm_clock
, spitz_keyboard_tick
, s
);
441 spitz_keyboard_tick(s
);
448 static void spitz_keyboard_save(QEMUFile
*f
, void *opaque
)
450 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
453 qemu_put_be16s(f
, &s
->sense_state
);
454 qemu_put_be16s(f
, &s
->strobe_state
);
455 for (i
= 0; i
< 5; i
++)
456 qemu_put_byte(f
, spitz_gpio_invert
[i
]);
459 static int spitz_keyboard_load(QEMUFile
*f
, void *opaque
, int version_id
)
461 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
464 qemu_get_be16s(f
, &s
->sense_state
);
465 qemu_get_be16s(f
, &s
->strobe_state
);
466 for (i
= 0; i
< 5; i
++)
467 spitz_gpio_invert
[i
] = qemu_get_byte(f
);
469 /* Release all pressed keys */
470 memset(s
->keyrow
, 0, sizeof(s
->keyrow
));
471 spitz_keyboard_sense_update(s
);
480 static void spitz_keyboard_register(PXA2xxState
*cpu
)
483 SpitzKeyboardState
*s
;
485 s
= (SpitzKeyboardState
*)
486 qemu_mallocz(sizeof(SpitzKeyboardState
));
487 memset(s
, 0, sizeof(SpitzKeyboardState
));
489 for (i
= 0; i
< 0x80; i
++)
491 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
+ 1; i
++)
492 for (j
= 0; j
< SPITZ_KEY_STROBE_NUM
; j
++)
493 if (spitz_keymap
[i
][j
] != -1)
494 s
->keymap
[spitz_keymap
[i
][j
]] = (i
<< 4) | j
;
496 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++)
497 s
->sense
[i
] = pxa2xx_gpio_in_get(cpu
->gpio
)[spitz_gpio_key_sense
[i
]];
499 for (i
= 0; i
< 5; i
++)
500 s
->gpiomap
[i
] = pxa2xx_gpio_in_get(cpu
->gpio
)[spitz_gpiomap
[i
]];
502 s
->strobe
= qemu_allocate_irqs(spitz_keyboard_strobe
, s
,
503 SPITZ_KEY_STROBE_NUM
);
504 for (i
= 0; i
< SPITZ_KEY_STROBE_NUM
; i
++)
505 pxa2xx_gpio_out_set(cpu
->gpio
, spitz_gpio_key_strobe
[i
], s
->strobe
[i
]);
507 spitz_keyboard_pre_map(s
);
508 qemu_add_kbd_event_handler((QEMUPutKBDEvent
*) spitz_keyboard_handler
, s
);
510 register_savevm("spitz_keyboard", 0, 0,
511 spitz_keyboard_save
, spitz_keyboard_load
, s
);
514 /* LCD backlight controller */
516 #define LCDTG_RESCTL 0x00
517 #define LCDTG_PHACTRL 0x01
518 #define LCDTG_DUTYCTRL 0x02
519 #define LCDTG_POWERREG0 0x03
520 #define LCDTG_POWERREG1 0x04
521 #define LCDTG_GPOR3 0x05
522 #define LCDTG_PICTRL 0x06
523 #define LCDTG_POLCTRL 0x07
531 static void spitz_bl_update(SpitzLCDTG
*s
)
533 if (s
->bl_power
&& s
->bl_intensity
)
534 zaurus_printf("LCD Backlight now at %i/63\n", s
->bl_intensity
);
536 zaurus_printf("LCD Backlight now off\n");
539 /* FIXME: Implement GPIO properly and remove this hack. */
540 static SpitzLCDTG
*spitz_lcdtg
;
542 static inline void spitz_bl_bit5(void *opaque
, int line
, int level
)
544 SpitzLCDTG
*s
= spitz_lcdtg
;
545 int prev
= s
->bl_intensity
;
548 s
->bl_intensity
&= ~0x20;
550 s
->bl_intensity
|= 0x20;
552 if (s
->bl_power
&& prev
!= s
->bl_intensity
)
556 static inline void spitz_bl_power(void *opaque
, int line
, int level
)
558 SpitzLCDTG
*s
= spitz_lcdtg
;
559 s
->bl_power
= !!level
;
563 static uint32_t spitz_lcdtg_transfer(SSISlave
*dev
, uint32_t value
)
565 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
573 zaurus_printf("LCD in QVGA mode\n");
575 zaurus_printf("LCD in VGA mode\n");
579 s
->bl_intensity
&= ~0x1f;
580 s
->bl_intensity
|= value
;
585 case LCDTG_POWERREG0
:
586 /* Set common voltage to M62332FP */
592 static void spitz_lcdtg_save(QEMUFile
*f
, void *opaque
)
594 SpitzLCDTG
*s
= (SpitzLCDTG
*)opaque
;
595 qemu_put_be32(f
, s
->bl_intensity
);
596 qemu_put_be32(f
, s
->bl_power
);
599 static int spitz_lcdtg_load(QEMUFile
*f
, void *opaque
, int version_id
)
601 SpitzLCDTG
*s
= (SpitzLCDTG
*)opaque
;
602 s
->bl_intensity
= qemu_get_be32(f
);
603 s
->bl_power
= qemu_get_be32(f
);
607 static int spitz_lcdtg_init(SSISlave
*dev
)
609 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
613 s
->bl_intensity
= 0x20;
615 register_savevm("spitz-lcdtg", -1, 1,
616 spitz_lcdtg_save
, spitz_lcdtg_load
, s
);
622 #define CORGI_SSP_PORT 2
624 #define SPITZ_GPIO_LCDCON_CS 53
625 #define SPITZ_GPIO_ADS7846_CS 14
626 #define SPITZ_GPIO_MAX1111_CS 20
627 #define SPITZ_GPIO_TP_INT 11
629 static DeviceState
*max1111
;
631 /* "Demux" the signal based on current chipselect */
638 static uint32_t corgi_ssp_transfer(SSISlave
*dev
, uint32_t value
)
640 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
643 for (i
= 0; i
< 3; i
++) {
645 return ssi_transfer(s
->bus
[i
], value
);
651 static void corgi_ssp_gpio_cs(void *opaque
, int line
, int level
)
653 CorgiSSPState
*s
= (CorgiSSPState
*)opaque
;
654 assert(line
>= 0 && line
< 3);
655 s
->enable
[line
] = !level
;
658 #define MAX1111_BATT_VOLT 1
659 #define MAX1111_BATT_TEMP 2
660 #define MAX1111_ACIN_VOLT 3
662 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
663 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
664 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
666 static void spitz_adc_temp_on(void *opaque
, int line
, int level
)
672 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, SPITZ_BATTERY_TEMP
);
674 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
677 static void spitz_ssp_save(QEMUFile
*f
, void *opaque
)
679 CorgiSSPState
*s
= (CorgiSSPState
*)opaque
;
682 for (i
= 0; i
< 3; i
++) {
683 qemu_put_be32(f
, s
->enable
[i
]);
687 static int spitz_ssp_load(QEMUFile
*f
, void *opaque
, int version_id
)
689 CorgiSSPState
*s
= (CorgiSSPState
*)opaque
;
692 if (version_id
!= 1) {
695 for (i
= 0; i
< 3; i
++) {
696 s
->enable
[i
] = qemu_get_be32(f
);
701 static int corgi_ssp_init(SSISlave
*dev
)
703 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
705 qdev_init_gpio_in(&dev
->qdev
, corgi_ssp_gpio_cs
, 3);
706 s
->bus
[0] = ssi_create_bus(&dev
->qdev
, "ssi0");
707 s
->bus
[1] = ssi_create_bus(&dev
->qdev
, "ssi1");
708 s
->bus
[2] = ssi_create_bus(&dev
->qdev
, "ssi2");
710 register_savevm("spitz_ssp", -1, 1, spitz_ssp_save
, spitz_ssp_load
, s
);
714 static void spitz_ssp_attach(PXA2xxState
*cpu
)
720 mux
= ssi_create_slave(cpu
->ssp
[CORGI_SSP_PORT
- 1], "corgi-ssp");
722 bus
= qdev_get_child_bus(mux
, "ssi0");
723 dev
= ssi_create_slave(bus
, "spitz-lcdtg");
725 bus
= qdev_get_child_bus(mux
, "ssi1");
726 dev
= ssi_create_slave(bus
, "ads7846");
727 qdev_connect_gpio_out(dev
, 0,
728 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_TP_INT
]);
730 bus
= qdev_get_child_bus(mux
, "ssi2");
731 max1111
= ssi_create_slave(bus
, "max1111");
732 max111x_set_input(max1111
, MAX1111_BATT_VOLT
, SPITZ_BATTERY_VOLT
);
733 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
734 max111x_set_input(max1111
, MAX1111_ACIN_VOLT
, SPITZ_CHARGEON_ACIN
);
736 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_LCDCON_CS
,
737 qdev_get_gpio_in(mux
, 0));
738 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_ADS7846_CS
,
739 qdev_get_gpio_in(mux
, 1));
740 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_MAX1111_CS
,
741 qdev_get_gpio_in(mux
, 2));
746 static void spitz_microdrive_attach(PXA2xxState
*cpu
, int slot
)
749 BlockDriverState
*bs
;
752 dinfo
= drive_get(IF_IDE
, 0, 0);
756 if (bdrv_is_inserted(bs
) && !bdrv_is_removable(bs
)) {
757 md
= dscm1xxxx_init(dinfo
);
758 pxa2xx_pcmcia_attach(cpu
->pcmcia
[slot
], md
);
762 /* Wm8750 and Max7310 on I2C */
764 #define AKITA_MAX_ADDR 0x18
765 #define SPITZ_WM_ADDRL 0x1b
766 #define SPITZ_WM_ADDRH 0x1a
768 #define SPITZ_GPIO_WM 5
771 static void spitz_wm8750_addr(void *opaque
, int line
, int level
)
773 i2c_slave
*wm
= (i2c_slave
*) opaque
;
775 i2c_set_slave_address(wm
, SPITZ_WM_ADDRH
);
777 i2c_set_slave_address(wm
, SPITZ_WM_ADDRL
);
781 static void spitz_i2c_setup(PXA2xxState
*cpu
)
783 /* Attach the CPU on one end of our I2C bus. */
784 i2c_bus
*bus
= pxa2xx_i2c_bus(cpu
->i2c
[0]);
789 /* Attach a WM8750 to the bus */
790 wm
= i2c_create_slave(bus
, "wm8750", 0);
792 spitz_wm8750_addr(wm
, 0, 0);
793 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_WM
,
794 qemu_allocate_irqs(spitz_wm8750_addr
, wm
, 1)[0]);
795 /* .. and to the sound interface. */
796 cpu
->i2s
->opaque
= wm
;
797 cpu
->i2s
->codec_out
= wm8750_dac_dat
;
798 cpu
->i2s
->codec_in
= wm8750_adc_dat
;
799 wm8750_data_req_set(wm
, cpu
->i2s
->data_req
, cpu
->i2s
);
803 static void spitz_akita_i2c_setup(PXA2xxState
*cpu
)
805 /* Attach a Max7310 to Akita I2C bus. */
806 i2c_create_slave(pxa2xx_i2c_bus(cpu
->i2c
[0]), "max7310",
810 /* Other peripherals */
812 static void spitz_out_switch(void *opaque
, int line
, int level
)
816 zaurus_printf("Charging %s.\n", level
? "off" : "on");
819 zaurus_printf("Discharging %s.\n", level
? "on" : "off");
822 zaurus_printf("Green LED %s.\n", level
? "on" : "off");
825 zaurus_printf("Orange LED %s.\n", level
? "on" : "off");
828 spitz_bl_bit5(opaque
, line
, level
);
831 spitz_bl_power(opaque
, line
, level
);
834 spitz_adc_temp_on(opaque
, line
, level
);
839 #define SPITZ_SCP_LED_GREEN 1
840 #define SPITZ_SCP_JK_B 2
841 #define SPITZ_SCP_CHRG_ON 3
842 #define SPITZ_SCP_MUTE_L 4
843 #define SPITZ_SCP_MUTE_R 5
844 #define SPITZ_SCP_CF_POWER 6
845 #define SPITZ_SCP_LED_ORANGE 7
846 #define SPITZ_SCP_JK_A 8
847 #define SPITZ_SCP_ADC_TEMP_ON 9
848 #define SPITZ_SCP2_IR_ON 1
849 #define SPITZ_SCP2_AKIN_PULLUP 2
850 #define SPITZ_SCP2_BACKLIGHT_CONT 7
851 #define SPITZ_SCP2_BACKLIGHT_ON 8
852 #define SPITZ_SCP2_MIC_BIAS 9
854 static void spitz_scoop_gpio_setup(PXA2xxState
*cpu
,
855 ScoopInfo
*scp0
, ScoopInfo
*scp1
)
857 qemu_irq
*outsignals
= qemu_allocate_irqs(spitz_out_switch
, cpu
, 8);
859 scoop_gpio_out_set(scp0
, SPITZ_SCP_CHRG_ON
, outsignals
[0]);
860 scoop_gpio_out_set(scp0
, SPITZ_SCP_JK_B
, outsignals
[1]);
861 scoop_gpio_out_set(scp0
, SPITZ_SCP_LED_GREEN
, outsignals
[2]);
862 scoop_gpio_out_set(scp0
, SPITZ_SCP_LED_ORANGE
, outsignals
[3]);
865 scoop_gpio_out_set(scp1
, SPITZ_SCP2_BACKLIGHT_CONT
, outsignals
[4]);
866 scoop_gpio_out_set(scp1
, SPITZ_SCP2_BACKLIGHT_ON
, outsignals
[5]);
869 scoop_gpio_out_set(scp0
, SPITZ_SCP_ADC_TEMP_ON
, outsignals
[6]);
872 #define SPITZ_GPIO_HSYNC 22
873 #define SPITZ_GPIO_SD_DETECT 9
874 #define SPITZ_GPIO_SD_WP 81
875 #define SPITZ_GPIO_ON_RESET 89
876 #define SPITZ_GPIO_BAT_COVER 90
877 #define SPITZ_GPIO_CF1_IRQ 105
878 #define SPITZ_GPIO_CF1_CD 94
879 #define SPITZ_GPIO_CF2_IRQ 106
880 #define SPITZ_GPIO_CF2_CD 93
882 static int spitz_hsync
;
884 static void spitz_lcd_hsync_handler(void *opaque
, int line
, int level
)
886 PXA2xxState
*cpu
= (PXA2xxState
*) opaque
;
887 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_HSYNC
], spitz_hsync
);
891 static void spitz_gpio_setup(PXA2xxState
*cpu
, int slots
)
895 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
896 * read to satisfy broken guests that poll-wait for hsync.
897 * Simulating a real hsync event would be less practical and
898 * wouldn't guarantee that a guest ever exits the loop.
901 lcd_hsync
= qemu_allocate_irqs(spitz_lcd_hsync_handler
, cpu
, 1)[0];
902 pxa2xx_gpio_read_notifier(cpu
->gpio
, lcd_hsync
);
903 pxa2xx_lcd_vsync_notifier(cpu
->lcd
, lcd_hsync
);
906 pxa2xx_mmci_handlers(cpu
->mmc
,
907 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SD_WP
],
908 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SD_DETECT
]);
910 /* Battery lock always closed */
911 qemu_irq_raise(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_BAT_COVER
]);
914 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_ON_RESET
, cpu
->reset
);
916 /* PCMCIA signals: card's IRQ and Card-Detect */
918 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[0],
919 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF1_IRQ
],
920 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF1_CD
]);
922 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[1],
923 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF2_IRQ
],
924 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF2_CD
]);
926 /* Initialise the screen rotation related signals */
927 spitz_gpio_invert
[3] = 0; /* Always open */
928 if (graphic_rotate
) { /* Tablet mode */
929 spitz_gpio_invert
[4] = 0;
930 } else { /* Portrait mode */
931 spitz_gpio_invert
[4] = 1;
933 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SWA
],
934 spitz_gpio_invert
[3]);
935 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SWB
],
936 spitz_gpio_invert
[4]);
940 enum spitz_model_e
{ spitz
, akita
, borzoi
, terrier
};
942 #define SPITZ_RAM 0x04000000
943 #define SPITZ_ROM 0x00800000
945 static struct arm_boot_info spitz_binfo
= {
946 .loader_start
= PXA2XX_SDRAM_BASE
,
947 .ram_size
= 0x04000000,
950 static void spitz_common_init(ram_addr_t ram_size
,
951 const char *kernel_filename
,
952 const char *kernel_cmdline
, const char *initrd_filename
,
953 const char *cpu_model
, enum spitz_model_e model
, int arm_id
)
956 ScoopInfo
*scp0
, *scp1
= NULL
;
959 cpu_model
= (model
== terrier
) ? "pxa270-c5" : "pxa270-c0";
961 /* Setup CPU & memory */
962 cpu
= pxa270_init(spitz_binfo
.ram_size
, cpu_model
);
964 sl_flash_register(cpu
, (model
== spitz
) ? FLASH_128M
: FLASH_1024M
);
966 cpu_register_physical_memory(0, SPITZ_ROM
,
967 qemu_ram_alloc(SPITZ_ROM
) | IO_MEM_ROM
);
969 /* Setup peripherals */
970 spitz_keyboard_register(cpu
);
972 spitz_ssp_attach(cpu
);
974 scp0
= scoop_init(cpu
, 0, 0x10800000);
975 if (model
!= akita
) {
976 scp1
= scoop_init(cpu
, 1, 0x08800040);
979 spitz_scoop_gpio_setup(cpu
, scp0
, scp1
);
981 spitz_gpio_setup(cpu
, (model
== akita
) ? 1 : 2);
983 spitz_i2c_setup(cpu
);
986 spitz_akita_i2c_setup(cpu
);
988 if (model
== terrier
)
989 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
990 spitz_microdrive_attach(cpu
, 1);
991 else if (model
!= akita
)
992 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
993 spitz_microdrive_attach(cpu
, 0);
995 /* Setup initial (reset) machine state */
996 cpu
->env
->regs
[15] = spitz_binfo
.loader_start
;
998 spitz_binfo
.kernel_filename
= kernel_filename
;
999 spitz_binfo
.kernel_cmdline
= kernel_cmdline
;
1000 spitz_binfo
.initrd_filename
= initrd_filename
;
1001 spitz_binfo
.board_id
= arm_id
;
1002 arm_load_kernel(cpu
->env
, &spitz_binfo
);
1003 sl_bootparam_write(SL_PXA_PARAM_BASE
);
1006 static void spitz_init(ram_addr_t ram_size
,
1007 const char *boot_device
,
1008 const char *kernel_filename
, const char *kernel_cmdline
,
1009 const char *initrd_filename
, const char *cpu_model
)
1011 spitz_common_init(ram_size
, kernel_filename
,
1012 kernel_cmdline
, initrd_filename
, cpu_model
, spitz
, 0x2c9);
1015 static void borzoi_init(ram_addr_t ram_size
,
1016 const char *boot_device
,
1017 const char *kernel_filename
, const char *kernel_cmdline
,
1018 const char *initrd_filename
, const char *cpu_model
)
1020 spitz_common_init(ram_size
, kernel_filename
,
1021 kernel_cmdline
, initrd_filename
, cpu_model
, borzoi
, 0x33f);
1024 static void akita_init(ram_addr_t ram_size
,
1025 const char *boot_device
,
1026 const char *kernel_filename
, const char *kernel_cmdline
,
1027 const char *initrd_filename
, const char *cpu_model
)
1029 spitz_common_init(ram_size
, kernel_filename
,
1030 kernel_cmdline
, initrd_filename
, cpu_model
, akita
, 0x2e8);
1033 static void terrier_init(ram_addr_t ram_size
,
1034 const char *boot_device
,
1035 const char *kernel_filename
, const char *kernel_cmdline
,
1036 const char *initrd_filename
, const char *cpu_model
)
1038 spitz_common_init(ram_size
, kernel_filename
,
1039 kernel_cmdline
, initrd_filename
, cpu_model
, terrier
, 0x33f);
1042 static QEMUMachine akitapda_machine
= {
1044 .desc
= "Akita PDA (PXA270)",
1048 static QEMUMachine spitzpda_machine
= {
1050 .desc
= "Spitz PDA (PXA270)",
1054 static QEMUMachine borzoipda_machine
= {
1056 .desc
= "Borzoi PDA (PXA270)",
1057 .init
= borzoi_init
,
1060 static QEMUMachine terrierpda_machine
= {
1062 .desc
= "Terrier PDA (PXA270)",
1063 .init
= terrier_init
,
1066 static void spitz_machine_init(void)
1068 qemu_register_machine(&akitapda_machine
);
1069 qemu_register_machine(&spitzpda_machine
);
1070 qemu_register_machine(&borzoipda_machine
);
1071 qemu_register_machine(&terrierpda_machine
);
1074 machine_init(spitz_machine_init
);
1076 static SSISlaveInfo corgi_ssp_info
= {
1077 .qdev
.name
= "corgi-ssp",
1078 .qdev
.size
= sizeof(CorgiSSPState
),
1079 .init
= corgi_ssp_init
,
1080 .transfer
= corgi_ssp_transfer
1083 static SSISlaveInfo spitz_lcdtg_info
= {
1084 .qdev
.name
= "spitz-lcdtg",
1085 .qdev
.size
= sizeof(SpitzLCDTG
),
1086 .init
= spitz_lcdtg_init
,
1087 .transfer
= spitz_lcdtg_transfer
1090 static void spitz_register_devices(void)
1092 ssi_register_slave(&corgi_ssp_info
);
1093 ssi_register_slave(&spitz_lcdtg_info
);
1096 device_init(spitz_register_devices
)