cpu-common.h

   1 #ifndef CPU_COMMON_H
   2 #define CPU_COMMON_H 1
   3
   4 /* CPU interfaces that are target indpendent.  */
   5
   6 #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
   7 #define WORDS_ALIGNED
   8 #endif
   9
  10 #ifdef TARGET_PHYS_ADDR_BITS
  11 #include "targphys.h"
  12 #endif
  13
  14 #ifndef NEED_CPU_H
  15 #include "poison.h"
  16 #endif
  17
  18 #include "bswap.h"
  19 #include "qemu-queue.h"
  20
  21 #if !defined(CONFIG_USER_ONLY)
  22
  23 /* address in the RAM (different from a physical address) */
  24 typedef unsigned long ram_addr_t;
  25
  26 /* memory API */
  27
  28 typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
  29 typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
  30
  31 void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
  32                                          ram_addr_t size,
  33                                          ram_addr_t phys_offset,
  34                                          ram_addr_t region_offset);
  35 static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
  36                                                 ram_addr_t size,
  37                                                 ram_addr_t phys_offset)
  38 {
  39     cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
  40 }
  41
  42 ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
  43 ram_addr_t qemu_ram_alloc(ram_addr_t);
  44 void qemu_ram_free(ram_addr_t addr);
  45 /* This should only be used for ram local to a device.  */
  46 void *qemu_get_ram_ptr(ram_addr_t addr);
  47 /* This should not be used by devices.  */
  48 int do_qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
  49 ram_addr_t qemu_ram_addr_from_host(void *ptr);
  50
  51 int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
  52                            CPUWriteMemoryFunc * const *mem_write,
  53                            void *opaque);
  54 void cpu_unregister_io_memory(int table_address);
  55
  56 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
  57                             int len, int is_write);
  58 static inline void cpu_physical_memory_read(target_phys_addr_t addr,
  59                                             uint8_t *buf, int len)
  60 {
  61     cpu_physical_memory_rw(addr, buf, len, 0);
  62 }
  63 static inline void cpu_physical_memory_write(target_phys_addr_t addr,
  64                                              const uint8_t *buf, int len)
  65 {
  66     cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
  67 }
  68 void *cpu_physical_memory_map(target_phys_addr_t addr,
  69                               target_phys_addr_t *plen,
  70                               int is_write);
  71 void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
  72                                int is_write, target_phys_addr_t access_len);
  73 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
  74 void cpu_unregister_map_client(void *cookie);
  75
  76 struct CPUPhysMemoryClient;
  77 typedef struct CPUPhysMemoryClient CPUPhysMemoryClient;
  78 struct CPUPhysMemoryClient {
  79     void (*set_memory)(struct CPUPhysMemoryClient *client,
  80                        target_phys_addr_t start_addr,
  81                        ram_addr_t size,
  82                        ram_addr_t phys_offset);
  83     int (*sync_dirty_bitmap)(struct CPUPhysMemoryClient *client,
  84                              target_phys_addr_t start_addr,
  85                              target_phys_addr_t end_addr);
  86     int (*migration_log)(struct CPUPhysMemoryClient *client,
  87                          int enable);
  88     QLIST_ENTRY(CPUPhysMemoryClient) list;
  89 };
  90
  91 void cpu_register_phys_memory_client(CPUPhysMemoryClient *);
  92 void cpu_unregister_phys_memory_client(CPUPhysMemoryClient *);
  93
  94 /* Coalesced MMIO regions are areas where write operations can be reordered.
  95  * This usually implies that write operations are side-effect free.  This allows
  96  * batching which can make a major impact on performance when using
  97  * virtualization.
  98  */
  99 void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
 100
 101 void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
 102
 103 void qemu_flush_coalesced_mmio_buffer(void);
 104
 105 uint32_t ldub_phys(target_phys_addr_t addr);
 106 uint32_t lduw_phys(target_phys_addr_t addr);
 107 uint32_t ldl_phys(target_phys_addr_t addr);
 108 uint64_t ldq_phys(target_phys_addr_t addr);
 109 void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
 110 void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
 111 void stb_phys(target_phys_addr_t addr, uint32_t val);
 112 void stw_phys(target_phys_addr_t addr, uint32_t val);
 113 void stl_phys(target_phys_addr_t addr, uint32_t val);
 114 void stq_phys(target_phys_addr_t addr, uint64_t val);
 115
 116 void cpu_physical_memory_write_rom(target_phys_addr_t addr,
 117                                    const uint8_t *buf, int len);
 118
 119 #define IO_MEM_SHIFT       3
 120
 121 #define IO_MEM_RAM         (0 << IO_MEM_SHIFT) /* hardcoded offset */
 122 #define IO_MEM_ROM         (1 << IO_MEM_SHIFT) /* hardcoded offset */
 123 #define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)
 124 #define IO_MEM_NOTDIRTY    (3 << IO_MEM_SHIFT)
 125
 126 /* Acts like a ROM when read and like a device when written.  */
 127 #define IO_MEM_ROMD        (1)
 128 #define IO_MEM_SUBPAGE     (2)
 129
 130 #endif
 131
 132 #endif /* !CPU_COMMON_H */