4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
34 //#define DEBUG_VGA_MEM
35 //#define DEBUG_VGA_REG
37 //#define DEBUG_BOCHS_VBE
39 /* force some bits to zero */
40 const uint8_t sr_mask
[8] = {
51 const uint8_t gr_mask
[16] = {
70 #define cbswap_32(__x) \
72 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
73 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
74 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
75 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
77 #ifdef HOST_WORDS_BIGENDIAN
78 #define PAT(x) cbswap_32(x)
83 #ifdef HOST_WORDS_BIGENDIAN
89 #ifdef HOST_WORDS_BIGENDIAN
90 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
92 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
95 static const uint32_t mask16
[16] = {
116 #ifdef HOST_WORDS_BIGENDIAN
119 #define PAT(x) cbswap_32(x)
122 static const uint32_t dmask16
[16] = {
141 static const uint32_t dmask4
[4] = {
148 static uint32_t expand4
[256];
149 static uint16_t expand2
[256];
150 static uint8_t expand4to8
[16];
152 static void vga_screen_dump(void *opaque
, const char *filename
);
153 static char *screen_dump_filename
;
154 static DisplayChangeListener
*screen_dump_dcl
;
156 static void vga_dumb_update_retrace_info(VGACommonState
*s
)
161 static void vga_precise_update_retrace_info(VGACommonState
*s
)
164 int hretr_start_char
;
165 int hretr_skew_chars
;
169 int vretr_start_line
;
178 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
179 int64_t chars_per_sec
;
180 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
182 htotal_chars
= s
->cr
[0x00] + 5;
183 hretr_start_char
= s
->cr
[0x04];
184 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
185 hretr_end_char
= s
->cr
[0x05] & 0x1f;
187 vtotal_lines
= (s
->cr
[0x06]
188 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
190 vretr_start_line
= s
->cr
[0x10]
191 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
193 vretr_end_line
= s
->cr
[0x11] & 0xf;
197 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
198 clock_sel
= (s
->msr
>> 2) & 3;
199 dots
= (s
->msr
& 1) ? 8 : 9;
201 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
203 htotal_chars
<<= clocking_mode
;
205 r
->total_chars
= vtotal_lines
* htotal_chars
;
207 r
->ticks_per_char
= get_ticks_per_sec() / (r
->total_chars
* r
->freq
);
209 r
->ticks_per_char
= get_ticks_per_sec() / chars_per_sec
;
212 r
->vstart
= vretr_start_line
;
213 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
215 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
216 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
217 r
->htotal
= htotal_chars
;
220 div2
= (s
->cr
[0x17] >> 2) & 1;
221 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
231 "div2 = %d sldiv2 = %d\n"
232 "clocking_mode = %d\n"
233 "clock_sel = %d %d\n"
235 "ticks/char = %" PRId64
"\n"
237 (double) get_ticks_per_sec() / (r
->ticks_per_char
* r
->total_chars
),
255 static uint8_t vga_precise_retrace(VGACommonState
*s
)
257 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
258 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
260 if (r
->total_chars
) {
261 int cur_line
, cur_line_char
, cur_char
;
264 cur_tick
= qemu_get_clock(vm_clock
);
266 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
267 cur_line
= cur_char
/ r
->htotal
;
269 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
270 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
272 cur_line_char
= cur_char
% r
->htotal
;
273 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
274 val
|= ST01_DISP_ENABLE
;
280 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
284 static uint8_t vga_dumb_retrace(VGACommonState
*s
)
286 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
289 int vga_ioport_invalid(VGACommonState
*s
, uint32_t addr
)
291 if (s
->msr
& MSR_COLOR_EMULATION
) {
293 return (addr
>= 0x3b0 && addr
<= 0x3bf);
296 return (addr
>= 0x3d0 && addr
<= 0x3df);
300 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
302 VGACommonState
*s
= opaque
;
305 if (vga_ioport_invalid(s
, addr
)) {
310 if (s
->ar_flip_flop
== 0) {
317 index
= s
->ar_index
& 0x1f;
330 val
= s
->sr
[s
->sr_index
];
332 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
339 val
= s
->dac_write_index
;
342 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
343 if (++s
->dac_sub_index
== 3) {
344 s
->dac_sub_index
= 0;
358 val
= s
->gr
[s
->gr_index
];
360 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
369 val
= s
->cr
[s
->cr_index
];
371 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
376 /* just toggle to fool polling */
377 val
= s
->st01
= s
->retrace(s
);
385 #if defined(DEBUG_VGA)
386 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
391 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
393 VGACommonState
*s
= opaque
;
396 /* check port range access depending on color/monochrome mode */
397 if (vga_ioport_invalid(s
, addr
)) {
401 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
406 if (s
->ar_flip_flop
== 0) {
410 index
= s
->ar_index
& 0x1f;
413 s
->ar
[index
] = val
& 0x3f;
416 s
->ar
[index
] = val
& ~0x10;
422 s
->ar
[index
] = val
& ~0xc0;
425 s
->ar
[index
] = val
& ~0xf0;
428 s
->ar
[index
] = val
& ~0xf0;
434 s
->ar_flip_flop
^= 1;
437 s
->msr
= val
& ~0x10;
438 s
->update_retrace_info(s
);
441 s
->sr_index
= val
& 7;
445 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
447 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
448 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
451 s
->dac_read_index
= val
;
452 s
->dac_sub_index
= 0;
456 s
->dac_write_index
= val
;
457 s
->dac_sub_index
= 0;
461 s
->dac_cache
[s
->dac_sub_index
] = val
;
462 if (++s
->dac_sub_index
== 3) {
463 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
464 s
->dac_sub_index
= 0;
465 s
->dac_write_index
++;
469 s
->gr_index
= val
& 0x0f;
473 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
475 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
484 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
486 /* handle CR0-7 protection */
487 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
488 /* can always write bit 4 of CR7 */
489 if (s
->cr_index
== 7)
490 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
493 s
->cr
[s
->cr_index
] = val
;
495 switch(s
->cr_index
) {
503 s
->update_retrace_info(s
);
514 #ifdef CONFIG_BOCHS_VBE
515 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
517 VGACommonState
*s
= opaque
;
523 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
525 VGACommonState
*s
= opaque
;
528 if (s
->vbe_index
< VBE_DISPI_INDEX_NB
) {
529 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
530 switch(s
->vbe_index
) {
531 /* XXX: do not hardcode ? */
532 case VBE_DISPI_INDEX_XRES
:
533 val
= VBE_DISPI_MAX_XRES
;
535 case VBE_DISPI_INDEX_YRES
:
536 val
= VBE_DISPI_MAX_YRES
;
538 case VBE_DISPI_INDEX_BPP
:
539 val
= VBE_DISPI_MAX_BPP
;
542 val
= s
->vbe_regs
[s
->vbe_index
];
546 val
= s
->vbe_regs
[s
->vbe_index
];
548 } else if (s
->vbe_index
== VBE_DISPI_INDEX_VIDEO_MEMORY_64K
) {
549 val
= s
->vram_size
/ (64 * 1024);
553 #ifdef DEBUG_BOCHS_VBE
554 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
559 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
561 VGACommonState
*s
= opaque
;
565 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
567 VGACommonState
*s
= opaque
;
569 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
570 #ifdef DEBUG_BOCHS_VBE
571 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
573 switch(s
->vbe_index
) {
574 case VBE_DISPI_INDEX_ID
:
575 if (val
== VBE_DISPI_ID0
||
576 val
== VBE_DISPI_ID1
||
577 val
== VBE_DISPI_ID2
||
578 val
== VBE_DISPI_ID3
||
579 val
== VBE_DISPI_ID4
) {
580 s
->vbe_regs
[s
->vbe_index
] = val
;
583 case VBE_DISPI_INDEX_XRES
:
584 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
585 s
->vbe_regs
[s
->vbe_index
] = val
;
588 case VBE_DISPI_INDEX_YRES
:
589 if (val
<= VBE_DISPI_MAX_YRES
) {
590 s
->vbe_regs
[s
->vbe_index
] = val
;
593 case VBE_DISPI_INDEX_BPP
:
596 if (val
== 4 || val
== 8 || val
== 15 ||
597 val
== 16 || val
== 24 || val
== 32) {
598 s
->vbe_regs
[s
->vbe_index
] = val
;
601 case VBE_DISPI_INDEX_BANK
:
602 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
603 val
&= (s
->vbe_bank_mask
>> 2);
605 val
&= s
->vbe_bank_mask
;
607 s
->vbe_regs
[s
->vbe_index
] = val
;
608 s
->bank_offset
= (val
<< 16);
610 case VBE_DISPI_INDEX_ENABLE
:
611 if ((val
& VBE_DISPI_ENABLED
) &&
612 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
613 int h
, shift_control
;
615 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
616 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
617 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
618 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
619 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
620 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
622 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
623 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
625 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
626 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
627 s
->vbe_start_addr
= 0;
629 /* clear the screen (should be done in BIOS) */
630 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
631 memset(s
->vram_ptr
, 0,
632 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
635 /* we initialize the VGA graphic mode (should be done
637 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
638 s
->cr
[0x17] |= 3; /* no CGA modes */
639 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
641 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
642 /* height (only meaningful if < 1024) */
643 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
645 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
646 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
647 /* line compare to 1023 */
652 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
654 s
->sr
[0x01] &= ~8; /* no double line */
657 s
->sr
[4] |= 0x08; /* set chain 4 mode */
658 s
->sr
[2] |= 0x0f; /* activate all planes */
660 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
661 s
->cr
[0x09] &= ~0x9f; /* no double scan */
663 /* XXX: the bios should do that */
666 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
667 s
->vbe_regs
[s
->vbe_index
] = val
;
669 case VBE_DISPI_INDEX_VIRT_WIDTH
:
671 int w
, h
, line_offset
;
673 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
676 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
677 line_offset
= w
>> 1;
679 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
680 h
= s
->vram_size
/ line_offset
;
681 /* XXX: support weird bochs semantics ? */
682 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
684 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
685 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
686 s
->vbe_line_offset
= line_offset
;
689 case VBE_DISPI_INDEX_X_OFFSET
:
690 case VBE_DISPI_INDEX_Y_OFFSET
:
693 s
->vbe_regs
[s
->vbe_index
] = val
;
694 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
695 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
696 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
697 s
->vbe_start_addr
+= x
>> 1;
699 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
700 s
->vbe_start_addr
>>= 2;
710 /* called for accesses between 0xa0000 and 0xc0000 */
711 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
713 VGACommonState
*s
= opaque
;
714 int memory_map_mode
, plane
;
717 /* convert to VGA memory offset */
718 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
720 switch(memory_map_mode
) {
726 addr
+= s
->bank_offset
;
741 if (s
->sr
[4] & 0x08) {
742 /* chain 4 mode : simplest access */
743 ret
= s
->vram_ptr
[addr
];
744 } else if (s
->gr
[5] & 0x10) {
745 /* odd/even mode (aka text mode mapping) */
746 plane
= (s
->gr
[4] & 2) | (addr
& 1);
747 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
749 /* standard VGA latched access */
750 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
752 if (!(s
->gr
[5] & 0x08)) {
755 ret
= GET_PLANE(s
->latch
, plane
);
758 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
767 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
770 #ifdef TARGET_WORDS_BIGENDIAN
771 v
= vga_mem_readb(opaque
, addr
) << 8;
772 v
|= vga_mem_readb(opaque
, addr
+ 1);
774 v
= vga_mem_readb(opaque
, addr
);
775 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
780 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
783 #ifdef TARGET_WORDS_BIGENDIAN
784 v
= vga_mem_readb(opaque
, addr
) << 24;
785 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
786 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
787 v
|= vga_mem_readb(opaque
, addr
+ 3);
789 v
= vga_mem_readb(opaque
, addr
);
790 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
791 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
792 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
797 /* called for accesses between 0xa0000 and 0xc0000 */
798 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
800 VGACommonState
*s
= opaque
;
801 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
802 uint32_t write_mask
, bit_mask
, set_mask
;
805 printf("vga: [0x" TARGET_FMT_plx
"] = 0x%02x\n", addr
, val
);
807 /* convert to VGA memory offset */
808 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
810 switch(memory_map_mode
) {
816 addr
+= s
->bank_offset
;
831 if (s
->sr
[4] & 0x08) {
832 /* chain 4 mode : simplest access */
835 if (s
->sr
[2] & mask
) {
836 s
->vram_ptr
[addr
] = val
;
838 printf("vga: chain4: [0x" TARGET_FMT_plx
"]\n", addr
);
840 s
->plane_updated
|= mask
; /* only used to detect font change */
841 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
843 } else if (s
->gr
[5] & 0x10) {
844 /* odd/even mode (aka text mode mapping) */
845 plane
= (s
->gr
[4] & 2) | (addr
& 1);
847 if (s
->sr
[2] & mask
) {
848 addr
= ((addr
& ~1) << 1) | plane
;
849 s
->vram_ptr
[addr
] = val
;
851 printf("vga: odd/even: [0x" TARGET_FMT_plx
"]\n", addr
);
853 s
->plane_updated
|= mask
; /* only used to detect font change */
854 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
857 /* standard VGA latched access */
858 write_mode
= s
->gr
[5] & 3;
864 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
868 /* apply set/reset mask */
869 set_mask
= mask16
[s
->gr
[1]];
870 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
877 val
= mask16
[val
& 0x0f];
883 val
= (val
>> b
) | (val
<< (8 - b
));
885 bit_mask
= s
->gr
[8] & val
;
886 val
= mask16
[s
->gr
[0]];
890 /* apply logical operation */
891 func_select
= s
->gr
[3] >> 3;
892 switch(func_select
) {
912 bit_mask
|= bit_mask
<< 8;
913 bit_mask
|= bit_mask
<< 16;
914 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
917 /* mask data according to sr[2] */
919 s
->plane_updated
|= mask
; /* only used to detect font change */
920 write_mask
= mask16
[mask
];
921 ((uint32_t *)s
->vram_ptr
)[addr
] =
922 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
925 printf("vga: latch: [0x" TARGET_FMT_plx
"] mask=0x%08x val=0x%08x\n",
926 addr
* 4, write_mask
, val
);
928 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
932 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
934 #ifdef TARGET_WORDS_BIGENDIAN
935 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
936 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
938 vga_mem_writeb(opaque
, addr
, val
& 0xff);
939 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
943 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
945 #ifdef TARGET_WORDS_BIGENDIAN
946 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
947 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
948 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
949 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
951 vga_mem_writeb(opaque
, addr
, val
& 0xff);
952 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
953 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
954 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
958 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
959 const uint8_t *font_ptr
, int h
,
960 uint32_t fgcol
, uint32_t bgcol
);
961 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
962 const uint8_t *font_ptr
, int h
,
963 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
964 typedef void vga_draw_line_func(VGACommonState
*s1
, uint8_t *d
,
965 const uint8_t *s
, int width
);
968 #include "vga_template.h"
971 #include "vga_template.h"
975 #include "vga_template.h"
978 #include "vga_template.h"
982 #include "vga_template.h"
985 #include "vga_template.h"
989 #include "vga_template.h"
991 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
994 col
= rgb_to_pixel8(r
, g
, b
);
1000 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
1003 col
= rgb_to_pixel15(r
, g
, b
);
1008 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1012 col
= rgb_to_pixel15bgr(r
, g
, b
);
1017 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1020 col
= rgb_to_pixel16(r
, g
, b
);
1025 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1029 col
= rgb_to_pixel16bgr(r
, g
, b
);
1034 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1037 col
= rgb_to_pixel32(r
, g
, b
);
1041 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1044 col
= rgb_to_pixel32bgr(r
, g
, b
);
1048 /* return true if the palette was modified */
1049 static int update_palette16(VGACommonState
*s
)
1052 uint32_t v
, col
, *palette
;
1055 palette
= s
->last_palette
;
1056 for(i
= 0; i
< 16; i
++) {
1058 if (s
->ar
[0x10] & 0x80)
1059 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1061 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1063 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1064 c6_to_8(s
->palette
[v
+ 1]),
1065 c6_to_8(s
->palette
[v
+ 2]));
1066 if (col
!= palette
[i
]) {
1074 /* return true if the palette was modified */
1075 static int update_palette256(VGACommonState
*s
)
1078 uint32_t v
, col
, *palette
;
1081 palette
= s
->last_palette
;
1083 for(i
= 0; i
< 256; i
++) {
1085 col
= s
->rgb_to_pixel(s
->palette
[v
],
1089 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1090 c6_to_8(s
->palette
[v
+ 1]),
1091 c6_to_8(s
->palette
[v
+ 2]));
1093 if (col
!= palette
[i
]) {
1102 static void vga_get_offsets(VGACommonState
*s
,
1103 uint32_t *pline_offset
,
1104 uint32_t *pstart_addr
,
1105 uint32_t *pline_compare
)
1107 uint32_t start_addr
, line_offset
, line_compare
;
1108 #ifdef CONFIG_BOCHS_VBE
1109 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1110 line_offset
= s
->vbe_line_offset
;
1111 start_addr
= s
->vbe_start_addr
;
1112 line_compare
= 65535;
1116 /* compute line_offset in bytes */
1117 line_offset
= s
->cr
[0x13];
1120 /* starting address */
1121 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1124 line_compare
= s
->cr
[0x18] |
1125 ((s
->cr
[0x07] & 0x10) << 4) |
1126 ((s
->cr
[0x09] & 0x40) << 3);
1128 *pline_offset
= line_offset
;
1129 *pstart_addr
= start_addr
;
1130 *pline_compare
= line_compare
;
1133 /* update start_addr and line_offset. Return TRUE if modified */
1134 static int update_basic_params(VGACommonState
*s
)
1137 uint32_t start_addr
, line_offset
, line_compare
;
1141 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1143 if (line_offset
!= s
->line_offset
||
1144 start_addr
!= s
->start_addr
||
1145 line_compare
!= s
->line_compare
) {
1146 s
->line_offset
= line_offset
;
1147 s
->start_addr
= start_addr
;
1148 s
->line_compare
= line_compare
;
1156 static inline int get_depth_index(DisplayState
*s
)
1158 switch(ds_get_bits_per_pixel(s
)) {
1167 if (is_surface_bgr(s
->surface
))
1174 static vga_draw_glyph8_func
* const vga_draw_glyph8_table
[NB_DEPTHS
] = {
1184 static vga_draw_glyph8_func
* const vga_draw_glyph16_table
[NB_DEPTHS
] = {
1186 vga_draw_glyph16_16
,
1187 vga_draw_glyph16_16
,
1188 vga_draw_glyph16_32
,
1189 vga_draw_glyph16_32
,
1190 vga_draw_glyph16_16
,
1191 vga_draw_glyph16_16
,
1194 static vga_draw_glyph9_func
* const vga_draw_glyph9_table
[NB_DEPTHS
] = {
1204 static const uint8_t cursor_glyph
[32 * 4] = {
1205 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1206 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1208 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1209 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1210 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1211 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1215 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1216 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1217 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1218 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1219 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1220 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1223 static void vga_get_text_resolution(VGACommonState
*s
, int *pwidth
, int *pheight
,
1224 int *pcwidth
, int *pcheight
)
1226 int width
, cwidth
, height
, cheight
;
1228 /* total width & height */
1229 cheight
= (s
->cr
[9] & 0x1f) + 1;
1231 if (!(s
->sr
[1] & 0x01))
1233 if (s
->sr
[1] & 0x08)
1234 cwidth
= 16; /* NOTE: no 18 pixel wide */
1235 width
= (s
->cr
[0x01] + 1);
1236 if (s
->cr
[0x06] == 100) {
1237 /* ugly hack for CGA 160x100x16 - explain me the logic */
1240 height
= s
->cr
[0x12] |
1241 ((s
->cr
[0x07] & 0x02) << 7) |
1242 ((s
->cr
[0x07] & 0x40) << 3);
1243 height
= (height
+ 1) / cheight
;
1249 *pcheight
= cheight
;
1252 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1254 static rgb_to_pixel_dup_func
* const rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1259 rgb_to_pixel32bgr_dup
,
1260 rgb_to_pixel15bgr_dup
,
1261 rgb_to_pixel16bgr_dup
,
1272 static void vga_draw_text(VGACommonState
*s
, int full_update
)
1274 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1275 int cx_min
, cx_max
, linesize
, x_incr
, line
, line1
;
1276 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1277 uint8_t *d1
, *d
, *src
, *dest
, *cursor_ptr
;
1278 const uint8_t *font_ptr
, *font_base
[2];
1279 int dup9
, line_offset
, depth_index
;
1281 uint32_t *ch_attr_ptr
;
1282 vga_draw_glyph8_func
*vga_draw_glyph8
;
1283 vga_draw_glyph9_func
*vga_draw_glyph9
;
1285 vga_dirty_log_stop(s
);
1287 /* compute font data address (in plane 2) */
1289 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1290 if (offset
!= s
->font_offsets
[0]) {
1291 s
->font_offsets
[0] = offset
;
1294 font_base
[0] = s
->vram_ptr
+ offset
;
1296 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1297 font_base
[1] = s
->vram_ptr
+ offset
;
1298 if (offset
!= s
->font_offsets
[1]) {
1299 s
->font_offsets
[1] = offset
;
1302 if (s
->plane_updated
& (1 << 2)) {
1303 /* if the plane 2 was modified since the last display, it
1304 indicates the font may have been modified */
1305 s
->plane_updated
= 0;
1308 full_update
|= update_basic_params(s
);
1310 line_offset
= s
->line_offset
;
1312 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1313 if ((height
* width
) > CH_ATTR_SIZE
) {
1314 /* better than nothing: exit if transient size is too big */
1318 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1319 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1320 s
->last_scr_width
= width
* cw
;
1321 s
->last_scr_height
= height
* cheight
;
1322 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1324 s
->last_width
= width
;
1325 s
->last_height
= height
;
1326 s
->last_ch
= cheight
;
1331 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1332 full_update
|= update_palette16(s
);
1333 palette
= s
->last_palette
;
1334 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1336 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1337 if (cursor_offset
!= s
->cursor_offset
||
1338 s
->cr
[0xa] != s
->cursor_start
||
1339 s
->cr
[0xb] != s
->cursor_end
) {
1340 /* if the cursor position changed, we update the old and new
1342 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1343 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1344 if (cursor_offset
< CH_ATTR_SIZE
)
1345 s
->last_ch_attr
[cursor_offset
] = -1;
1346 s
->cursor_offset
= cursor_offset
;
1347 s
->cursor_start
= s
->cr
[0xa];
1348 s
->cursor_end
= s
->cr
[0xb];
1350 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1352 depth_index
= get_depth_index(s
->ds
);
1354 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1356 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1357 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1359 dest
= ds_get_data(s
->ds
);
1360 linesize
= ds_get_linesize(s
->ds
);
1361 ch_attr_ptr
= s
->last_ch_attr
;
1363 offset
= s
->start_addr
* 4;
1364 for(cy
= 0; cy
< height
; cy
++) {
1366 src
= s
->vram_ptr
+ offset
;
1369 for(cx
= 0; cx
< width
; cx
++) {
1370 ch_attr
= *(uint16_t *)src
;
1371 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1376 *ch_attr_ptr
= ch_attr
;
1377 #ifdef HOST_WORDS_BIGENDIAN
1379 cattr
= ch_attr
& 0xff;
1381 ch
= ch_attr
& 0xff;
1382 cattr
= ch_attr
>> 8;
1384 font_ptr
= font_base
[(cattr
>> 3) & 1];
1385 font_ptr
+= 32 * 4 * ch
;
1386 bgcol
= palette
[cattr
>> 4];
1387 fgcol
= palette
[cattr
& 0x0f];
1389 vga_draw_glyph8(d1
, linesize
,
1390 font_ptr
, cheight
, fgcol
, bgcol
);
1393 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1395 vga_draw_glyph9(d1
, linesize
,
1396 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1398 if (src
== cursor_ptr
&&
1399 !(s
->cr
[0x0a] & 0x20)) {
1400 int line_start
, line_last
, h
;
1401 /* draw the cursor */
1402 line_start
= s
->cr
[0x0a] & 0x1f;
1403 line_last
= s
->cr
[0x0b] & 0x1f;
1404 /* XXX: check that */
1405 if (line_last
> cheight
- 1)
1406 line_last
= cheight
- 1;
1407 if (line_last
>= line_start
&& line_start
< cheight
) {
1408 h
= line_last
- line_start
+ 1;
1409 d
= d1
+ linesize
* line_start
;
1411 vga_draw_glyph8(d
, linesize
,
1412 cursor_glyph
, h
, fgcol
, bgcol
);
1414 vga_draw_glyph9(d
, linesize
,
1415 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1425 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1426 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1428 dest
+= linesize
* cheight
;
1429 line1
= line
+ cheight
;
1430 offset
+= line_offset
;
1431 if (line
< s
->line_compare
&& line1
>= s
->line_compare
) {
1452 static vga_draw_line_func
* const vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1462 vga_draw_line2d2_16
,
1463 vga_draw_line2d2_16
,
1464 vga_draw_line2d2_32
,
1465 vga_draw_line2d2_32
,
1466 vga_draw_line2d2_16
,
1467 vga_draw_line2d2_16
,
1478 vga_draw_line4d2_16
,
1479 vga_draw_line4d2_16
,
1480 vga_draw_line4d2_32
,
1481 vga_draw_line4d2_32
,
1482 vga_draw_line4d2_16
,
1483 vga_draw_line4d2_16
,
1486 vga_draw_line8d2_16
,
1487 vga_draw_line8d2_16
,
1488 vga_draw_line8d2_32
,
1489 vga_draw_line8d2_32
,
1490 vga_draw_line8d2_16
,
1491 vga_draw_line8d2_16
,
1505 vga_draw_line15_32bgr
,
1506 vga_draw_line15_15bgr
,
1507 vga_draw_line15_16bgr
,
1513 vga_draw_line16_32bgr
,
1514 vga_draw_line16_15bgr
,
1515 vga_draw_line16_16bgr
,
1521 vga_draw_line24_32bgr
,
1522 vga_draw_line24_15bgr
,
1523 vga_draw_line24_16bgr
,
1529 vga_draw_line32_32bgr
,
1530 vga_draw_line32_15bgr
,
1531 vga_draw_line32_16bgr
,
1534 static int vga_get_bpp(VGACommonState
*s
)
1537 #ifdef CONFIG_BOCHS_VBE
1538 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1539 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1548 static void vga_get_resolution(VGACommonState
*s
, int *pwidth
, int *pheight
)
1552 #ifdef CONFIG_BOCHS_VBE
1553 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1554 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1555 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1559 width
= (s
->cr
[0x01] + 1) * 8;
1560 height
= s
->cr
[0x12] |
1561 ((s
->cr
[0x07] & 0x02) << 7) |
1562 ((s
->cr
[0x07] & 0x40) << 3);
1563 height
= (height
+ 1);
1569 void vga_invalidate_scanlines(VGACommonState
*s
, int y1
, int y2
)
1572 if (y1
>= VGA_MAX_HEIGHT
)
1574 if (y2
>= VGA_MAX_HEIGHT
)
1575 y2
= VGA_MAX_HEIGHT
;
1576 for(y
= y1
; y
< y2
; y
++) {
1577 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1581 static void vga_sync_dirty_bitmap(VGACommonState
*s
)
1584 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1586 if (s
->lfb_vram_mapped
) {
1587 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1588 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1591 #ifdef CONFIG_BOCHS_VBE
1592 if (s
->vbe_mapped
) {
1593 cpu_physical_sync_dirty_bitmap(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
1594 VBE_DISPI_LFB_PHYSICAL_ADDRESS
+ s
->vram_size
);
1598 vga_dirty_log_start(s
);
1601 static int s1
, s2
, s3
;
1603 static void mark_dirty(target_phys_addr_t start
, target_phys_addr_t len
)
1605 target_phys_addr_t end
= start
+ len
;
1607 while (start
< end
) {
1608 cpu_physical_memory_set_dirty(cpu_get_physical_page_desc(start
));
1609 start
+= TARGET_PAGE_SIZE
;
1613 void vga_dirty_log_start(VGACommonState
*s
)
1615 if (kvm_enabled() && s
->map_addr
)
1617 kvm_log_start(s
->map_addr
, s
->map_end
- s
->map_addr
);
1618 mark_dirty(s
->map_addr
, s
->map_end
- s
->map_addr
);
1621 if (kvm_enabled() && s
->lfb_vram_mapped
) {
1623 kvm_log_start(isa_mem_base
+ 0xa0000, 0x8000);
1624 kvm_log_start(isa_mem_base
+ 0xa8000, 0x8000);
1625 mark_dirty(isa_mem_base
+ 0xa0000, 0x10000);
1630 #ifdef CONFIG_BOCHS_VBE
1631 if (kvm_enabled() && s
->vbe_mapped
) {
1633 kvm_log_start(VBE_DISPI_LFB_PHYSICAL_ADDRESS
, s
->vram_size
);
1640 void vga_dirty_log_stop(VGACommonState
*s
)
1642 if (kvm_enabled() && s
->map_addr
&& s1
)
1643 kvm_log_stop(s
->map_addr
, s
->map_end
- s
->map_addr
);
1645 if (kvm_enabled() && s
->lfb_vram_mapped
&& s1
) {
1646 kvm_log_stop(isa_mem_base
+ 0xa0000, 0x8000);
1647 kvm_log_stop(isa_mem_base
+ 0xa8000, 0x8000);
1650 #ifdef CONFIG_BOCHS_VBE
1651 if (kvm_enabled() && s
->vbe_mapped
&& s3
) {
1652 kvm_log_stop(VBE_DISPI_LFB_PHYSICAL_ADDRESS
, s
->vram_size
);
1659 void vga_dirty_log_restart(VGACommonState
*s
)
1661 vga_dirty_log_stop(s
);
1662 vga_dirty_log_start(s
);
1668 static void vga_draw_graphic(VGACommonState
*s
, int full_update
)
1670 int y1
, y
, update
, linesize
, y_start
, double_scan
, mask
, depth
;
1671 int width
, height
, shift_control
, line_offset
, bwidth
, bits
;
1672 ram_addr_t page0
, page1
, page_min
, page_max
;
1673 int disp_width
, multi_scan
, multi_run
;
1675 uint32_t v
, addr1
, addr
;
1676 vga_draw_line_func
*vga_draw_line
;
1678 full_update
|= update_basic_params(s
);
1681 vga_sync_dirty_bitmap(s
);
1683 s
->get_resolution(s
, &width
, &height
);
1686 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1687 double_scan
= (s
->cr
[0x09] >> 7);
1688 if (shift_control
!= 1) {
1689 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1691 /* in CGA modes, multi_scan is ignored */
1692 /* XXX: is it correct ? */
1693 multi_scan
= double_scan
;
1695 multi_run
= multi_scan
;
1696 if (shift_control
!= s
->shift_control
||
1697 double_scan
!= s
->double_scan
) {
1699 s
->shift_control
= shift_control
;
1700 s
->double_scan
= double_scan
;
1703 if (shift_control
== 0) {
1704 if (s
->sr
[0x01] & 8) {
1707 } else if (shift_control
== 1) {
1708 if (s
->sr
[0x01] & 8) {
1713 depth
= s
->get_bpp(s
);
1714 if (s
->line_offset
!= s
->last_line_offset
||
1715 disp_width
!= s
->last_width
||
1716 height
!= s
->last_height
||
1717 s
->last_depth
!= depth
) {
1718 #if defined(HOST_WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1719 if (depth
== 16 || depth
== 32) {
1723 qemu_free_displaysurface(s
->ds
);
1724 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1726 s
->vram_ptr
+ (s
->start_addr
* 4));
1727 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1728 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1732 qemu_console_resize(s
->ds
, disp_width
, height
);
1734 s
->last_scr_width
= disp_width
;
1735 s
->last_scr_height
= height
;
1736 s
->last_width
= disp_width
;
1737 s
->last_height
= height
;
1738 s
->last_line_offset
= s
->line_offset
;
1739 s
->last_depth
= depth
;
1741 } else if (is_buffer_shared(s
->ds
->surface
) &&
1742 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1743 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1748 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1750 if (shift_control
== 0) {
1751 full_update
|= update_palette16(s
);
1752 if (s
->sr
[0x01] & 8) {
1753 v
= VGA_DRAW_LINE4D2
;
1758 } else if (shift_control
== 1) {
1759 full_update
|= update_palette16(s
);
1760 if (s
->sr
[0x01] & 8) {
1761 v
= VGA_DRAW_LINE2D2
;
1767 switch(s
->get_bpp(s
)) {
1770 full_update
|= update_palette256(s
);
1771 v
= VGA_DRAW_LINE8D2
;
1775 full_update
|= update_palette256(s
);
1780 v
= VGA_DRAW_LINE15
;
1784 v
= VGA_DRAW_LINE16
;
1788 v
= VGA_DRAW_LINE24
;
1792 v
= VGA_DRAW_LINE32
;
1797 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1799 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1800 s
->cursor_invalidate(s
);
1802 line_offset
= s
->line_offset
;
1804 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1805 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1807 addr1
= (s
->start_addr
* 4);
1808 bwidth
= (width
* bits
+ 7) / 8;
1812 d
= ds_get_data(s
->ds
);
1813 linesize
= ds_get_linesize(s
->ds
);
1815 for(y
= 0; y
< height
; y
++) {
1817 if (!(s
->cr
[0x17] & 1)) {
1819 /* CGA compatibility handling */
1820 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1821 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1823 if (!(s
->cr
[0x17] & 2)) {
1824 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1826 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1827 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1828 update
= full_update
|
1829 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1830 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1831 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1832 /* if wide line, can use another page */
1833 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1836 /* explicit invalidation for the hardware cursor */
1837 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1841 if (page0
< page_min
)
1843 if (page1
> page_max
)
1845 if (!(is_buffer_shared(s
->ds
->surface
))) {
1846 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1847 if (s
->cursor_draw_line
)
1848 s
->cursor_draw_line(s
, d
, y
);
1852 /* flush to display */
1853 dpy_update(s
->ds
, 0, y_start
,
1854 disp_width
, y
- y_start
);
1859 mask
= (s
->cr
[0x17] & 3) ^ 3;
1860 if ((y1
& mask
) == mask
)
1861 addr1
+= line_offset
;
1863 multi_run
= multi_scan
;
1867 /* line compare acts on the displayed lines */
1868 if (y
== s
->line_compare
)
1873 /* flush to display */
1874 dpy_update(s
->ds
, 0, y_start
,
1875 disp_width
, y
- y_start
);
1877 /* reset modified pages */
1878 if (page_max
>= page_min
) {
1879 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1882 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1885 static void vga_draw_blank(VGACommonState
*s
, int full_update
)
1892 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1894 vga_dirty_log_stop(s
);
1897 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1898 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1899 val
= s
->rgb_to_pixel(0, 0, 0);
1902 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1903 d
= ds_get_data(s
->ds
);
1904 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1906 d
+= ds_get_linesize(s
->ds
);
1908 dpy_update(s
->ds
, 0, 0,
1909 s
->last_scr_width
, s
->last_scr_height
);
1912 #define GMODE_TEXT 0
1913 #define GMODE_GRAPH 1
1914 #define GMODE_BLANK 2
1916 static void vga_update_display(void *opaque
)
1918 VGACommonState
*s
= opaque
;
1919 int full_update
, graphic_mode
;
1921 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1925 if (!(s
->ar_index
& 0x20)) {
1926 graphic_mode
= GMODE_BLANK
;
1928 graphic_mode
= s
->gr
[6] & 1;
1930 if (graphic_mode
!= s
->graphic_mode
) {
1931 s
->graphic_mode
= graphic_mode
;
1934 switch(graphic_mode
) {
1936 vga_draw_text(s
, full_update
);
1942 vga_draw_graphic(s
, full_update
);
1946 vga_draw_blank(s
, full_update
);
1952 /* force a full display refresh */
1953 static void vga_invalidate_display(void *opaque
)
1955 VGACommonState
*s
= opaque
;
1958 s
->last_height
= -1;
1961 void vga_common_reset(VGACommonState
*s
)
1967 s
->lfb_vram_mapped
= 0;
1971 memset(s
->sr
, '\0', sizeof(s
->sr
));
1973 memset(s
->gr
, '\0', sizeof(s
->gr
));
1975 memset(s
->ar
, '\0', sizeof(s
->ar
));
1976 s
->ar_flip_flop
= 0;
1978 memset(s
->cr
, '\0', sizeof(s
->cr
));
1984 s
->dac_sub_index
= 0;
1985 s
->dac_read_index
= 0;
1986 s
->dac_write_index
= 0;
1987 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1989 memset(s
->palette
, '\0', sizeof(s
->palette
));
1991 #ifdef CONFIG_BOCHS_VBE
1993 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1994 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID5
;
1995 s
->vbe_start_addr
= 0;
1996 s
->vbe_line_offset
= 0;
1997 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1999 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
2000 s
->graphic_mode
= -1; /* force full update */
2001 s
->shift_control
= 0;
2004 s
->line_compare
= 0;
2006 s
->plane_updated
= 0;
2011 s
->last_scr_width
= 0;
2012 s
->last_scr_height
= 0;
2013 s
->cursor_start
= 0;
2015 s
->cursor_offset
= 0;
2016 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
2017 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
2018 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
2019 switch (vga_retrace_method
) {
2020 case VGA_RETRACE_DUMB
:
2022 case VGA_RETRACE_PRECISE
:
2023 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
2028 static void vga_reset(void *opaque
)
2030 VGACommonState
*s
= opaque
;
2031 vga_common_reset(s
);
2034 #define TEXTMODE_X(x) ((x) % width)
2035 #define TEXTMODE_Y(x) ((x) / width)
2036 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
2037 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
2038 /* relay text rendering to the display driver
2039 * instead of doing a full vga_update_display() */
2040 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
2042 VGACommonState
*s
= opaque
;
2043 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
2044 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
2046 console_ch_t
*dst
, val
;
2047 char msg_buffer
[80];
2048 int full_update
= 0;
2050 if (!(s
->ar_index
& 0x20)) {
2051 graphic_mode
= GMODE_BLANK
;
2053 graphic_mode
= s
->gr
[6] & 1;
2055 if (graphic_mode
!= s
->graphic_mode
) {
2056 s
->graphic_mode
= graphic_mode
;
2059 if (s
->last_width
== -1) {
2064 switch (graphic_mode
) {
2066 /* TODO: update palette */
2067 full_update
|= update_basic_params(s
);
2069 /* total width & height */
2070 cheight
= (s
->cr
[9] & 0x1f) + 1;
2072 if (!(s
->sr
[1] & 0x01))
2074 if (s
->sr
[1] & 0x08)
2075 cw
= 16; /* NOTE: no 18 pixel wide */
2076 width
= (s
->cr
[0x01] + 1);
2077 if (s
->cr
[0x06] == 100) {
2078 /* ugly hack for CGA 160x100x16 - explain me the logic */
2081 height
= s
->cr
[0x12] |
2082 ((s
->cr
[0x07] & 0x02) << 7) |
2083 ((s
->cr
[0x07] & 0x40) << 3);
2084 height
= (height
+ 1) / cheight
;
2087 size
= (height
* width
);
2088 if (size
> CH_ATTR_SIZE
) {
2092 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2097 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2098 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2099 s
->last_scr_width
= width
* cw
;
2100 s
->last_scr_height
= height
* cheight
;
2101 s
->ds
->surface
->width
= width
;
2102 s
->ds
->surface
->height
= height
;
2104 s
->last_width
= width
;
2105 s
->last_height
= height
;
2106 s
->last_ch
= cheight
;
2111 /* Update "hardware" cursor */
2112 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2113 if (cursor_offset
!= s
->cursor_offset
||
2114 s
->cr
[0xa] != s
->cursor_start
||
2115 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2116 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2117 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2119 TEXTMODE_X(cursor_offset
),
2120 TEXTMODE_Y(cursor_offset
));
2122 dpy_cursor(s
->ds
, -1, -1);
2123 s
->cursor_offset
= cursor_offset
;
2124 s
->cursor_start
= s
->cr
[0xa];
2125 s
->cursor_end
= s
->cr
[0xb];
2128 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2132 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2133 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2135 dpy_update(s
->ds
, 0, 0, width
, height
);
2139 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2140 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2148 for (; i
< size
; src
++, dst
++, i
++) {
2149 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2156 if (c_min
<= c_max
) {
2157 i
= TEXTMODE_Y(c_min
);
2158 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2167 s
->get_resolution(s
, &width
, &height
);
2168 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2176 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2180 /* Display a message */
2182 s
->last_height
= height
= 3;
2183 dpy_cursor(s
->ds
, -1, -1);
2184 s
->ds
->surface
->width
= s
->last_width
;
2185 s
->ds
->surface
->height
= height
;
2188 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2189 console_write_ch(dst
++, ' ');
2191 size
= strlen(msg_buffer
);
2192 width
= (s
->last_width
- size
) / 2;
2193 dst
= chardata
+ s
->last_width
+ width
;
2194 for (i
= 0; i
< size
; i
++)
2195 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2197 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2200 CPUReadMemoryFunc
* const vga_mem_read
[3] = {
2206 CPUWriteMemoryFunc
* const vga_mem_write
[3] = {
2212 static int vga_common_post_load(void *opaque
, int version_id
)
2214 VGACommonState
*s
= opaque
;
2217 s
->graphic_mode
= -1;
2221 const VMStateDescription vmstate_vga_common
= {
2224 .minimum_version_id
= 2,
2225 .minimum_version_id_old
= 2,
2226 .post_load
= vga_common_post_load
,
2227 .fields
= (VMStateField
[]) {
2228 VMSTATE_UINT32(latch
, VGACommonState
),
2229 VMSTATE_UINT8(sr_index
, VGACommonState
),
2230 VMSTATE_PARTIAL_BUFFER(sr
, VGACommonState
, 8),
2231 VMSTATE_UINT8(gr_index
, VGACommonState
),
2232 VMSTATE_PARTIAL_BUFFER(gr
, VGACommonState
, 16),
2233 VMSTATE_UINT8(ar_index
, VGACommonState
),
2234 VMSTATE_BUFFER(ar
, VGACommonState
),
2235 VMSTATE_INT32(ar_flip_flop
, VGACommonState
),
2236 VMSTATE_UINT8(cr_index
, VGACommonState
),
2237 VMSTATE_BUFFER(cr
, VGACommonState
),
2238 VMSTATE_UINT8(msr
, VGACommonState
),
2239 VMSTATE_UINT8(fcr
, VGACommonState
),
2240 VMSTATE_UINT8(st00
, VGACommonState
),
2241 VMSTATE_UINT8(st01
, VGACommonState
),
2243 VMSTATE_UINT8(dac_state
, VGACommonState
),
2244 VMSTATE_UINT8(dac_sub_index
, VGACommonState
),
2245 VMSTATE_UINT8(dac_read_index
, VGACommonState
),
2246 VMSTATE_UINT8(dac_write_index
, VGACommonState
),
2247 VMSTATE_BUFFER(dac_cache
, VGACommonState
),
2248 VMSTATE_BUFFER(palette
, VGACommonState
),
2250 VMSTATE_INT32(bank_offset
, VGACommonState
),
2251 VMSTATE_UINT8_EQUAL(is_vbe_vmstate
, VGACommonState
),
2252 #ifdef CONFIG_BOCHS_VBE
2253 VMSTATE_UINT16(vbe_index
, VGACommonState
),
2254 VMSTATE_UINT16_ARRAY(vbe_regs
, VGACommonState
, VBE_DISPI_INDEX_NB
),
2255 VMSTATE_UINT32(vbe_start_addr
, VGACommonState
),
2256 VMSTATE_UINT32(vbe_line_offset
, VGACommonState
),
2257 VMSTATE_UINT32(vbe_bank_mask
, VGACommonState
),
2259 VMSTATE_END_OF_LIST()
2263 void vga_common_init(VGACommonState
*s
, int vga_ram_size
)
2267 for(i
= 0;i
< 256; i
++) {
2269 for(j
= 0; j
< 8; j
++) {
2270 v
|= ((i
>> j
) & 1) << (j
* 4);
2275 for(j
= 0; j
< 4; j
++) {
2276 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2280 for(i
= 0; i
< 16; i
++) {
2282 for(j
= 0; j
< 4; j
++) {
2285 v
|= b
<< (2 * j
+ 1);
2290 #ifdef CONFIG_BOCHS_VBE
2291 s
->is_vbe_vmstate
= 1;
2293 s
->is_vbe_vmstate
= 0;
2295 s
->vram_offset
= qemu_ram_alloc(vga_ram_size
);
2296 s
->vram_ptr
= qemu_get_ram_ptr(s
->vram_offset
);
2297 s
->vram_size
= vga_ram_size
;
2298 s
->get_bpp
= vga_get_bpp
;
2299 s
->get_offsets
= vga_get_offsets
;
2300 s
->get_resolution
= vga_get_resolution
;
2301 s
->update
= vga_update_display
;
2302 s
->invalidate
= vga_invalidate_display
;
2303 s
->screen_dump
= vga_screen_dump
;
2304 s
->text_update
= vga_update_text
;
2305 switch (vga_retrace_method
) {
2306 case VGA_RETRACE_DUMB
:
2307 s
->retrace
= vga_dumb_retrace
;
2308 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2311 case VGA_RETRACE_PRECISE
:
2312 s
->retrace
= vga_precise_retrace
;
2313 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2318 /* used by both ISA and PCI */
2319 void vga_init(VGACommonState
*s
)
2323 qemu_register_reset(vga_reset
, s
);
2325 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2327 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2328 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2329 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2330 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2332 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2334 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2335 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2336 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2337 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2340 #ifdef CONFIG_BOCHS_VBE
2341 #if defined (TARGET_I386)
2342 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2343 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2345 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2346 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2348 /* old Bochs IO ports */
2349 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2350 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2352 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2353 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2355 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2356 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2358 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2359 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2361 #endif /* CONFIG_BOCHS_VBE */
2363 vga_io_memory
= cpu_register_io_memory(vga_mem_read
, vga_mem_write
, s
);
2364 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2366 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2369 void vga_init_vbe(VGACommonState
*s
)
2371 #ifdef CONFIG_BOCHS_VBE
2372 /* XXX: use optimized standard vga accesses */
2373 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2374 VGA_RAM_SIZE
, s
->vram_offset
);
2378 /********************************************************/
2379 /* vga screen dump */
2381 static void vga_save_dpy_update(DisplayState
*ds
,
2382 int x
, int y
, int w
, int h
)
2384 if (screen_dump_filename
) {
2385 ppm_save(screen_dump_filename
, ds
->surface
);
2386 screen_dump_filename
= NULL
;
2390 static void vga_save_dpy_resize(DisplayState
*s
)
2394 static void vga_save_dpy_refresh(DisplayState
*s
)
2398 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2406 f
= fopen(filename
, "wb");
2409 fprintf(f
, "P6\n%d %d\n%d\n",
2410 ds
->width
, ds
->height
, 255);
2412 for(y
= 0; y
< ds
->height
; y
++) {
2414 for(x
= 0; x
< ds
->width
; x
++) {
2415 if (ds
->pf
.bits_per_pixel
== 32)
2418 v
= (uint32_t) (*(uint16_t *)d
);
2419 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2421 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2423 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2428 d
+= ds
->pf
.bytes_per_pixel
;
2436 static DisplayChangeListener
* vga_screen_dump_init(DisplayState
*ds
)
2438 DisplayChangeListener
*dcl
;
2440 dcl
= qemu_mallocz(sizeof(DisplayChangeListener
));
2441 dcl
->dpy_update
= vga_save_dpy_update
;
2442 dcl
->dpy_resize
= vga_save_dpy_resize
;
2443 dcl
->dpy_refresh
= vga_save_dpy_refresh
;
2444 register_displaychangelistener(ds
, dcl
);
2448 /* save the vga display in a PPM image even if no display is
2450 static void vga_screen_dump(void *opaque
, const char *filename
)
2452 VGACommonState
*s
= opaque
;
2454 if (!screen_dump_dcl
)
2455 screen_dump_dcl
= vga_screen_dump_init(s
->ds
);
2457 screen_dump_filename
= (char *)filename
;
2458 vga_invalidate_display(s
);