target-ppc/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "kvm.h"
   4 #include "qemu-kvm.h"
   5
   6 void cpu_save(QEMUFile *f, void *opaque)
   7 {
   8     CPUState *env = (CPUState *)opaque;
   9     unsigned int i, j;
  10
  11     cpu_synchronize_state(env);
  12
  13     for (i = 0; i < 32; i++)
  14         qemu_put_betls(f, &env->gpr[i]);
  15 #if !defined(TARGET_PPC64)
  16     for (i = 0; i < 32; i++)
  17         qemu_put_betls(f, &env->gprh[i]);
  18 #endif
  19     qemu_put_betls(f, &env->lr);
  20     qemu_put_betls(f, &env->ctr);
  21     for (i = 0; i < 8; i++)
  22         qemu_put_be32s(f, &env->crf[i]);
  23     qemu_put_betls(f, &env->xer);
  24     qemu_put_betls(f, &env->reserve_addr);
  25     qemu_put_betls(f, &env->msr);
  26     for (i = 0; i < 4; i++)
  27         qemu_put_betls(f, &env->tgpr[i]);
  28     for (i = 0; i < 32; i++) {
  29         union {
  30             float64 d;
  31             uint64_t l;
  32         } u;
  33         u.d = env->fpr[i];
  34         qemu_put_be64(f, u.l);
  35     }
  36     qemu_put_be32s(f, &env->fpscr);
  37     qemu_put_sbe32s(f, &env->access_type);
  38 #if !defined(CONFIG_USER_ONLY)
  39 #if defined(TARGET_PPC64)
  40     qemu_put_betls(f, &env->asr);
  41     qemu_put_sbe32s(f, &env->slb_nr);
  42 #endif
  43     qemu_put_betls(f, &env->sdr1);
  44     for (i = 0; i < 32; i++)
  45         qemu_put_betls(f, &env->sr[i]);
  46     for (i = 0; i < 2; i++)
  47         for (j = 0; j < 8; j++)
  48             qemu_put_betls(f, &env->DBAT[i][j]);
  49     for (i = 0; i < 2; i++)
  50         for (j = 0; j < 8; j++)
  51             qemu_put_betls(f, &env->IBAT[i][j]);
  52     qemu_put_sbe32s(f, &env->nb_tlb);
  53     qemu_put_sbe32s(f, &env->tlb_per_way);
  54     qemu_put_sbe32s(f, &env->nb_ways);
  55     qemu_put_sbe32s(f, &env->last_way);
  56     qemu_put_sbe32s(f, &env->id_tlbs);
  57     qemu_put_sbe32s(f, &env->nb_pids);
  58     if (env->tlb) {
  59         // XXX assumes 6xx
  60         for (i = 0; i < env->nb_tlb; i++) {
  61             qemu_put_betls(f, &env->tlb[i].tlb6.pte0);
  62             qemu_put_betls(f, &env->tlb[i].tlb6.pte1);
  63             qemu_put_betls(f, &env->tlb[i].tlb6.EPN);
  64         }
  65     }
  66     for (i = 0; i < 4; i++)
  67         qemu_put_betls(f, &env->pb[i]);
  68 #endif
  69     for (i = 0; i < 1024; i++)
  70         qemu_put_betls(f, &env->spr[i]);
  71     qemu_put_be32s(f, &env->vscr);
  72     qemu_put_be64s(f, &env->spe_acc);
  73     qemu_put_be32s(f, &env->spe_fscr);
  74     qemu_put_betls(f, &env->msr_mask);
  75     qemu_put_be32s(f, &env->flags);
  76     qemu_put_sbe32s(f, &env->error_code);
  77     qemu_put_be32s(f, &env->pending_interrupts);
  78 #if !defined(CONFIG_USER_ONLY)
  79     qemu_put_be32s(f, &env->irq_input_state);
  80     for (i = 0; i < POWERPC_EXCP_NB; i++)
  81         qemu_put_betls(f, &env->excp_vectors[i]);
  82     qemu_put_betls(f, &env->excp_prefix);
  83     qemu_put_betls(f, &env->hreset_excp_prefix);
  84     qemu_put_betls(f, &env->ivor_mask);
  85     qemu_put_betls(f, &env->ivpr_mask);
  86     qemu_put_betls(f, &env->hreset_vector);
  87 #endif
  88     qemu_put_betls(f, &env->nip);
  89     qemu_put_betls(f, &env->hflags);
  90     qemu_put_betls(f, &env->hflags_nmsr);
  91     qemu_put_sbe32s(f, &env->mmu_idx);
  92     qemu_put_sbe32s(f, &env->power_mode);
  93 }
  94
  95 int cpu_load(QEMUFile *f, void *opaque, int version_id)
  96 {
  97     CPUState *env = (CPUState *)opaque;
  98     unsigned int i, j;
  99
 100     cpu_synchronize_state(env);
 101
 102     for (i = 0; i < 32; i++)
 103         qemu_get_betls(f, &env->gpr[i]);
 104 #if !defined(TARGET_PPC64)
 105     for (i = 0; i < 32; i++)
 106         qemu_get_betls(f, &env->gprh[i]);
 107 #endif
 108     qemu_get_betls(f, &env->lr);
 109     qemu_get_betls(f, &env->ctr);
 110     for (i = 0; i < 8; i++)
 111         qemu_get_be32s(f, &env->crf[i]);
 112     qemu_get_betls(f, &env->xer);
 113     qemu_get_betls(f, &env->reserve_addr);
 114     qemu_get_betls(f, &env->msr);
 115     for (i = 0; i < 4; i++)
 116         qemu_get_betls(f, &env->tgpr[i]);
 117     for (i = 0; i < 32; i++) {
 118         union {
 119             float64 d;
 120             uint64_t l;
 121         } u;
 122         u.l = qemu_get_be64(f);
 123         env->fpr[i] = u.d;
 124     }
 125     qemu_get_be32s(f, &env->fpscr);
 126     qemu_get_sbe32s(f, &env->access_type);
 127 #if !defined(CONFIG_USER_ONLY)
 128 #if defined(TARGET_PPC64)
 129     qemu_get_betls(f, &env->asr);
 130     qemu_get_sbe32s(f, &env->slb_nr);
 131 #endif
 132     qemu_get_betls(f, &env->sdr1);
 133     for (i = 0; i < 32; i++)
 134         qemu_get_betls(f, &env->sr[i]);
 135     for (i = 0; i < 2; i++)
 136         for (j = 0; j < 8; j++)
 137             qemu_get_betls(f, &env->DBAT[i][j]);
 138     for (i = 0; i < 2; i++)
 139         for (j = 0; j < 8; j++)
 140             qemu_get_betls(f, &env->IBAT[i][j]);
 141     qemu_get_sbe32s(f, &env->nb_tlb);
 142     qemu_get_sbe32s(f, &env->tlb_per_way);
 143     qemu_get_sbe32s(f, &env->nb_ways);
 144     qemu_get_sbe32s(f, &env->last_way);
 145     qemu_get_sbe32s(f, &env->id_tlbs);
 146     qemu_get_sbe32s(f, &env->nb_pids);
 147     if (env->tlb) {
 148         // XXX assumes 6xx
 149         for (i = 0; i < env->nb_tlb; i++) {
 150             qemu_get_betls(f, &env->tlb[i].tlb6.pte0);
 151             qemu_get_betls(f, &env->tlb[i].tlb6.pte1);
 152             qemu_get_betls(f, &env->tlb[i].tlb6.EPN);
 153         }
 154     }
 155     for (i = 0; i < 4; i++)
 156         qemu_get_betls(f, &env->pb[i]);
 157 #endif
 158     for (i = 0; i < 1024; i++)
 159         qemu_get_betls(f, &env->spr[i]);
 160     qemu_get_be32s(f, &env->vscr);
 161     qemu_get_be64s(f, &env->spe_acc);
 162     qemu_get_be32s(f, &env->spe_fscr);
 163     qemu_get_betls(f, &env->msr_mask);
 164     qemu_get_be32s(f, &env->flags);
 165     qemu_get_sbe32s(f, &env->error_code);
 166     qemu_get_be32s(f, &env->pending_interrupts);
 167 #if !defined(CONFIG_USER_ONLY)
 168     qemu_get_be32s(f, &env->irq_input_state);
 169     for (i = 0; i < POWERPC_EXCP_NB; i++)
 170         qemu_get_betls(f, &env->excp_vectors[i]);
 171     qemu_get_betls(f, &env->excp_prefix);
 172     qemu_get_betls(f, &env->hreset_excp_prefix);
 173     qemu_get_betls(f, &env->ivor_mask);
 174     qemu_get_betls(f, &env->ivpr_mask);
 175     qemu_get_betls(f, &env->hreset_vector);
 176 #endif
 177     qemu_get_betls(f, &env->nip);
 178     qemu_get_betls(f, &env->hflags);
 179     qemu_get_betls(f, &env->hflags_nmsr);
 180     qemu_get_sbe32s(f, &env->mmu_idx);
 181     qemu_get_sbe32s(f, &env->power_mode);
 182
 183     return 0;
 184 }