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target-mips: add BadInstr and BadInstrP support
2014-11-03
Leo
n
Alr
a
e
target-mips: add BadInstr
a
nd BadInstrP support
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leo
n
Alrae
targ
e
t-m
i
ps:
add TLBINV support
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leo
n
Alra
e
target-mips: add new Rea
d
-Inhibi
t
a
nd Execute-Inhibit
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
L
eon Alrae
tar
g
et-
m
ips: up
d
at
e
PageGrain
a
n
d m{t,f}c0 Entry
L
o
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leon Alrae
targe
t
-mips: add RI and
XI f
i
elds t
o
T
LB entry
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leon
A
lr
a
e
t
a
rg
e
t-mip
s
: dist
i
nguish
b
e
tween data load and ins
t
ruction
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leon Alra
e
softmmu
:
p
ro
v
id
e
s
oftmmu
a
ccess type e
n
um
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-11-03
Leon
Alrae
t
arget-m
i
ps
:
add KScr
a
tch
r
egisters
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-24
Leon
Alrae
MAINT
A
INERS:
a
dd myself as
MIPS
g
uest
c
ores co-mai
n
tainer
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
...1413459487-13658-1-git-send-email-
leon.alrae@imgtec.com
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|
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2014-10-24
Leon Alrae
ta
r
get-mi
p
s: add
UL
L
suffix in bitswap to avoid compi
l
er
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
...1413982829-27225-1-git-send-email-
leon.alrae@imgtec.com
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|
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2014-10-14
Leo
n
Alrae
target-mips: d
e
fine a new gen
e
ric
CPU supporting MIPS64
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-14
L
e
o
n Alrae
mips_malt
a
: upd
a
te
m
alta's pseudo-bootloa
d
er
-
rep
l
ace
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-14
L
eo
n
Alrae
target-mips: do not allow Sta
t
us
.
FR=0 mode in 64-
b
it FPU
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-14
Leon Alrae
target-mips:
a
dd new Floating Point instr
u
ctions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-14
Leon
Alr
a
e
softfloat:
a
dd fu
n
ctio
n
s corres
p
ondin
g
to IEEE
-
2008
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-14
L
e
o
n Alrae
t
arget-mips: add A
U
I
, LSA and PCREL in
s
t
r
uc
t
ion families
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
targ
e
t-mips: Status
.
UX/SX/KX enable 32-bit addr
e
ss
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
tar
g
et-mips: move CLO, DC
L
O
, CLZ, DCLZ, SDBBP and free
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Le
o
n
Alrae
ta
r
ge
t
-mips: redefine Integer Multiply an
d
Divide instructions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon
A
lrae
t
a
rget-mips
:
move PREF, CACHE
,
L
L
D
and S
C
D instructions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon A
l
rae
target-mip
s
: signal RI Excep
t
i
on on DSP and Loongs
o
n
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
target-mips: split
deco
d
e_opc_sp
e
cial* into
*
_
r
6
and
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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|
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2014-10-13
Leon Alrae
target-mips: ext
r
a
c
t decode_opc_
s
pecial*
from deco
d
e_opc
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
ta
r
ge
t
-mips: mov
e
L
L
and SC instructions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Al
r
a
e
targe
t
-m
i
ps: add SELEQ
Z
and SELNE
Z
instructions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
target-mi
p
s: signal RI Exception on instructions
r
e
mo
v
e
d
.
.
.
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2014-10-13
Leon Alrae
targ
e
t-mips: de
f
ine IS
A
_MIPS64R6
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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2013-08-06
L
e
on Alrae
target-mips: fix
decod
i
ng of micro
M
IPS POOL
3
2Axf instructions
Signed-off-by: Leon Alrae <
leon.alrae@imgtec.com
>
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