hw/xtensa/xtfpga.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "sysemu/sysemu.h"
  29 #include "hw/boards.h"
  30 #include "hw/loader.h"
  31 #include "elf.h"
  32 #include "exec/memory.h"
  33 #include "exec/address-spaces.h"
  34 #include "hw/char/serial.h"
  35 #include "net/net.h"
  36 #include "hw/sysbus.h"
  37 #include "hw/block/flash.h"
  38 #include "sysemu/block-backend.h"
  39 #include "sysemu/blockdev.h"
  40 #include "sysemu/char.h"
  41 #include "sysemu/device_tree.h"
  42 #include "qemu/error-report.h"
  43 #include "bootparam.h"
  44
  45 typedef struct LxBoardDesc {
  46     hwaddr flash_base;
  47     size_t flash_size;
  48     size_t flash_boot_base;
  49     size_t flash_sector_size;
  50     size_t sram_size;
  51 } LxBoardDesc;
  52
  53 typedef struct Lx60FpgaState {
  54     MemoryRegion iomem;
  55     uint32_t leds;
  56     uint32_t switches;
  57 } Lx60FpgaState;
  58
  59 static void lx60_fpga_reset(void *opaque)
  60 {
  61     Lx60FpgaState *s = opaque;
  62
  63     s->leds = 0;
  64     s->switches = 0;
  65 }
  66
  67 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
  68         unsigned size)
  69 {
  70     Lx60FpgaState *s = opaque;
  71
  72     switch (addr) {
  73     case 0x0: /*build date code*/
  74         return 0x09272011;
  75
  76     case 0x4: /*processor clock frequency, Hz*/
  77         return 10000000;
  78
  79     case 0x8: /*LEDs (off = 0, on = 1)*/
  80         return s->leds;
  81
  82     case 0xc: /*DIP switches (off = 0, on = 1)*/
  83         return s->switches;
  84     }
  85     return 0;
  86 }
  87
  88 static void lx60_fpga_write(void *opaque, hwaddr addr,
  89         uint64_t val, unsigned size)
  90 {
  91     Lx60FpgaState *s = opaque;
  92
  93     switch (addr) {
  94     case 0x8: /*LEDs (off = 0, on = 1)*/
  95         s->leds = val;
  96         break;
  97
  98     case 0x10: /*board reset*/
  99         if (val == 0xdead) {
 100             qemu_system_reset_request();
 101         }
 102         break;
 103     }
 104 }
 105
 106 static const MemoryRegionOps lx60_fpga_ops = {
 107     .read = lx60_fpga_read,
 108     .write = lx60_fpga_write,
 109     .endianness = DEVICE_NATIVE_ENDIAN,
 110 };
 111
 112 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
 113         hwaddr base)
 114 {
 115     Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
 116
 117     memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
 118             "lx60.fpga", 0x10000);
 119     memory_region_add_subregion(address_space, base, &s->iomem);
 120     lx60_fpga_reset(s);
 121     qemu_register_reset(lx60_fpga_reset, s);
 122     return s;
 123 }
 124
 125 static void lx60_net_init(MemoryRegion *address_space,
 126         hwaddr base,
 127         hwaddr descriptors,
 128         hwaddr buffers,
 129         qemu_irq irq, NICInfo *nd)
 130 {
 131     DeviceState *dev;
 132     SysBusDevice *s;
 133     MemoryRegion *ram;
 134
 135     dev = qdev_create(NULL, "open_eth");
 136     qdev_set_nic_properties(dev, nd);
 137     qdev_init_nofail(dev);
 138
 139     s = SYS_BUS_DEVICE(dev);
 140     sysbus_connect_irq(s, 0, irq);
 141     memory_region_add_subregion(address_space, base,
 142             sysbus_mmio_get_region(s, 0));
 143     memory_region_add_subregion(address_space, descriptors,
 144             sysbus_mmio_get_region(s, 1));
 145
 146     ram = g_malloc(sizeof(*ram));
 147     memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, &error_abort);
 148     vmstate_register_ram_global(ram);
 149     memory_region_add_subregion(address_space, buffers, ram);
 150 }
 151
 152 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
 153 {
 154     XtensaCPU *cpu = opaque;
 155
 156     return cpu_get_phys_page_debug(CPU(cpu), addr);
 157 }
 158
 159 static void lx60_reset(void *opaque)
 160 {
 161     XtensaCPU *cpu = opaque;
 162
 163     cpu_reset(CPU(cpu));
 164 }
 165
 166 static void lx_init(const LxBoardDesc *board, MachineState *machine)
 167 {
 168 #ifdef TARGET_WORDS_BIGENDIAN
 169     int be = 1;
 170 #else
 171     int be = 0;
 172 #endif
 173     MemoryRegion *system_memory = get_system_memory();
 174     XtensaCPU *cpu = NULL;
 175     CPUXtensaState *env = NULL;
 176     MemoryRegion *ram, *rom, *system_io;
 177     DriveInfo *dinfo;
 178     pflash_t *flash = NULL;
 179     QemuOpts *machine_opts = qemu_get_machine_opts();
 180     const char *cpu_model = machine->cpu_model;
 181     const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
 182     const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
 183     const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
 184     const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
 185     int n;
 186
 187     if (!cpu_model) {
 188         cpu_model = XTENSA_DEFAULT_CPU_MODEL;
 189     }
 190
 191     for (n = 0; n < smp_cpus; n++) {
 192         cpu = cpu_xtensa_init(cpu_model);
 193         if (cpu == NULL) {
 194             error_report("unable to find CPU definition '%s'\n",
 195                          cpu_model);
 196             exit(EXIT_FAILURE);
 197         }
 198         env = &cpu->env;
 199
 200         env->sregs[PRID] = n;
 201         qemu_register_reset(lx60_reset, cpu);
 202         /* Need MMU initialized prior to ELF loading,
 203          * so that ELF gets loaded into virtual addresses
 204          */
 205         cpu_reset(CPU(cpu));
 206     }
 207
 208     ram = g_malloc(sizeof(*ram));
 209     memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,
 210                            &error_abort);
 211     vmstate_register_ram_global(ram);
 212     memory_region_add_subregion(system_memory, 0, ram);
 213
 214     system_io = g_malloc(sizeof(*system_io));
 215     memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024);
 216     memory_region_add_subregion(system_memory, 0xf0000000, system_io);
 217     lx60_fpga_init(system_io, 0x0d020000);
 218     if (nd_table[0].used) {
 219         lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
 220                 xtensa_get_extint(env, 1), nd_table);
 221     }
 222
 223     if (!serial_hds[0]) {
 224         serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
 225     }
 226
 227     serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
 228             115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
 229
 230     dinfo = drive_get(IF_PFLASH, 0, 0);
 231     if (dinfo) {
 232         flash = pflash_cfi01_register(board->flash_base,
 233                 NULL, "lx60.io.flash", board->flash_size,
 234                 blk_bs(blk_by_legacy_dinfo(dinfo)),
 235                 board->flash_sector_size,
 236                 board->flash_size / board->flash_sector_size,
 237                 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
 238         if (flash == NULL) {
 239             error_report("unable to mount pflash\n");
 240             exit(EXIT_FAILURE);
 241         }
 242     }
 243
 244     /* Use presence of kernel file name as 'boot from SRAM' switch. */
 245     if (kernel_filename) {
 246         uint32_t entry_point = env->pc;
 247         size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */
 248         uint32_t tagptr = 0xfe000000 + board->sram_size;
 249         uint32_t cur_tagptr;
 250         BpMemInfo memory_location = {
 251             .type = tswap32(MEMORY_TYPE_CONVENTIONAL),
 252             .start = tswap32(0),
 253             .end = tswap32(machine->ram_size),
 254         };
 255         uint32_t lowmem_end = machine->ram_size < 0x08000000 ?
 256             machine->ram_size : 0x08000000;
 257         uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
 258
 259         rom = g_malloc(sizeof(*rom));
 260         memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,
 261                                &error_abort);
 262         vmstate_register_ram_global(rom);
 263         memory_region_add_subregion(system_memory, 0xfe000000, rom);
 264
 265         if (kernel_cmdline) {
 266             bp_size += get_tag_size(strlen(kernel_cmdline) + 1);
 267         }
 268         if (dtb_filename) {
 269             bp_size += get_tag_size(sizeof(uint32_t));
 270         }
 271         if (initrd_filename) {
 272             bp_size += get_tag_size(sizeof(BpMemInfo));
 273         }
 274
 275         /* Put kernel bootparameters to the end of that SRAM */
 276         tagptr = (tagptr - bp_size) & ~0xff;
 277         cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);
 278         cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,
 279                              sizeof(memory_location), &memory_location);
 280
 281         if (kernel_cmdline) {
 282             cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
 283                                  strlen(kernel_cmdline) + 1, kernel_cmdline);
 284         }
 285         if (dtb_filename) {
 286             int fdt_size;
 287             void *fdt = load_device_tree(dtb_filename, &fdt_size);
 288             uint32_t dtb_addr = tswap32(cur_lowmem);
 289
 290             if (!fdt) {
 291                 error_report("could not load DTB '%s'\n", dtb_filename);
 292                 exit(EXIT_FAILURE);
 293             }
 294
 295             cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
 296             cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
 297                                  sizeof(dtb_addr), &dtb_addr);
 298             cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);
 299         }
 300         if (initrd_filename) {
 301             BpMemInfo initrd_location = { 0 };
 302             int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,
 303                                            lowmem_end - cur_lowmem);
 304
 305             if (initrd_size < 0) {
 306                 initrd_size = load_image_targphys(initrd_filename,
 307                                                   cur_lowmem,
 308                                                   lowmem_end - cur_lowmem);
 309             }
 310             if (initrd_size < 0) {
 311                 error_report("could not load initrd '%s'\n", initrd_filename);
 312                 exit(EXIT_FAILURE);
 313             }
 314             initrd_location.start = tswap32(cur_lowmem);
 315             initrd_location.end = tswap32(cur_lowmem + initrd_size);
 316             cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
 317                                  sizeof(initrd_location), &initrd_location);
 318             cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);
 319         }
 320         cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
 321         env->regs[2] = tagptr;
 322
 323         uint64_t elf_entry;
 324         uint64_t elf_lowaddr;
 325         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
 326                 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
 327         if (success > 0) {
 328             entry_point = elf_entry;
 329         } else {
 330             hwaddr ep;
 331             int is_linux;
 332             success = load_uimage(kernel_filename, &ep, NULL, &is_linux);
 333             if (success > 0 && is_linux) {
 334                 entry_point = ep;
 335             } else {
 336                 error_report("could not load kernel '%s'\n",
 337                              kernel_filename);
 338                 exit(EXIT_FAILURE);
 339             }
 340         }
 341         if (entry_point != env->pc) {
 342             static const uint8_t jx_a0[] = {
 343 #ifdef TARGET_WORDS_BIGENDIAN
 344                 0x0a, 0, 0,
 345 #else
 346                 0xa0, 0, 0,
 347 #endif
 348             };
 349             env->regs[0] = entry_point;
 350             cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0));
 351         }
 352     } else {
 353         if (flash) {
 354             MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
 355             MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
 356
 357             memory_region_init_alias(flash_io, NULL, "lx60.flash",
 358                     flash_mr, board->flash_boot_base,
 359                     board->flash_size - board->flash_boot_base < 0x02000000 ?
 360                     board->flash_size - board->flash_boot_base : 0x02000000);
 361             memory_region_add_subregion(system_memory, 0xfe000000,
 362                     flash_io);
 363         }
 364     }
 365 }
 366
 367 static void xtensa_lx60_init(MachineState *machine)
 368 {
 369     static const LxBoardDesc lx60_board = {
 370         .flash_base = 0xf8000000,
 371         .flash_size = 0x00400000,
 372         .flash_sector_size = 0x10000,
 373         .sram_size = 0x20000,
 374     };
 375     lx_init(&lx60_board, machine);
 376 }
 377
 378 static void xtensa_lx200_init(MachineState *machine)
 379 {
 380     static const LxBoardDesc lx200_board = {
 381         .flash_base = 0xf8000000,
 382         .flash_size = 0x01000000,
 383         .flash_sector_size = 0x20000,
 384         .sram_size = 0x2000000,
 385     };
 386     lx_init(&lx200_board, machine);
 387 }
 388
 389 static void xtensa_ml605_init(MachineState *machine)
 390 {
 391     static const LxBoardDesc ml605_board = {
 392         .flash_base = 0xf8000000,
 393         .flash_size = 0x02000000,
 394         .flash_sector_size = 0x20000,
 395         .sram_size = 0x2000000,
 396     };
 397     lx_init(&ml605_board, machine);
 398 }
 399
 400 static void xtensa_kc705_init(MachineState *machine)
 401 {
 402     static const LxBoardDesc kc705_board = {
 403         .flash_base = 0xf0000000,
 404         .flash_size = 0x08000000,
 405         .flash_boot_base = 0x06000000,
 406         .flash_sector_size = 0x20000,
 407         .sram_size = 0x2000000,
 408     };
 409     lx_init(&kc705_board, machine);
 410 }
 411
 412 static QEMUMachine xtensa_lx60_machine = {
 413     .name = "lx60",
 414     .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 415     .init = xtensa_lx60_init,
 416     .max_cpus = 4,
 417 };
 418
 419 static QEMUMachine xtensa_lx200_machine = {
 420     .name = "lx200",
 421     .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 422     .init = xtensa_lx200_init,
 423     .max_cpus = 4,
 424 };
 425
 426 static QEMUMachine xtensa_ml605_machine = {
 427     .name = "ml605",
 428     .desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 429     .init = xtensa_ml605_init,
 430     .max_cpus = 4,
 431 };
 432
 433 static QEMUMachine xtensa_kc705_machine = {
 434     .name = "kc705",
 435     .desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
 436     .init = xtensa_kc705_init,
 437     .max_cpus = 4,
 438 };
 439
 440 static void xtensa_lx_machines_init(void)
 441 {
 442     qemu_register_machine(&xtensa_lx60_machine);
 443     qemu_register_machine(&xtensa_lx200_machine);
 444     qemu_register_machine(&xtensa_ml605_machine);
 445     qemu_register_machine(&xtensa_kc705_machine);
 446 }
 447
 448 machine_init(xtensa_lx_machines_init);