hw/mips/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw/hw.h"
  11 #include "hw/mips/mips.h"
  12 #include "hw/mips/cpudevs.h"
  13 #include "hw/i386/pc.h"
  14 #include "hw/char/serial.h"
  15 #include "hw/isa/isa.h"
  16 #include "net/net.h"
  17 #include "sysemu/sysemu.h"
  18 #include "hw/boards.h"
  19 #include "hw/block/flash.h"
  20 #include "qemu/log.h"
  21 #include "hw/mips/bios.h"
  22 #include "hw/ide.h"
  23 #include "hw/loader.h"
  24 #include "elf.h"
  25 #include "hw/timer/mc146818rtc.h"
  26 #include "hw/timer/i8254.h"
  27 #include "sysemu/block-backend.h"
  28 #include "sysemu/blockdev.h"
  29 #include "exec/address-spaces.h"
  30 #include "sysemu/qtest.h"
  31
  32 #define MAX_IDE_BUS 2
  33
  34 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  35 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  36 static const int ide_irq[2] = { 14, 15 };
  37
  38 static ISADevice *pit; /* PIT i8254 */
  39
  40 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  41
  42 static struct _loaderparams {
  43     int ram_size;
  44     const char *kernel_filename;
  45     const char *kernel_cmdline;
  46     const char *initrd_filename;
  47 } loaderparams;
  48
  49 static void mips_qemu_write (void *opaque, hwaddr addr,
  50                              uint64_t val, unsigned size)
  51 {
  52     if ((addr & 0xffff) == 0 && val == 42)
  53         qemu_system_reset_request ();
  54     else if ((addr & 0xffff) == 4 && val == 42)
  55         qemu_system_shutdown_request ();
  56 }
  57
  58 static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
  59                                 unsigned size)
  60 {
  61     return 0;
  62 }
  63
  64 static const MemoryRegionOps mips_qemu_ops = {
  65     .read = mips_qemu_read,
  66     .write = mips_qemu_write,
  67     .endianness = DEVICE_NATIVE_ENDIAN,
  68 };
  69
  70 typedef struct ResetData {
  71     MIPSCPU *cpu;
  72     uint64_t vector;
  73 } ResetData;
  74
  75 static int64_t load_kernel(void)
  76 {
  77     int64_t entry, kernel_high;
  78     long kernel_size, initrd_size, params_size;
  79     ram_addr_t initrd_offset;
  80     uint32_t *params_buf;
  81     int big_endian;
  82
  83 #ifdef TARGET_WORDS_BIGENDIAN
  84     big_endian = 1;
  85 #else
  86     big_endian = 0;
  87 #endif
  88     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  89                            NULL, (uint64_t *)&entry, NULL,
  90                            (uint64_t *)&kernel_high, big_endian,
  91                            ELF_MACHINE, 1);
  92     if (kernel_size >= 0) {
  93         if ((entry & ~0x7fffffffULL) == 0x80000000)
  94             entry = (int32_t)entry;
  95     } else {
  96         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  97                 loaderparams.kernel_filename);
  98         exit(1);
  99     }
 100
 101     /* load initrd */
 102     initrd_size = 0;
 103     initrd_offset = 0;
 104     if (loaderparams.initrd_filename) {
 105         initrd_size = get_image_size (loaderparams.initrd_filename);
 106         if (initrd_size > 0) {
 107             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 108             if (initrd_offset + initrd_size > ram_size) {
 109                 fprintf(stderr,
 110                         "qemu: memory too small for initial ram disk '%s'\n",
 111                         loaderparams.initrd_filename);
 112                 exit(1);
 113             }
 114             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 115                                               initrd_offset,
 116                                               ram_size - initrd_offset);
 117         }
 118         if (initrd_size == (target_ulong) -1) {
 119             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 120                     loaderparams.initrd_filename);
 121             exit(1);
 122         }
 123     }
 124
 125     /* Store command line.  */
 126     params_size = 264;
 127     params_buf = g_malloc(params_size);
 128
 129     params_buf[0] = tswap32(ram_size);
 130     params_buf[1] = tswap32(0x12345678);
 131
 132     if (initrd_size > 0) {
 133         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 134                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 135                  initrd_size, loaderparams.kernel_cmdline);
 136     } else {
 137         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 138     }
 139
 140     rom_add_blob_fixed("params", params_buf, params_size,
 141                        (16 << 20) - 264);
 142
 143     return entry;
 144 }
 145
 146 static void main_cpu_reset(void *opaque)
 147 {
 148     ResetData *s = (ResetData *)opaque;
 149     CPUMIPSState *env = &s->cpu->env;
 150
 151     cpu_reset(CPU(s->cpu));
 152     env->active_tc.PC = s->vector;
 153 }
 154
 155 static const int sector_len = 32 * 1024;
 156 static
 157 void mips_r4k_init(MachineState *machine)
 158 {
 159     ram_addr_t ram_size = machine->ram_size;
 160     const char *cpu_model = machine->cpu_model;
 161     const char *kernel_filename = machine->kernel_filename;
 162     const char *kernel_cmdline = machine->kernel_cmdline;
 163     const char *initrd_filename = machine->initrd_filename;
 164     char *filename;
 165     MemoryRegion *address_space_mem = get_system_memory();
 166     MemoryRegion *ram = g_new(MemoryRegion, 1);
 167     MemoryRegion *bios;
 168     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 169     MemoryRegion *isa = g_new(MemoryRegion, 1);
 170     int bios_size;
 171     MIPSCPU *cpu;
 172     CPUMIPSState *env;
 173     ResetData *reset_info;
 174     int i;
 175     qemu_irq *i8259;
 176     ISABus *isa_bus;
 177     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 178     DriveInfo *dinfo;
 179     int be;
 180
 181     /* init CPUs */
 182     if (cpu_model == NULL) {
 183 #ifdef TARGET_MIPS64
 184         cpu_model = "R4000";
 185 #else
 186         cpu_model = "24Kf";
 187 #endif
 188     }
 189     cpu = cpu_mips_init(cpu_model);
 190     if (cpu == NULL) {
 191         fprintf(stderr, "Unable to find CPU definition\n");
 192         exit(1);
 193     }
 194     env = &cpu->env;
 195
 196     reset_info = g_malloc0(sizeof(ResetData));
 197     reset_info->cpu = cpu;
 198     reset_info->vector = env->active_tc.PC;
 199     qemu_register_reset(main_cpu_reset, reset_info);
 200
 201     /* allocate RAM */
 202     if (ram_size > (256 << 20)) {
 203         fprintf(stderr,
 204                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 205                 ((unsigned int)ram_size / (1 << 20)));
 206         exit(1);
 207     }
 208     memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size, &error_abort);
 209     vmstate_register_ram_global(ram);
 210
 211     memory_region_add_subregion(address_space_mem, 0, ram);
 212
 213     memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 214     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 215
 216     /* Try to load a BIOS image. If this fails, we continue regardless,
 217        but initialize the hardware ourselves. When a kernel gets
 218        preloaded we also initialize the hardware, since the BIOS wasn't
 219        run. */
 220     if (bios_name == NULL)
 221         bios_name = BIOS_FILENAME;
 222     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 223     if (filename) {
 224         bios_size = get_image_size(filename);
 225     } else {
 226         bios_size = -1;
 227     }
 228 #ifdef TARGET_WORDS_BIGENDIAN
 229     be = 1;
 230 #else
 231     be = 0;
 232 #endif
 233     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 234         bios = g_new(MemoryRegion, 1);
 235         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 236                                &error_abort);
 237         vmstate_register_ram_global(bios);
 238         memory_region_set_readonly(bios, true);
 239         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 240
 241         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 242     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 243         uint32_t mips_rom = 0x00400000;
 244         if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 245                                    blk_bs(blk_by_legacy_dinfo(dinfo)),
 246                                    sector_len, mips_rom / sector_len,
 247                                    4, 0, 0, 0, 0, be)) {
 248             fprintf(stderr, "qemu: Error registering flash memory.\n");
 249         }
 250     } else if (!qtest_enabled()) {
 251         /* not fatal */
 252         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 253                 bios_name);
 254     }
 255     if (filename) {
 256         g_free(filename);
 257     }
 258
 259     if (kernel_filename) {
 260         loaderparams.ram_size = ram_size;
 261         loaderparams.kernel_filename = kernel_filename;
 262         loaderparams.kernel_cmdline = kernel_cmdline;
 263         loaderparams.initrd_filename = initrd_filename;
 264         reset_info->vector = load_kernel();
 265     }
 266
 267     /* Init CPU internal devices */
 268     cpu_mips_irq_init_cpu(env);
 269     cpu_mips_clock_init(env);
 270
 271     /* The PIC is attached to the MIPS CPU INT0 pin */
 272     isa_bus = isa_bus_new(NULL, get_system_io());
 273     i8259 = i8259_init(isa_bus, env->irq[2]);
 274     isa_bus_irqs(isa_bus, i8259);
 275
 276     rtc_init(isa_bus, 2000, NULL);
 277
 278     /* Register 64 KB of ISA IO space at 0x14000000 */
 279     memory_region_init_alias(isa, NULL, "isa_mmio",
 280                              get_system_io(), 0, 0x00010000);
 281     memory_region_add_subregion(get_system_memory(), 0x14000000, isa);
 282
 283     isa_mem_base = 0x10000000;
 284
 285     pit = pit_init(isa_bus, 0x40, 0, NULL);
 286
 287     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 288         if (serial_hds[i]) {
 289             serial_isa_init(isa_bus, i, serial_hds[i]);
 290         }
 291     }
 292
 293     isa_vga_init(isa_bus);
 294
 295     if (nd_table[0].used)
 296         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 297
 298     ide_drive_get(hd, ARRAY_SIZE(hd));
 299     for(i = 0; i < MAX_IDE_BUS; i++)
 300         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 301                      hd[MAX_IDE_DEVS * i],
 302                      hd[MAX_IDE_DEVS * i + 1]);
 303
 304     isa_create_simple(isa_bus, "i8042");
 305 }
 306
 307 static QEMUMachine mips_machine = {
 308     .name = "mips",
 309     .desc = "mips r4k platform",
 310     .init = mips_r4k_init,
 311 };
 312
 313 static void mips_machine_init(void)
 314 {
 315     qemu_register_machine(&mips_machine);
 316 }
 317
 318 machine_init(mips_machine_init);