Implement TCE translation for sPAPR VIO
[qemu-kvm.git] / hw / spapr.c
blobf8749cc57dec2db318baec6b628431ab606c648d
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
27 #include "sysemu.h"
28 #include "hw.h"
29 #include "elf.h"
31 #include "hw/boards.h"
32 #include "hw/ppc.h"
33 #include "hw/loader.h"
35 #include "hw/spapr.h"
36 #include "hw/spapr_vio.h"
37 #include "hw/xics.h"
39 #include <libfdt.h>
41 #define KERNEL_LOAD_ADDR 0x00000000
42 #define INITRD_LOAD_ADDR 0x02800000
43 #define FDT_MAX_SIZE 0x10000
44 #define RTAS_MAX_SIZE 0x10000
46 #define TIMEBASE_FREQ 512000000ULL
48 #define MAX_CPUS 32
49 #define XICS_IRQS 1024
51 sPAPREnvironment *spapr;
53 static void *spapr_create_fdt(int *fdt_size, ram_addr_t ramsize,
54 const char *cpu_model, CPUState *envs[],
55 sPAPREnvironment *spapr,
56 target_phys_addr_t initrd_base,
57 target_phys_addr_t initrd_size,
58 const char *kernel_cmdline,
59 target_phys_addr_t rtas_addr,
60 target_phys_addr_t rtas_size,
61 long hash_shift)
63 void *fdt;
64 uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
65 uint32_t start_prop = cpu_to_be32(initrd_base);
66 uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
67 uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
68 char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
69 "\0hcall-tce";
70 uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
71 int i;
72 char *modelname;
73 int ret;
75 #define _FDT(exp) \
76 do { \
77 int ret = (exp); \
78 if (ret < 0) { \
79 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
80 #exp, fdt_strerror(ret)); \
81 exit(1); \
82 } \
83 } while (0)
85 fdt = qemu_mallocz(FDT_MAX_SIZE);
86 _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
88 _FDT((fdt_finish_reservemap(fdt)));
90 /* Root node */
91 _FDT((fdt_begin_node(fdt, "")));
92 _FDT((fdt_property_string(fdt, "device_type", "chrp")));
93 _FDT((fdt_property_string(fdt, "model", "qemu,emulated-pSeries-LPAR")));
95 _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
96 _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
98 /* /chosen */
99 _FDT((fdt_begin_node(fdt, "chosen")));
101 _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
102 _FDT((fdt_property(fdt, "linux,initrd-start",
103 &start_prop, sizeof(start_prop))));
104 _FDT((fdt_property(fdt, "linux,initrd-end",
105 &end_prop, sizeof(end_prop))));
107 _FDT((fdt_end_node(fdt)));
109 /* memory node */
110 _FDT((fdt_begin_node(fdt, "memory@0")));
112 _FDT((fdt_property_string(fdt, "device_type", "memory")));
113 _FDT((fdt_property(fdt, "reg",
114 mem_reg_property, sizeof(mem_reg_property))));
116 _FDT((fdt_end_node(fdt)));
118 /* cpus */
119 _FDT((fdt_begin_node(fdt, "cpus")));
121 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
122 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
124 modelname = qemu_strdup(cpu_model);
126 for (i = 0; i < strlen(modelname); i++) {
127 modelname[i] = toupper(modelname[i]);
130 for (i = 0; i < smp_cpus; i++) {
131 CPUState *env = envs[i];
132 uint32_t gserver_prop[] = {cpu_to_be32(i), 0}; /* HACK! */
133 char *nodename;
134 uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
135 0xffffffff, 0xffffffff};
137 if (asprintf(&nodename, "%s@%x", modelname, i) < 0) {
138 fprintf(stderr, "Allocation failure\n");
139 exit(1);
142 _FDT((fdt_begin_node(fdt, nodename)));
144 free(nodename);
146 _FDT((fdt_property_cell(fdt, "reg", i)));
147 _FDT((fdt_property_string(fdt, "device_type", "cpu")));
149 _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
150 _FDT((fdt_property_cell(fdt, "dcache-block-size",
151 env->dcache_line_size)));
152 _FDT((fdt_property_cell(fdt, "icache-block-size",
153 env->icache_line_size)));
154 _FDT((fdt_property_cell(fdt, "timebase-frequency", TIMEBASE_FREQ)));
155 /* Hardcode CPU frequency for now. It's kind of arbitrary on
156 * full emu, for kvm we should copy it from the host */
157 _FDT((fdt_property_cell(fdt, "clock-frequency", 1000000000)));
158 _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
159 _FDT((fdt_property(fdt, "ibm,pft-size",
160 pft_size_prop, sizeof(pft_size_prop))));
161 _FDT((fdt_property_string(fdt, "status", "okay")));
162 _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
163 _FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", i)));
164 _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
165 gserver_prop, sizeof(gserver_prop))));
167 if (envs[i]->mmu_model & POWERPC_MMU_1TSEG) {
168 _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
169 segs, sizeof(segs))));
172 _FDT((fdt_end_node(fdt)));
175 qemu_free(modelname);
177 _FDT((fdt_end_node(fdt)));
179 /* RTAS */
180 _FDT((fdt_begin_node(fdt, "rtas")));
182 _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
183 sizeof(hypertas_prop))));
185 _FDT((fdt_end_node(fdt)));
187 /* interrupt controller */
188 _FDT((fdt_begin_node(fdt, "interrupt-controller@0")));
190 _FDT((fdt_property_string(fdt, "device_type",
191 "PowerPC-External-Interrupt-Presentation")));
192 _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
193 _FDT((fdt_property_cell(fdt, "reg", 0)));
194 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
195 _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
196 interrupt_server_ranges_prop,
197 sizeof(interrupt_server_ranges_prop))));
199 _FDT((fdt_end_node(fdt)));
201 /* vdevice */
202 _FDT((fdt_begin_node(fdt, "vdevice")));
204 _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
205 _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
206 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
207 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
208 _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
209 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
211 _FDT((fdt_end_node(fdt)));
213 _FDT((fdt_end_node(fdt))); /* close root node */
214 _FDT((fdt_finish(fdt)));
216 /* re-expand to allow for further tweaks */
217 _FDT((fdt_open_into(fdt, fdt, FDT_MAX_SIZE)));
219 ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
220 if (ret < 0) {
221 fprintf(stderr, "couldn't setup vio devices in fdt\n");
222 exit(1);
225 /* RTAS */
226 ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
227 if (ret < 0) {
228 fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
231 _FDT((fdt_pack(fdt)));
233 *fdt_size = fdt_totalsize(fdt);
235 return fdt;
238 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
240 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
243 static void emulate_spapr_hypercall(CPUState *env)
245 env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
248 /* pSeries LPAR / sPAPR hardware init */
249 static void ppc_spapr_init(ram_addr_t ram_size,
250 const char *boot_device,
251 const char *kernel_filename,
252 const char *kernel_cmdline,
253 const char *initrd_filename,
254 const char *cpu_model)
256 CPUState *envs[MAX_CPUS];
257 void *fdt, *htab;
258 int i;
259 ram_addr_t ram_offset;
260 target_phys_addr_t fdt_addr, rtas_addr;
261 uint32_t kernel_base, initrd_base;
262 long kernel_size, initrd_size, htab_size, rtas_size;
263 long pteg_shift = 17;
264 int fdt_size;
265 char *filename;
266 int irq = 16;
268 spapr = qemu_malloc(sizeof(*spapr));
269 cpu_ppc_hypercall = emulate_spapr_hypercall;
271 /* We place the device tree just below either the top of RAM, or
272 * 2GB, so that it can be processed with 32-bit code if
273 * necessary */
274 fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
275 /* RTAS goes just below that */
276 rtas_addr = fdt_addr - RTAS_MAX_SIZE;
278 /* init CPUs */
279 if (cpu_model == NULL) {
280 cpu_model = "POWER7";
282 for (i = 0; i < smp_cpus; i++) {
283 CPUState *env = cpu_init(cpu_model);
285 if (!env) {
286 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
287 exit(1);
289 /* Set time-base frequency to 512 MHz */
290 cpu_ppc_tb_init(env, TIMEBASE_FREQ);
291 qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
293 env->hreset_vector = 0x60;
294 env->hreset_excp_prefix = 0;
295 env->gpr[3] = i;
297 envs[i] = env;
300 /* allocate RAM */
301 ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size);
302 cpu_register_physical_memory(0, ram_size, ram_offset);
304 /* allocate hash page table. For now we always make this 16mb,
305 * later we should probably make it scale to the size of guest
306 * RAM */
307 htab_size = 1ULL << (pteg_shift + 7);
308 htab = qemu_mallocz(htab_size);
310 for (i = 0; i < smp_cpus; i++) {
311 envs[i]->external_htab = htab;
312 envs[i]->htab_base = -1;
313 envs[i]->htab_mask = htab_size - 1;
316 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
317 rtas_size = load_image_targphys(filename, rtas_addr, ram_size - rtas_addr);
318 if (rtas_size < 0) {
319 hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
320 exit(1);
322 qemu_free(filename);
324 /* Set up Interrupt Controller */
325 spapr->icp = xics_system_init(smp_cpus, envs, XICS_IRQS);
327 /* Set up VIO bus */
328 spapr->vio_bus = spapr_vio_bus_init();
330 for (i = 0; i < MAX_SERIAL_PORTS; i++, irq++) {
331 if (serial_hds[i]) {
332 spapr_vty_create(spapr->vio_bus, i, serial_hds[i],
333 xics_find_qirq(spapr->icp, irq), irq);
337 if (kernel_filename) {
338 uint64_t lowaddr = 0;
340 kernel_base = KERNEL_LOAD_ADDR;
342 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
343 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
344 if (kernel_size < 0) {
345 kernel_size = load_image_targphys(kernel_filename, kernel_base,
346 ram_size - kernel_base);
348 if (kernel_size < 0) {
349 fprintf(stderr, "qemu: could not load kernel '%s'\n",
350 kernel_filename);
351 exit(1);
354 /* load initrd */
355 if (initrd_filename) {
356 initrd_base = INITRD_LOAD_ADDR;
357 initrd_size = load_image_targphys(initrd_filename, initrd_base,
358 ram_size - initrd_base);
359 if (initrd_size < 0) {
360 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
361 initrd_filename);
362 exit(1);
364 } else {
365 initrd_base = 0;
366 initrd_size = 0;
368 } else {
369 fprintf(stderr, "pSeries machine needs -kernel for now");
370 exit(1);
373 /* Prepare the device tree */
374 fdt = spapr_create_fdt(&fdt_size, ram_size, cpu_model, envs, spapr,
375 initrd_base, initrd_size, kernel_cmdline,
376 rtas_addr, rtas_size, pteg_shift + 7);
377 assert(fdt != NULL);
379 cpu_physical_memory_write(fdt_addr, fdt, fdt_size);
381 qemu_free(fdt);
383 envs[0]->gpr[3] = fdt_addr;
384 envs[0]->gpr[5] = 0;
385 envs[0]->hreset_vector = kernel_base;
388 static QEMUMachine spapr_machine = {
389 .name = "pseries",
390 .desc = "pSeries Logical Partition (PAPR compliant)",
391 .init = ppc_spapr_init,
392 .max_cpus = MAX_CPUS,
393 .no_vga = 1,
394 .no_parallel = 1,
397 static void spapr_machine_init(void)
399 qemu_register_machine(&spapr_machine);
402 machine_init(spapr_machine_init);