2 * PXA270-based Clamshell PDA platforms.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This code is licensed under the GNU GPL v2.
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
14 #include "hw/arm/pxa.h"
15 #include "hw/arm/arm.h"
16 #include "sysemu/sysemu.h"
17 #include "hw/pcmcia.h"
18 #include "hw/i2c/i2c.h"
20 #include "hw/block/flash.h"
21 #include "qemu/timer.h"
22 #include "hw/devices.h"
23 #include "hw/arm/sharpsl.h"
24 #include "ui/console.h"
25 #include "block/block.h"
26 #include "audio/audio.h"
27 #include "hw/boards.h"
28 #include "sysemu/blockdev.h"
29 #include "hw/sysbus.h"
30 #include "exec/address-spaces.h"
33 #define REG_FMT "0x%02lx"
36 #define FLASH_BASE 0x0c000000
37 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
38 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
39 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
40 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
41 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
42 #define FLASH_FLASHIO 0x14 /* Flash I/O */
43 #define FLASH_FLASHCTL 0x18 /* Flash Control */
45 #define FLASHCTL_CE0 (1 << 0)
46 #define FLASHCTL_CLE (1 << 1)
47 #define FLASHCTL_ALE (1 << 2)
48 #define FLASHCTL_WP (1 << 3)
49 #define FLASHCTL_CE1 (1 << 4)
50 #define FLASHCTL_RYBY (1 << 5)
51 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
53 #define TYPE_SL_NAND "sl-nand"
54 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
57 SysBusDevice parent_obj
;
67 static uint64_t sl_read(void *opaque
, hwaddr addr
, unsigned size
)
69 SLNANDState
*s
= (SLNANDState
*) opaque
;
73 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
75 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
76 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
78 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
80 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
81 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
87 return s
->ecc
.count
& 0xff;
90 nand_getpins(s
->nand
, &ryby
);
92 return s
->ctl
| FLASHCTL_RYBY
;
98 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) |
99 (ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) << 16);
101 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
));
104 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
109 static void sl_write(void *opaque
, hwaddr addr
,
110 uint64_t value
, unsigned size
)
112 SLNANDState
*s
= (SLNANDState
*) opaque
;
116 /* Value is ignored. */
121 s
->ctl
= value
& 0xff & ~FLASHCTL_RYBY
;
122 nand_setpins(s
->nand
,
123 s
->ctl
& FLASHCTL_CLE
,
124 s
->ctl
& FLASHCTL_ALE
,
125 s
->ctl
& FLASHCTL_NCE
,
126 s
->ctl
& FLASHCTL_WP
,
131 nand_setio(s
->nand
, ecc_digest(&s
->ecc
, value
& 0xff));
135 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
144 static const MemoryRegionOps sl_ops
= {
147 .endianness
= DEVICE_NATIVE_ENDIAN
,
150 static void sl_flash_register(PXA2xxState
*cpu
, int size
)
154 dev
= qdev_create(NULL
, TYPE_SL_NAND
);
156 qdev_prop_set_uint8(dev
, "manf_id", NAND_MFR_SAMSUNG
);
157 if (size
== FLASH_128M
)
158 qdev_prop_set_uint8(dev
, "chip_id", 0x73);
159 else if (size
== FLASH_1024M
)
160 qdev_prop_set_uint8(dev
, "chip_id", 0xf1);
162 qdev_init_nofail(dev
);
163 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, FLASH_BASE
);
166 static int sl_nand_init(SysBusDevice
*dev
)
168 SLNANDState
*s
= SL_NAND(dev
);
172 nand
= drive_get(IF_MTD
, 0, 0);
173 s
->nand
= nand_init(nand
? nand
->bdrv
: NULL
, s
->manf_id
, s
->chip_id
);
175 memory_region_init_io(&s
->iomem
, OBJECT(s
), &sl_ops
, s
, "sl", 0x40);
176 sysbus_init_mmio(dev
, &s
->iomem
);
183 #define SPITZ_KEY_STROBE_NUM 11
184 #define SPITZ_KEY_SENSE_NUM 7
186 static const int spitz_gpio_key_sense
[SPITZ_KEY_SENSE_NUM
] = {
187 12, 17, 91, 34, 36, 38, 39
190 static const int spitz_gpio_key_strobe
[SPITZ_KEY_STROBE_NUM
] = {
191 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
194 /* Eighth additional row maps the special keys */
195 static int spitz_keymap
[SPITZ_KEY_SENSE_NUM
+ 1][SPITZ_KEY_STROBE_NUM
] = {
196 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
197 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
198 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
199 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
200 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
201 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
202 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
203 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
206 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
207 #define SPITZ_GPIO_SYNC 16 /* Sync button */
208 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
209 #define SPITZ_GPIO_SWA 97 /* Lid */
210 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
212 /* The special buttons are mapped to unused keys */
213 static const int spitz_gpiomap
[5] = {
214 SPITZ_GPIO_AK_INT
, SPITZ_GPIO_SYNC
, SPITZ_GPIO_ON_KEY
,
215 SPITZ_GPIO_SWA
, SPITZ_GPIO_SWB
,
218 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
219 #define SPITZ_KEYBOARD(obj) \
220 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
223 SysBusDevice parent_obj
;
225 qemu_irq sense
[SPITZ_KEY_SENSE_NUM
];
228 uint16_t keyrow
[SPITZ_KEY_SENSE_NUM
];
229 uint16_t strobe_state
;
230 uint16_t sense_state
;
232 uint16_t pre_map
[0x100];
236 int fifopos
, fifolen
;
238 } SpitzKeyboardState
;
240 static void spitz_keyboard_sense_update(SpitzKeyboardState
*s
)
243 uint16_t strobe
, sense
= 0;
244 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++) {
245 strobe
= s
->keyrow
[i
] & s
->strobe_state
;
248 if (!(s
->sense_state
& (1 << i
)))
249 qemu_irq_raise(s
->sense
[i
]);
250 } else if (s
->sense_state
& (1 << i
))
251 qemu_irq_lower(s
->sense
[i
]);
254 s
->sense_state
= sense
;
257 static void spitz_keyboard_strobe(void *opaque
, int line
, int level
)
259 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
262 s
->strobe_state
|= 1 << line
;
264 s
->strobe_state
&= ~(1 << line
);
265 spitz_keyboard_sense_update(s
);
268 static void spitz_keyboard_keydown(SpitzKeyboardState
*s
, int keycode
)
270 int spitz_keycode
= s
->keymap
[keycode
& 0x7f];
271 if (spitz_keycode
== -1)
274 /* Handle the additional keys */
275 if ((spitz_keycode
>> 4) == SPITZ_KEY_SENSE_NUM
) {
276 qemu_set_irq(s
->gpiomap
[spitz_keycode
& 0xf], (keycode
< 0x80));
281 s
->keyrow
[spitz_keycode
>> 4] &= ~(1 << (spitz_keycode
& 0xf));
283 s
->keyrow
[spitz_keycode
>> 4] |= 1 << (spitz_keycode
& 0xf);
285 spitz_keyboard_sense_update(s
);
288 #define MOD_SHIFT (1 << 7)
289 #define MOD_CTRL (1 << 8)
290 #define MOD_FN (1 << 9)
292 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
294 static void spitz_keyboard_handler(void *opaque
, int keycode
)
296 SpitzKeyboardState
*s
= opaque
;
300 case 0x2a: /* Left Shift */
306 case 0x36: /* Right Shift */
312 case 0x1d: /* Control */
326 code
= s
->pre_map
[mapcode
= ((s
->modifiers
& 3) ?
327 (keycode
| MOD_SHIFT
) :
328 (keycode
& ~MOD_SHIFT
))];
330 if (code
!= mapcode
) {
332 if ((code
& MOD_SHIFT
) && !(s
->modifiers
& 1))
333 QUEUE_KEY(0x2a | (keycode
& 0x80));
334 if ((code
& MOD_CTRL
) && !(s
->modifiers
& 4))
335 QUEUE_KEY(0x1d | (keycode
& 0x80));
336 if ((code
& MOD_FN
) && !(s
->modifiers
& 8))
337 QUEUE_KEY(0x38 | (keycode
& 0x80));
338 if ((code
& MOD_FN
) && (s
->modifiers
& 1))
339 QUEUE_KEY(0x2a | (~keycode
& 0x80));
340 if ((code
& MOD_FN
) && (s
->modifiers
& 2))
341 QUEUE_KEY(0x36 | (~keycode
& 0x80));
343 if (keycode
& 0x80) {
344 if ((s
->imodifiers
& 1 ) && !(s
->modifiers
& 1))
345 QUEUE_KEY(0x2a | 0x80);
346 if ((s
->imodifiers
& 4 ) && !(s
->modifiers
& 4))
347 QUEUE_KEY(0x1d | 0x80);
348 if ((s
->imodifiers
& 8 ) && !(s
->modifiers
& 8))
349 QUEUE_KEY(0x38 | 0x80);
350 if ((s
->imodifiers
& 0x10) && (s
->modifiers
& 1))
352 if ((s
->imodifiers
& 0x20) && (s
->modifiers
& 2))
356 if ((code
& MOD_SHIFT
) && !((s
->modifiers
| s
->imodifiers
) & 1)) {
360 if ((code
& MOD_CTRL
) && !((s
->modifiers
| s
->imodifiers
) & 4)) {
364 if ((code
& MOD_FN
) && !((s
->modifiers
| s
->imodifiers
) & 8)) {
368 if ((code
& MOD_FN
) && (s
->modifiers
& 1) &&
369 !(s
->imodifiers
& 0x10)) {
370 QUEUE_KEY(0x2a | 0x80);
371 s
->imodifiers
|= 0x10;
373 if ((code
& MOD_FN
) && (s
->modifiers
& 2) &&
374 !(s
->imodifiers
& 0x20)) {
375 QUEUE_KEY(0x36 | 0x80);
376 s
->imodifiers
|= 0x20;
382 QUEUE_KEY((code
& 0x7f) | (keycode
& 0x80));
385 static void spitz_keyboard_tick(void *opaque
)
387 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
390 spitz_keyboard_keydown(s
, s
->fifo
[s
->fifopos
++]);
392 if (s
->fifopos
>= 16)
396 qemu_mod_timer(s
->kbdtimer
, qemu_get_clock_ns(vm_clock
) +
397 get_ticks_per_sec() / 32);
400 static void spitz_keyboard_pre_map(SpitzKeyboardState
*s
)
403 for (i
= 0; i
< 0x100; i
++)
405 s
->pre_map
[0x02 | MOD_SHIFT
] = 0x02 | MOD_SHIFT
; /* exclam */
406 s
->pre_map
[0x28 | MOD_SHIFT
] = 0x03 | MOD_SHIFT
; /* quotedbl */
407 s
->pre_map
[0x04 | MOD_SHIFT
] = 0x04 | MOD_SHIFT
; /* numbersign */
408 s
->pre_map
[0x05 | MOD_SHIFT
] = 0x05 | MOD_SHIFT
; /* dollar */
409 s
->pre_map
[0x06 | MOD_SHIFT
] = 0x06 | MOD_SHIFT
; /* percent */
410 s
->pre_map
[0x08 | MOD_SHIFT
] = 0x07 | MOD_SHIFT
; /* ampersand */
411 s
->pre_map
[0x28 ] = 0x08 | MOD_SHIFT
; /* apostrophe */
412 s
->pre_map
[0x0a | MOD_SHIFT
] = 0x09 | MOD_SHIFT
; /* parenleft */
413 s
->pre_map
[0x0b | MOD_SHIFT
] = 0x0a | MOD_SHIFT
; /* parenright */
414 s
->pre_map
[0x29 | MOD_SHIFT
] = 0x0b | MOD_SHIFT
; /* asciitilde */
415 s
->pre_map
[0x03 | MOD_SHIFT
] = 0x0c | MOD_SHIFT
; /* at */
416 s
->pre_map
[0xd3 ] = 0x0e | MOD_FN
; /* Delete */
417 s
->pre_map
[0x3a ] = 0x0f | MOD_FN
; /* Caps_Lock */
418 s
->pre_map
[0x07 | MOD_SHIFT
] = 0x11 | MOD_FN
; /* asciicircum */
419 s
->pre_map
[0x0d ] = 0x12 | MOD_FN
; /* equal */
420 s
->pre_map
[0x0d | MOD_SHIFT
] = 0x13 | MOD_FN
; /* plus */
421 s
->pre_map
[0x1a ] = 0x14 | MOD_FN
; /* bracketleft */
422 s
->pre_map
[0x1b ] = 0x15 | MOD_FN
; /* bracketright */
423 s
->pre_map
[0x1a | MOD_SHIFT
] = 0x16 | MOD_FN
; /* braceleft */
424 s
->pre_map
[0x1b | MOD_SHIFT
] = 0x17 | MOD_FN
; /* braceright */
425 s
->pre_map
[0x27 ] = 0x22 | MOD_FN
; /* semicolon */
426 s
->pre_map
[0x27 | MOD_SHIFT
] = 0x23 | MOD_FN
; /* colon */
427 s
->pre_map
[0x09 | MOD_SHIFT
] = 0x24 | MOD_FN
; /* asterisk */
428 s
->pre_map
[0x2b ] = 0x25 | MOD_FN
; /* backslash */
429 s
->pre_map
[0x2b | MOD_SHIFT
] = 0x26 | MOD_FN
; /* bar */
430 s
->pre_map
[0x0c | MOD_SHIFT
] = 0x30 | MOD_FN
; /* underscore */
431 s
->pre_map
[0x33 | MOD_SHIFT
] = 0x33 | MOD_FN
; /* less */
432 s
->pre_map
[0x35 ] = 0x33 | MOD_SHIFT
; /* slash */
433 s
->pre_map
[0x34 | MOD_SHIFT
] = 0x34 | MOD_FN
; /* greater */
434 s
->pre_map
[0x35 | MOD_SHIFT
] = 0x34 | MOD_SHIFT
; /* question */
435 s
->pre_map
[0x49 ] = 0x48 | MOD_FN
; /* Page_Up */
436 s
->pre_map
[0x51 ] = 0x50 | MOD_FN
; /* Page_Down */
448 static int spitz_keyboard_post_load(void *opaque
, int version_id
)
450 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
452 /* Release all pressed keys */
453 memset(s
->keyrow
, 0, sizeof(s
->keyrow
));
454 spitz_keyboard_sense_update(s
);
463 static void spitz_keyboard_register(PXA2xxState
*cpu
)
467 SpitzKeyboardState
*s
;
469 dev
= sysbus_create_simple(TYPE_SPITZ_KEYBOARD
, -1, NULL
);
470 s
= SPITZ_KEYBOARD(dev
);
472 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++)
473 qdev_connect_gpio_out(dev
, i
, qdev_get_gpio_in(cpu
->gpio
, spitz_gpio_key_sense
[i
]));
475 for (i
= 0; i
< 5; i
++)
476 s
->gpiomap
[i
] = qdev_get_gpio_in(cpu
->gpio
, spitz_gpiomap
[i
]);
479 s
->gpiomap
[4] = qemu_irq_invert(s
->gpiomap
[4]);
481 for (i
= 0; i
< 5; i
++)
482 qemu_set_irq(s
->gpiomap
[i
], 0);
484 for (i
= 0; i
< SPITZ_KEY_STROBE_NUM
; i
++)
485 qdev_connect_gpio_out(cpu
->gpio
, spitz_gpio_key_strobe
[i
],
486 qdev_get_gpio_in(dev
, i
));
488 qemu_mod_timer(s
->kbdtimer
, qemu_get_clock_ns(vm_clock
));
490 qemu_add_kbd_event_handler(spitz_keyboard_handler
, s
);
493 static int spitz_keyboard_init(SysBusDevice
*sbd
)
495 DeviceState
*dev
= DEVICE(sbd
);
496 SpitzKeyboardState
*s
= SPITZ_KEYBOARD(dev
);
499 for (i
= 0; i
< 0x80; i
++)
501 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
+ 1; i
++)
502 for (j
= 0; j
< SPITZ_KEY_STROBE_NUM
; j
++)
503 if (spitz_keymap
[i
][j
] != -1)
504 s
->keymap
[spitz_keymap
[i
][j
]] = (i
<< 4) | j
;
506 spitz_keyboard_pre_map(s
);
508 s
->kbdtimer
= qemu_new_timer_ns(vm_clock
, spitz_keyboard_tick
, s
);
509 qdev_init_gpio_in(dev
, spitz_keyboard_strobe
, SPITZ_KEY_STROBE_NUM
);
510 qdev_init_gpio_out(dev
, s
->sense
, SPITZ_KEY_SENSE_NUM
);
515 /* LCD backlight controller */
517 #define LCDTG_RESCTL 0x00
518 #define LCDTG_PHACTRL 0x01
519 #define LCDTG_DUTYCTRL 0x02
520 #define LCDTG_POWERREG0 0x03
521 #define LCDTG_POWERREG1 0x04
522 #define LCDTG_GPOR3 0x05
523 #define LCDTG_PICTRL 0x06
524 #define LCDTG_POLCTRL 0x07
528 uint32_t bl_intensity
;
532 static void spitz_bl_update(SpitzLCDTG
*s
)
534 if (s
->bl_power
&& s
->bl_intensity
)
535 zaurus_printf("LCD Backlight now at %i/63\n", s
->bl_intensity
);
537 zaurus_printf("LCD Backlight now off\n");
540 /* FIXME: Implement GPIO properly and remove this hack. */
541 static SpitzLCDTG
*spitz_lcdtg
;
543 static inline void spitz_bl_bit5(void *opaque
, int line
, int level
)
545 SpitzLCDTG
*s
= spitz_lcdtg
;
546 int prev
= s
->bl_intensity
;
549 s
->bl_intensity
&= ~0x20;
551 s
->bl_intensity
|= 0x20;
553 if (s
->bl_power
&& prev
!= s
->bl_intensity
)
557 static inline void spitz_bl_power(void *opaque
, int line
, int level
)
559 SpitzLCDTG
*s
= spitz_lcdtg
;
560 s
->bl_power
= !!level
;
564 static uint32_t spitz_lcdtg_transfer(SSISlave
*dev
, uint32_t value
)
566 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
574 zaurus_printf("LCD in QVGA mode\n");
576 zaurus_printf("LCD in VGA mode\n");
580 s
->bl_intensity
&= ~0x1f;
581 s
->bl_intensity
|= value
;
586 case LCDTG_POWERREG0
:
587 /* Set common voltage to M62332FP */
593 static int spitz_lcdtg_init(SSISlave
*dev
)
595 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
599 s
->bl_intensity
= 0x20;
606 #define CORGI_SSP_PORT 2
608 #define SPITZ_GPIO_LCDCON_CS 53
609 #define SPITZ_GPIO_ADS7846_CS 14
610 #define SPITZ_GPIO_MAX1111_CS 20
611 #define SPITZ_GPIO_TP_INT 11
613 static DeviceState
*max1111
;
615 /* "Demux" the signal based on current chipselect */
622 static uint32_t corgi_ssp_transfer(SSISlave
*dev
, uint32_t value
)
624 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
627 for (i
= 0; i
< 3; i
++) {
629 return ssi_transfer(s
->bus
[i
], value
);
635 static void corgi_ssp_gpio_cs(void *opaque
, int line
, int level
)
637 CorgiSSPState
*s
= (CorgiSSPState
*)opaque
;
638 assert(line
>= 0 && line
< 3);
639 s
->enable
[line
] = !level
;
642 #define MAX1111_BATT_VOLT 1
643 #define MAX1111_BATT_TEMP 2
644 #define MAX1111_ACIN_VOLT 3
646 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
647 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
648 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
650 static void spitz_adc_temp_on(void *opaque
, int line
, int level
)
656 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, SPITZ_BATTERY_TEMP
);
658 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
661 static int corgi_ssp_init(SSISlave
*dev
)
663 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
665 qdev_init_gpio_in(&dev
->qdev
, corgi_ssp_gpio_cs
, 3);
666 s
->bus
[0] = ssi_create_bus(&dev
->qdev
, "ssi0");
667 s
->bus
[1] = ssi_create_bus(&dev
->qdev
, "ssi1");
668 s
->bus
[2] = ssi_create_bus(&dev
->qdev
, "ssi2");
673 static void spitz_ssp_attach(PXA2xxState
*cpu
)
679 mux
= ssi_create_slave(cpu
->ssp
[CORGI_SSP_PORT
- 1], "corgi-ssp");
681 bus
= qdev_get_child_bus(mux
, "ssi0");
682 ssi_create_slave(bus
, "spitz-lcdtg");
684 bus
= qdev_get_child_bus(mux
, "ssi1");
685 dev
= ssi_create_slave(bus
, "ads7846");
686 qdev_connect_gpio_out(dev
, 0,
687 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_TP_INT
));
689 bus
= qdev_get_child_bus(mux
, "ssi2");
690 max1111
= ssi_create_slave(bus
, "max1111");
691 max111x_set_input(max1111
, MAX1111_BATT_VOLT
, SPITZ_BATTERY_VOLT
);
692 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
693 max111x_set_input(max1111
, MAX1111_ACIN_VOLT
, SPITZ_CHARGEON_ACIN
);
695 qdev_connect_gpio_out(cpu
->gpio
, SPITZ_GPIO_LCDCON_CS
,
696 qdev_get_gpio_in(mux
, 0));
697 qdev_connect_gpio_out(cpu
->gpio
, SPITZ_GPIO_ADS7846_CS
,
698 qdev_get_gpio_in(mux
, 1));
699 qdev_connect_gpio_out(cpu
->gpio
, SPITZ_GPIO_MAX1111_CS
,
700 qdev_get_gpio_in(mux
, 2));
705 static void spitz_microdrive_attach(PXA2xxState
*cpu
, int slot
)
710 dinfo
= drive_get(IF_IDE
, 0, 0);
711 if (!dinfo
|| dinfo
->media_cd
)
713 md
= dscm1xxxx_init(dinfo
);
714 pxa2xx_pcmcia_attach(cpu
->pcmcia
[slot
], md
);
717 /* Wm8750 and Max7310 on I2C */
719 #define AKITA_MAX_ADDR 0x18
720 #define SPITZ_WM_ADDRL 0x1b
721 #define SPITZ_WM_ADDRH 0x1a
723 #define SPITZ_GPIO_WM 5
725 static void spitz_wm8750_addr(void *opaque
, int line
, int level
)
727 I2CSlave
*wm
= (I2CSlave
*) opaque
;
729 i2c_set_slave_address(wm
, SPITZ_WM_ADDRH
);
731 i2c_set_slave_address(wm
, SPITZ_WM_ADDRL
);
734 static void spitz_i2c_setup(PXA2xxState
*cpu
)
736 /* Attach the CPU on one end of our I2C bus. */
737 i2c_bus
*bus
= pxa2xx_i2c_bus(cpu
->i2c
[0]);
741 /* Attach a WM8750 to the bus */
742 wm
= i2c_create_slave(bus
, "wm8750", 0);
744 spitz_wm8750_addr(wm
, 0, 0);
745 qdev_connect_gpio_out(cpu
->gpio
, SPITZ_GPIO_WM
,
746 qemu_allocate_irqs(spitz_wm8750_addr
, wm
, 1)[0]);
747 /* .. and to the sound interface. */
748 cpu
->i2s
->opaque
= wm
;
749 cpu
->i2s
->codec_out
= wm8750_dac_dat
;
750 cpu
->i2s
->codec_in
= wm8750_adc_dat
;
751 wm8750_data_req_set(wm
, cpu
->i2s
->data_req
, cpu
->i2s
);
754 static void spitz_akita_i2c_setup(PXA2xxState
*cpu
)
756 /* Attach a Max7310 to Akita I2C bus. */
757 i2c_create_slave(pxa2xx_i2c_bus(cpu
->i2c
[0]), "max7310",
761 /* Other peripherals */
763 static void spitz_out_switch(void *opaque
, int line
, int level
)
767 zaurus_printf("Charging %s.\n", level
? "off" : "on");
770 zaurus_printf("Discharging %s.\n", level
? "on" : "off");
773 zaurus_printf("Green LED %s.\n", level
? "on" : "off");
776 zaurus_printf("Orange LED %s.\n", level
? "on" : "off");
779 spitz_bl_bit5(opaque
, line
, level
);
782 spitz_bl_power(opaque
, line
, level
);
785 spitz_adc_temp_on(opaque
, line
, level
);
790 #define SPITZ_SCP_LED_GREEN 1
791 #define SPITZ_SCP_JK_B 2
792 #define SPITZ_SCP_CHRG_ON 3
793 #define SPITZ_SCP_MUTE_L 4
794 #define SPITZ_SCP_MUTE_R 5
795 #define SPITZ_SCP_CF_POWER 6
796 #define SPITZ_SCP_LED_ORANGE 7
797 #define SPITZ_SCP_JK_A 8
798 #define SPITZ_SCP_ADC_TEMP_ON 9
799 #define SPITZ_SCP2_IR_ON 1
800 #define SPITZ_SCP2_AKIN_PULLUP 2
801 #define SPITZ_SCP2_BACKLIGHT_CONT 7
802 #define SPITZ_SCP2_BACKLIGHT_ON 8
803 #define SPITZ_SCP2_MIC_BIAS 9
805 static void spitz_scoop_gpio_setup(PXA2xxState
*cpu
,
806 DeviceState
*scp0
, DeviceState
*scp1
)
808 qemu_irq
*outsignals
= qemu_allocate_irqs(spitz_out_switch
, cpu
, 8);
810 qdev_connect_gpio_out(scp0
, SPITZ_SCP_CHRG_ON
, outsignals
[0]);
811 qdev_connect_gpio_out(scp0
, SPITZ_SCP_JK_B
, outsignals
[1]);
812 qdev_connect_gpio_out(scp0
, SPITZ_SCP_LED_GREEN
, outsignals
[2]);
813 qdev_connect_gpio_out(scp0
, SPITZ_SCP_LED_ORANGE
, outsignals
[3]);
816 qdev_connect_gpio_out(scp1
, SPITZ_SCP2_BACKLIGHT_CONT
, outsignals
[4]);
817 qdev_connect_gpio_out(scp1
, SPITZ_SCP2_BACKLIGHT_ON
, outsignals
[5]);
820 qdev_connect_gpio_out(scp0
, SPITZ_SCP_ADC_TEMP_ON
, outsignals
[6]);
823 #define SPITZ_GPIO_HSYNC 22
824 #define SPITZ_GPIO_SD_DETECT 9
825 #define SPITZ_GPIO_SD_WP 81
826 #define SPITZ_GPIO_ON_RESET 89
827 #define SPITZ_GPIO_BAT_COVER 90
828 #define SPITZ_GPIO_CF1_IRQ 105
829 #define SPITZ_GPIO_CF1_CD 94
830 #define SPITZ_GPIO_CF2_IRQ 106
831 #define SPITZ_GPIO_CF2_CD 93
833 static int spitz_hsync
;
835 static void spitz_lcd_hsync_handler(void *opaque
, int line
, int level
)
837 PXA2xxState
*cpu
= (PXA2xxState
*) opaque
;
838 qemu_set_irq(qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_HSYNC
), spitz_hsync
);
842 static void spitz_gpio_setup(PXA2xxState
*cpu
, int slots
)
846 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
847 * read to satisfy broken guests that poll-wait for hsync.
848 * Simulating a real hsync event would be less practical and
849 * wouldn't guarantee that a guest ever exits the loop.
852 lcd_hsync
= qemu_allocate_irqs(spitz_lcd_hsync_handler
, cpu
, 1)[0];
853 pxa2xx_gpio_read_notifier(cpu
->gpio
, lcd_hsync
);
854 pxa2xx_lcd_vsync_notifier(cpu
->lcd
, lcd_hsync
);
857 pxa2xx_mmci_handlers(cpu
->mmc
,
858 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_SD_WP
),
859 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_SD_DETECT
));
861 /* Battery lock always closed */
862 qemu_irq_raise(qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_BAT_COVER
));
865 qdev_connect_gpio_out(cpu
->gpio
, SPITZ_GPIO_ON_RESET
, cpu
->reset
);
867 /* PCMCIA signals: card's IRQ and Card-Detect */
869 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[0],
870 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_CF1_IRQ
),
871 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_CF1_CD
));
873 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[1],
874 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_CF2_IRQ
),
875 qdev_get_gpio_in(cpu
->gpio
, SPITZ_GPIO_CF2_CD
));
879 enum spitz_model_e
{ spitz
, akita
, borzoi
, terrier
};
881 #define SPITZ_RAM 0x04000000
882 #define SPITZ_ROM 0x00800000
884 static struct arm_boot_info spitz_binfo
= {
885 .loader_start
= PXA2XX_SDRAM_BASE
,
886 .ram_size
= 0x04000000,
889 static void spitz_common_init(QEMUMachineInitArgs
*args
,
890 enum spitz_model_e model
, int arm_id
)
893 DeviceState
*scp0
, *scp1
= NULL
;
894 MemoryRegion
*address_space_mem
= get_system_memory();
895 MemoryRegion
*rom
= g_new(MemoryRegion
, 1);
896 const char *cpu_model
= args
->cpu_model
;
899 cpu_model
= (model
== terrier
) ? "pxa270-c5" : "pxa270-c0";
901 /* Setup CPU & memory */
902 mpu
= pxa270_init(address_space_mem
, spitz_binfo
.ram_size
, cpu_model
);
904 sl_flash_register(mpu
, (model
== spitz
) ? FLASH_128M
: FLASH_1024M
);
906 memory_region_init_ram(rom
, NULL
, "spitz.rom", SPITZ_ROM
);
907 vmstate_register_ram_global(rom
);
908 memory_region_set_readonly(rom
, true);
909 memory_region_add_subregion(address_space_mem
, 0, rom
);
911 /* Setup peripherals */
912 spitz_keyboard_register(mpu
);
914 spitz_ssp_attach(mpu
);
916 scp0
= sysbus_create_simple("scoop", 0x10800000, NULL
);
917 if (model
!= akita
) {
918 scp1
= sysbus_create_simple("scoop", 0x08800040, NULL
);
921 spitz_scoop_gpio_setup(mpu
, scp0
, scp1
);
923 spitz_gpio_setup(mpu
, (model
== akita
) ? 1 : 2);
925 spitz_i2c_setup(mpu
);
928 spitz_akita_i2c_setup(mpu
);
930 if (model
== terrier
)
931 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
932 spitz_microdrive_attach(mpu
, 1);
933 else if (model
!= akita
)
934 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
935 spitz_microdrive_attach(mpu
, 0);
937 spitz_binfo
.kernel_filename
= args
->kernel_filename
;
938 spitz_binfo
.kernel_cmdline
= args
->kernel_cmdline
;
939 spitz_binfo
.initrd_filename
= args
->initrd_filename
;
940 spitz_binfo
.board_id
= arm_id
;
941 arm_load_kernel(mpu
->cpu
, &spitz_binfo
);
942 sl_bootparam_write(SL_PXA_PARAM_BASE
);
945 static void spitz_init(QEMUMachineInitArgs
*args
)
947 spitz_common_init(args
, spitz
, 0x2c9);
950 static void borzoi_init(QEMUMachineInitArgs
*args
)
952 spitz_common_init(args
, borzoi
, 0x33f);
955 static void akita_init(QEMUMachineInitArgs
*args
)
957 spitz_common_init(args
, akita
, 0x2e8);
960 static void terrier_init(QEMUMachineInitArgs
*args
)
962 spitz_common_init(args
, terrier
, 0x33f);
965 static QEMUMachine akitapda_machine
= {
967 .desc
= "Akita PDA (PXA270)",
969 DEFAULT_MACHINE_OPTIONS
,
972 static QEMUMachine spitzpda_machine
= {
974 .desc
= "Spitz PDA (PXA270)",
976 DEFAULT_MACHINE_OPTIONS
,
979 static QEMUMachine borzoipda_machine
= {
981 .desc
= "Borzoi PDA (PXA270)",
983 DEFAULT_MACHINE_OPTIONS
,
986 static QEMUMachine terrierpda_machine
= {
988 .desc
= "Terrier PDA (PXA270)",
989 .init
= terrier_init
,
990 DEFAULT_MACHINE_OPTIONS
,
993 static void spitz_machine_init(void)
995 qemu_register_machine(&akitapda_machine
);
996 qemu_register_machine(&spitzpda_machine
);
997 qemu_register_machine(&borzoipda_machine
);
998 qemu_register_machine(&terrierpda_machine
);
1001 machine_init(spitz_machine_init
);
1003 static bool is_version_0(void *opaque
, int version_id
)
1005 return version_id
== 0;
1008 static VMStateDescription vmstate_sl_nand_info
= {
1011 .minimum_version_id
= 0,
1012 .minimum_version_id_old
= 0,
1013 .fields
= (VMStateField
[]) {
1014 VMSTATE_UINT8(ctl
, SLNANDState
),
1015 VMSTATE_STRUCT(ecc
, SLNANDState
, 0, vmstate_ecc_state
, ECCState
),
1016 VMSTATE_END_OF_LIST(),
1020 static Property sl_nand_properties
[] = {
1021 DEFINE_PROP_UINT8("manf_id", SLNANDState
, manf_id
, NAND_MFR_SAMSUNG
),
1022 DEFINE_PROP_UINT8("chip_id", SLNANDState
, chip_id
, 0xf1),
1023 DEFINE_PROP_END_OF_LIST(),
1026 static void sl_nand_class_init(ObjectClass
*klass
, void *data
)
1028 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1029 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
1031 k
->init
= sl_nand_init
;
1032 dc
->vmsd
= &vmstate_sl_nand_info
;
1033 dc
->props
= sl_nand_properties
;
1036 static const TypeInfo sl_nand_info
= {
1037 .name
= TYPE_SL_NAND
,
1038 .parent
= TYPE_SYS_BUS_DEVICE
,
1039 .instance_size
= sizeof(SLNANDState
),
1040 .class_init
= sl_nand_class_init
,
1043 static VMStateDescription vmstate_spitz_kbd
= {
1044 .name
= "spitz-keyboard",
1046 .minimum_version_id
= 0,
1047 .minimum_version_id_old
= 0,
1048 .post_load
= spitz_keyboard_post_load
,
1049 .fields
= (VMStateField
[]) {
1050 VMSTATE_UINT16(sense_state
, SpitzKeyboardState
),
1051 VMSTATE_UINT16(strobe_state
, SpitzKeyboardState
),
1052 VMSTATE_UNUSED_TEST(is_version_0
, 5),
1053 VMSTATE_END_OF_LIST(),
1057 static Property spitz_keyboard_properties
[] = {
1058 DEFINE_PROP_END_OF_LIST(),
1061 static void spitz_keyboard_class_init(ObjectClass
*klass
, void *data
)
1063 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1064 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
1066 k
->init
= spitz_keyboard_init
;
1067 dc
->vmsd
= &vmstate_spitz_kbd
;
1068 dc
->props
= spitz_keyboard_properties
;
1071 static const TypeInfo spitz_keyboard_info
= {
1072 .name
= TYPE_SPITZ_KEYBOARD
,
1073 .parent
= TYPE_SYS_BUS_DEVICE
,
1074 .instance_size
= sizeof(SpitzKeyboardState
),
1075 .class_init
= spitz_keyboard_class_init
,
1078 static const VMStateDescription vmstate_corgi_ssp_regs
= {
1079 .name
= "corgi-ssp",
1081 .minimum_version_id
= 2,
1082 .minimum_version_id_old
= 2,
1083 .fields
= (VMStateField
[]) {
1084 VMSTATE_SSI_SLAVE(ssidev
, CorgiSSPState
),
1085 VMSTATE_UINT32_ARRAY(enable
, CorgiSSPState
, 3),
1086 VMSTATE_END_OF_LIST(),
1090 static void corgi_ssp_class_init(ObjectClass
*klass
, void *data
)
1092 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1093 SSISlaveClass
*k
= SSI_SLAVE_CLASS(klass
);
1095 k
->init
= corgi_ssp_init
;
1096 k
->transfer
= corgi_ssp_transfer
;
1097 dc
->vmsd
= &vmstate_corgi_ssp_regs
;
1100 static const TypeInfo corgi_ssp_info
= {
1101 .name
= "corgi-ssp",
1102 .parent
= TYPE_SSI_SLAVE
,
1103 .instance_size
= sizeof(CorgiSSPState
),
1104 .class_init
= corgi_ssp_class_init
,
1107 static const VMStateDescription vmstate_spitz_lcdtg_regs
= {
1108 .name
= "spitz-lcdtg",
1110 .minimum_version_id
= 1,
1111 .minimum_version_id_old
= 1,
1112 .fields
= (VMStateField
[]) {
1113 VMSTATE_SSI_SLAVE(ssidev
, SpitzLCDTG
),
1114 VMSTATE_UINT32(bl_intensity
, SpitzLCDTG
),
1115 VMSTATE_UINT32(bl_power
, SpitzLCDTG
),
1116 VMSTATE_END_OF_LIST(),
1120 static void spitz_lcdtg_class_init(ObjectClass
*klass
, void *data
)
1122 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1123 SSISlaveClass
*k
= SSI_SLAVE_CLASS(klass
);
1125 k
->init
= spitz_lcdtg_init
;
1126 k
->transfer
= spitz_lcdtg_transfer
;
1127 dc
->vmsd
= &vmstate_spitz_lcdtg_regs
;
1130 static const TypeInfo spitz_lcdtg_info
= {
1131 .name
= "spitz-lcdtg",
1132 .parent
= TYPE_SSI_SLAVE
,
1133 .instance_size
= sizeof(SpitzLCDTG
),
1134 .class_init
= spitz_lcdtg_class_init
,
1137 static void spitz_register_types(void)
1139 type_register_static(&corgi_ssp_info
);
1140 type_register_static(&spitz_lcdtg_info
);
1141 type_register_static(&spitz_keyboard_info
);
1142 type_register_static(&sl_nand_info
);
1145 type_init(spitz_register_types
)