hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32
  33 #include "hw/boards.h"
  34 #include "hw/ppc.h"
  35 #include "hw/loader.h"
  36
  37 #include "hw/spapr.h"
  38 #include "hw/spapr_vio.h"
  39 #include "hw/xics.h"
  40
  41 #include <libfdt.h>
  42
  43 #define KERNEL_LOAD_ADDR        0x00000000
  44 #define INITRD_LOAD_ADDR        0x02800000
  45 #define FDT_MAX_SIZE            0x10000
  46 #define RTAS_MAX_SIZE           0x10000
  47 #define FW_MAX_SIZE             0x400000
  48 #define FW_FILE_NAME            "slof.bin"
  49
  50 #define MIN_RAM_SLOF            512UL
  51
  52 #define TIMEBASE_FREQ           512000000ULL
  53
  54 #define MAX_CPUS                32
  55 #define XICS_IRQS               1024
  56
  57 sPAPREnvironment *spapr;
  58
  59 static void *spapr_create_fdt(int *fdt_size, ram_addr_t ramsize,
  60                               const char *cpu_model,
  61                               sPAPREnvironment *spapr,
  62                               target_phys_addr_t initrd_base,
  63                               target_phys_addr_t initrd_size,
  64                               const char *boot_device,
  65                               const char *kernel_cmdline,
  66                               target_phys_addr_t rtas_addr,
  67                               target_phys_addr_t rtas_size,
  68                               long hash_shift)
  69 {
  70     void *fdt;
  71     CPUState *env;
  72     uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
  73     uint32_t start_prop = cpu_to_be32(initrd_base);
  74     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
  75     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
  76     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
  77         "\0hcall-tce\0hcall-vio\0hcall-splpar";
  78     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
  79     int i;
  80     char *modelname;
  81     int ret;
  82
  83 #define _FDT(exp) \
  84     do { \
  85         int ret = (exp);                                           \
  86         if (ret < 0) {                                             \
  87             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
  88                     #exp, fdt_strerror(ret));                      \
  89             exit(1);                                               \
  90         }                                                          \
  91     } while (0)
  92
  93     fdt = qemu_mallocz(FDT_MAX_SIZE);
  94     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
  95
  96     _FDT((fdt_finish_reservemap(fdt)));
  97
  98     /* Root node */
  99     _FDT((fdt_begin_node(fdt, "")));
 100     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 101     _FDT((fdt_property_string(fdt, "model", "qemu,emulated-pSeries-LPAR")));
 102
 103     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 104     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 105
 106     /* /chosen */
 107     _FDT((fdt_begin_node(fdt, "chosen")));
 108
 109     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 110     _FDT((fdt_property(fdt, "linux,initrd-start",
 111                        &start_prop, sizeof(start_prop))));
 112     _FDT((fdt_property(fdt, "linux,initrd-end",
 113                        &end_prop, sizeof(end_prop))));
 114     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 115
 116     _FDT((fdt_end_node(fdt)));
 117
 118     /* memory node */
 119     _FDT((fdt_begin_node(fdt, "memory@0")));
 120
 121     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 122     _FDT((fdt_property(fdt, "reg",
 123                        mem_reg_property, sizeof(mem_reg_property))));
 124
 125     _FDT((fdt_end_node(fdt)));
 126
 127     /* cpus */
 128     _FDT((fdt_begin_node(fdt, "cpus")));
 129
 130     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 131     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 132
 133     modelname = qemu_strdup(cpu_model);
 134
 135     for (i = 0; i < strlen(modelname); i++) {
 136         modelname[i] = toupper(modelname[i]);
 137     }
 138
 139     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 140         int index = env->cpu_index;
 141         uint32_t gserver_prop[] = {cpu_to_be32(index), 0}; /* HACK! */
 142         char *nodename;
 143         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 144                            0xffffffff, 0xffffffff};
 145
 146         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 147             fprintf(stderr, "Allocation failure\n");
 148             exit(1);
 149         }
 150
 151         _FDT((fdt_begin_node(fdt, nodename)));
 152
 153         free(nodename);
 154
 155         _FDT((fdt_property_cell(fdt, "reg", index)));
 156         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 157
 158         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 159         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 160                                 env->dcache_line_size)));
 161         _FDT((fdt_property_cell(fdt, "icache-block-size",
 162                                 env->icache_line_size)));
 163         _FDT((fdt_property_cell(fdt, "timebase-frequency", TIMEBASE_FREQ)));
 164         /* Hardcode CPU frequency for now.  It's kind of arbitrary on
 165          * full emu, for kvm we should copy it from the host */
 166         _FDT((fdt_property_cell(fdt, "clock-frequency", 1000000000)));
 167         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 168         _FDT((fdt_property(fdt, "ibm,pft-size",
 169                            pft_size_prop, sizeof(pft_size_prop))));
 170         _FDT((fdt_property_string(fdt, "status", "okay")));
 171         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 172         _FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", index)));
 173         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 174                            gserver_prop, sizeof(gserver_prop))));
 175
 176         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 177             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 178                                segs, sizeof(segs))));
 179         }
 180
 181         _FDT((fdt_end_node(fdt)));
 182     }
 183
 184     qemu_free(modelname);
 185
 186     _FDT((fdt_end_node(fdt)));
 187
 188     /* RTAS */
 189     _FDT((fdt_begin_node(fdt, "rtas")));
 190
 191     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 192                        sizeof(hypertas_prop))));
 193
 194     _FDT((fdt_end_node(fdt)));
 195
 196     /* interrupt controller */
 197     _FDT((fdt_begin_node(fdt, "interrupt-controller@0")));
 198
 199     _FDT((fdt_property_string(fdt, "device_type",
 200                               "PowerPC-External-Interrupt-Presentation")));
 201     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 202     _FDT((fdt_property_cell(fdt, "reg", 0)));
 203     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 204     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 205                        interrupt_server_ranges_prop,
 206                        sizeof(interrupt_server_ranges_prop))));
 207
 208     _FDT((fdt_end_node(fdt)));
 209
 210     /* vdevice */
 211     _FDT((fdt_begin_node(fdt, "vdevice")));
 212
 213     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 214     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 215     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 216     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 217     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 218     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 219
 220     _FDT((fdt_end_node(fdt)));
 221
 222     _FDT((fdt_end_node(fdt))); /* close root node */
 223     _FDT((fdt_finish(fdt)));
 224
 225     /* re-expand to allow for further tweaks */
 226     _FDT((fdt_open_into(fdt, fdt, FDT_MAX_SIZE)));
 227
 228     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 229     if (ret < 0) {
 230         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 231         exit(1);
 232     }
 233
 234     /* RTAS */
 235     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 236     if (ret < 0) {
 237         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 238     }
 239
 240     _FDT((fdt_pack(fdt)));
 241
 242     *fdt_size = fdt_totalsize(fdt);
 243
 244     return fdt;
 245 }
 246
 247 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 248 {
 249     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 250 }
 251
 252 static void emulate_spapr_hypercall(CPUState *env)
 253 {
 254     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 255 }
 256
 257 /* pSeries LPAR / sPAPR hardware init */
 258 static void ppc_spapr_init(ram_addr_t ram_size,
 259                            const char *boot_device,
 260                            const char *kernel_filename,
 261                            const char *kernel_cmdline,
 262                            const char *initrd_filename,
 263                            const char *cpu_model)
 264 {
 265     void *fdt, *htab;
 266     CPUState *env;
 267     int i;
 268     ram_addr_t ram_offset;
 269     target_phys_addr_t fdt_addr, rtas_addr;
 270     uint32_t kernel_base, initrd_base;
 271     long kernel_size, initrd_size, htab_size, rtas_size, fw_size;
 272     long pteg_shift = 17;
 273     int fdt_size;
 274     char *filename;
 275     int irq = 16;
 276
 277     spapr = qemu_malloc(sizeof(*spapr));
 278     cpu_ppc_hypercall = emulate_spapr_hypercall;
 279
 280     /* We place the device tree just below either the top of RAM, or
 281      * 2GB, so that it can be processed with 32-bit code if
 282      * necessary */
 283     fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
 284     /* RTAS goes just below that */
 285     rtas_addr = fdt_addr - RTAS_MAX_SIZE;
 286
 287     /* init CPUs */
 288     if (cpu_model == NULL) {
 289         cpu_model = "POWER7";
 290     }
 291     for (i = 0; i < smp_cpus; i++) {
 292         env = cpu_init(cpu_model);
 293
 294         if (!env) {
 295             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 296             exit(1);
 297         }
 298         /* Set time-base frequency to 512 MHz */
 299         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 300         qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
 301
 302         env->hreset_vector = 0x60;
 303         env->hreset_excp_prefix = 0;
 304         env->gpr[3] = env->cpu_index;
 305     }
 306
 307     /* allocate RAM */
 308     ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size);
 309     cpu_register_physical_memory(0, ram_size, ram_offset);
 310
 311     /* allocate hash page table.  For now we always make this 16mb,
 312      * later we should probably make it scale to the size of guest
 313      * RAM */
 314     htab_size = 1ULL << (pteg_shift + 7);
 315     htab = qemu_mallocz(htab_size);
 316
 317     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 318         env->external_htab = htab;
 319         env->htab_base = -1;
 320         env->htab_mask = htab_size - 1;
 321     }
 322
 323     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 324     rtas_size = load_image_targphys(filename, rtas_addr, ram_size - rtas_addr);
 325     if (rtas_size < 0) {
 326         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 327         exit(1);
 328     }
 329     qemu_free(filename);
 330
 331     /* Set up Interrupt Controller */
 332     spapr->icp = xics_system_init(XICS_IRQS);
 333
 334     /* Set up VIO bus */
 335     spapr->vio_bus = spapr_vio_bus_init();
 336
 337     for (i = 0; i < MAX_SERIAL_PORTS; i++, irq++) {
 338         if (serial_hds[i]) {
 339             spapr_vty_create(spapr->vio_bus, i, serial_hds[i],
 340                              xics_find_qirq(spapr->icp, irq), irq);
 341         }
 342     }
 343
 344     for (i = 0; i < nb_nics; i++, irq++) {
 345         NICInfo *nd = &nd_table[i];
 346
 347         if (!nd->model) {
 348             nd->model = qemu_strdup("ibmveth");
 349         }
 350
 351         if (strcmp(nd->model, "ibmveth") == 0) {
 352             spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd,
 353                               xics_find_qirq(spapr->icp, irq), irq);
 354         } else {
 355             fprintf(stderr, "pSeries (sPAPR) platform does not support "
 356                     "NIC model '%s' (only ibmveth is supported)\n",
 357                     nd->model);
 358             exit(1);
 359         }
 360     }
 361
 362     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 363         spapr_vscsi_create(spapr->vio_bus, 0x2000 + i,
 364                            xics_find_qirq(spapr->icp, irq), irq);
 365         irq++;
 366     }
 367
 368     if (kernel_filename) {
 369         uint64_t lowaddr = 0;
 370
 371         kernel_base = KERNEL_LOAD_ADDR;
 372
 373         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 374                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 375         if (kernel_size < 0) {
 376             kernel_size = load_image_targphys(kernel_filename, kernel_base,
 377                                               ram_size - kernel_base);
 378         }
 379         if (kernel_size < 0) {
 380             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 381                     kernel_filename);
 382             exit(1);
 383         }
 384
 385         /* load initrd */
 386         if (initrd_filename) {
 387             initrd_base = INITRD_LOAD_ADDR;
 388             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 389                                               ram_size - initrd_base);
 390             if (initrd_size < 0) {
 391                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 392                         initrd_filename);
 393                 exit(1);
 394             }
 395         } else {
 396             initrd_base = 0;
 397             initrd_size = 0;
 398         }
 399     } else {
 400         if (ram_size < (MIN_RAM_SLOF << 20)) {
 401             fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 402                     "%ldM guest RAM\n", MIN_RAM_SLOF);
 403             exit(1);
 404         }
 405         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "slof.bin");
 406         fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 407         if (fw_size < 0) {
 408             hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 409             exit(1);
 410         }
 411         qemu_free(filename);
 412         kernel_base = 0x100;
 413         initrd_base = 0;
 414         initrd_size = 0;
 415
 416         /* SLOF will startup the secondary CPUs using RTAS,
 417            rather than expecting a kexec() style entry */
 418         for (env = first_cpu; env != NULL; env = env->next_cpu) {
 419             env->halted = 1;
 420         }
 421     }
 422
 423     /* Prepare the device tree */
 424     fdt = spapr_create_fdt(&fdt_size, ram_size, cpu_model, spapr,
 425                            initrd_base, initrd_size,
 426                            boot_device, kernel_cmdline,
 427                            rtas_addr, rtas_size, pteg_shift + 7);
 428     assert(fdt != NULL);
 429
 430     cpu_physical_memory_write(fdt_addr, fdt, fdt_size);
 431
 432     qemu_free(fdt);
 433
 434     first_cpu->gpr[3] = fdt_addr;
 435     first_cpu->gpr[5] = 0;
 436     first_cpu->hreset_vector = kernel_base;
 437     first_cpu->halted = 0;
 438 }
 439
 440 static QEMUMachine spapr_machine = {
 441     .name = "pseries",
 442     .desc = "pSeries Logical Partition (PAPR compliant)",
 443     .init = ppc_spapr_init,
 444     .max_cpus = MAX_CPUS,
 445     .no_vga = 1,
 446     .no_parallel = 1,
 447     .use_scsi = 1,
 448 };
 449
 450 static void spapr_machine_init(void)
 451 {
 452     qemu_register_machine(&spapr_machine);
 453 }
 454
 455 machine_init(spapr_machine_init);