hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  *
  25  * PCI bus layout on a real G5 (U3 based):
  26  *
  27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47  *
  48  */
  49 #include "hw.h"
  50 #include "ppc.h"
  51 #include "ppc_mac.h"
  52 #include "adb.h"
  53 #include "mac_dbdma.h"
  54 #include "nvram.h"
  55 #include "pci.h"
  56 #include "net.h"
  57 #include "sysemu.h"
  58 #include "boards.h"
  59 #include "fw_cfg.h"
  60 #include "escc.h"
  61 #include "openpic.h"
  62 #include "ide.h"
  63 #include "loader.h"
  64 #include "elf.h"
  65 #include "kvm.h"
  66 #include "kvm_ppc.h"
  67 #include "hw/usb.h"
  68 #include "blockdev.h"
  69 #include "exec-memory.h"
  70
  71 #define MAX_IDE_BUS 2
  72 #define CFG_ADDR 0xf0000510
  73
  74 /* debug UniNorth */
  75 //#define DEBUG_UNIN
  76
  77 #ifdef DEBUG_UNIN
  78 #define UNIN_DPRINTF(fmt, ...)                                  \
  79     do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
  80 #else
  81 #define UNIN_DPRINTF(fmt, ...)
  82 #endif
  83
  84 /* UniN device */
  85 static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
  86                        unsigned size)
  87 {
  88     UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
  89 }
  90
  91 static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
  92 {
  93     uint32_t value;
  94
  95     value = 0;
  96     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  97
  98     return value;
  99 }
 100
 101 static const MemoryRegionOps unin_ops = {
 102     .read = unin_read,
 103     .write = unin_write,
 104     .endianness = DEVICE_NATIVE_ENDIAN,
 105 };
 106
 107 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
 108 {
 109     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
 110     return 0;
 111 }
 112
 113 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 114 {
 115     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 116 }
 117
 118 static target_phys_addr_t round_page(target_phys_addr_t addr)
 119 {
 120     return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
 121 }
 122
 123 static void ppc_core99_reset(void *opaque)
 124 {
 125     PowerPCCPU *cpu = opaque;
 126
 127     cpu_reset(CPU(cpu));
 128 }
 129
 130 /* PowerPC Mac99 hardware initialisation */
 131 static void ppc_core99_init (ram_addr_t ram_size,
 132                              const char *boot_device,
 133                              const char *kernel_filename,
 134                              const char *kernel_cmdline,
 135                              const char *initrd_filename,
 136                              const char *cpu_model)
 137 {
 138     PowerPCCPU *cpu = NULL;
 139     CPUPPCState *env = NULL;
 140     char *filename;
 141     qemu_irq *pic, **openpic_irqs;
 142     MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
 143     int linux_boot, i;
 144     MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
 145     target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
 146     long kernel_size, initrd_size;
 147     PCIBus *pci_bus;
 148     MacIONVRAMState *nvr;
 149     int bios_size;
 150     MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
 151     MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
 152     MemoryRegion *ide_mem[3];
 153     int ppc_boot_device;
 154     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 155     void *fw_cfg;
 156     void *dbdma;
 157     int machine_arch;
 158
 159     linux_boot = (kernel_filename != NULL);
 160
 161     /* init CPUs */
 162     if (cpu_model == NULL)
 163 #ifdef TARGET_PPC64
 164         cpu_model = "970fx";
 165 #else
 166         cpu_model = "G4";
 167 #endif
 168     for (i = 0; i < smp_cpus; i++) {
 169         cpu = cpu_ppc_init(cpu_model);
 170         if (cpu == NULL) {
 171             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 172             exit(1);
 173         }
 174         env = &cpu->env;
 175
 176         /* Set time-base frequency to 100 Mhz */
 177         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 178         qemu_register_reset(ppc_core99_reset, cpu);
 179     }
 180
 181     /* allocate RAM */
 182     memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
 183     vmstate_register_ram_global(ram);
 184     memory_region_add_subregion(get_system_memory(), 0, ram);
 185
 186     /* allocate and load BIOS */
 187     memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
 188     vmstate_register_ram_global(bios);
 189     if (bios_name == NULL)
 190         bios_name = PROM_FILENAME;
 191     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 192     memory_region_set_readonly(bios, true);
 193     memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
 194
 195     /* Load OpenBIOS (ELF) */
 196     if (filename) {
 197         bios_size = load_elf(filename, NULL, NULL, NULL,
 198                              NULL, NULL, 1, ELF_MACHINE, 0);
 199
 200         g_free(filename);
 201     } else {
 202         bios_size = -1;
 203     }
 204     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 205         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 206         exit(1);
 207     }
 208
 209     if (linux_boot) {
 210         uint64_t lowaddr = 0;
 211         int bswap_needed;
 212
 213 #ifdef BSWAP_NEEDED
 214         bswap_needed = 1;
 215 #else
 216         bswap_needed = 0;
 217 #endif
 218         kernel_base = KERNEL_LOAD_ADDR;
 219
 220         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 221                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 222         if (kernel_size < 0)
 223             kernel_size = load_aout(kernel_filename, kernel_base,
 224                                     ram_size - kernel_base, bswap_needed,
 225                                     TARGET_PAGE_SIZE);
 226         if (kernel_size < 0)
 227             kernel_size = load_image_targphys(kernel_filename,
 228                                               kernel_base,
 229                                               ram_size - kernel_base);
 230         if (kernel_size < 0) {
 231             hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
 232             exit(1);
 233         }
 234         /* load initrd */
 235         if (initrd_filename) {
 236             initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 237             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 238                                               ram_size - initrd_base);
 239             if (initrd_size < 0) {
 240                 hw_error("qemu: could not load initial ram disk '%s'\n",
 241                          initrd_filename);
 242                 exit(1);
 243             }
 244             cmdline_base = round_page(initrd_base + initrd_size);
 245         } else {
 246             initrd_base = 0;
 247             initrd_size = 0;
 248             cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 249         }
 250         ppc_boot_device = 'm';
 251     } else {
 252         kernel_base = 0;
 253         kernel_size = 0;
 254         initrd_base = 0;
 255         initrd_size = 0;
 256         ppc_boot_device = '\0';
 257         /* We consider that NewWorld PowerMac never have any floppy drive
 258          * For now, OHW cannot boot from the network.
 259          */
 260         for (i = 0; boot_device[i] != '\0'; i++) {
 261             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 262                 ppc_boot_device = boot_device[i];
 263                 break;
 264             }
 265         }
 266         if (ppc_boot_device == '\0') {
 267             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 268             exit(1);
 269         }
 270     }
 271
 272     /* Register 8 MB of ISA IO space */
 273     isa_mmio_init(0xf2000000, 0x00800000);
 274
 275     /* UniN init */
 276     memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
 277     memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
 278
 279     openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 280     openpic_irqs[0] =
 281         g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 282     for (i = 0; i < smp_cpus; i++) {
 283         /* Mac99 IRQ connection between OpenPIC outputs pins
 284          * and PowerPC input pins
 285          */
 286         switch (PPC_INPUT(env)) {
 287         case PPC_FLAGS_INPUT_6xx:
 288             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 289             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 290                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 291             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 292                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 293             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 294                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 295             /* Not connected ? */
 296             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 297             /* Check this */
 298             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 299                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 300             break;
 301 #if defined(TARGET_PPC64)
 302         case PPC_FLAGS_INPUT_970:
 303             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 304             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 305                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 306             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 307                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 308             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 309                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 310             /* Not connected ? */
 311             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 312             /* Check this */
 313             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 314                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 315             break;
 316 #endif /* defined(TARGET_PPC64) */
 317         default:
 318             hw_error("Bus model not supported on mac99 machine\n");
 319             exit(1);
 320         }
 321     }
 322     pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
 323     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 324         /* 970 gets a U3 bus */
 325         pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
 326         machine_arch = ARCH_MAC99_U3;
 327     } else {
 328         pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
 329         machine_arch = ARCH_MAC99;
 330     }
 331     /* init basic PC hardware */
 332     pci_vga_init(pci_bus);
 333
 334     escc_mem = escc_init(0, pic[0x25], pic[0x24],
 335                          serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 336     memory_region_init_alias(escc_bar, "escc-bar",
 337                              escc_mem, 0, memory_region_size(escc_mem));
 338
 339     for(i = 0; i < nb_nics; i++)
 340         pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 341
 342     ide_drive_get(hd, MAX_IDE_BUS);
 343     dbdma = DBDMA_init(&dbdma_mem);
 344
 345     /* We only emulate 2 out of 3 IDE controllers for now */
 346     ide_mem[0] = NULL;
 347     ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
 348     ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
 349
 350     /* cuda also initialize ADB */
 351     if (machine_arch == ARCH_MAC99_U3) {
 352         usb_enabled = 1;
 353     }
 354     cuda_init(&cuda_mem, pic[0x19]);
 355
 356     adb_kbd_init(&adb_bus);
 357     adb_mouse_init(&adb_bus);
 358
 359     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
 360                dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);
 361
 362     if (usb_enabled) {
 363         pci_create_simple(pci_bus, -1, "pci-ohci");
 364     }
 365
 366     /* U3 needs to use USB for input because Linux doesn't support via-cuda
 367        on PPC64 */
 368     if (machine_arch == ARCH_MAC99_U3) {
 369         usbdevice_create("keyboard");
 370         usbdevice_create("mouse");
 371     }
 372
 373     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 374         graphic_depth = 15;
 375
 376     /* The NewWorld NVRAM is not located in the MacIO device */
 377     nvr = macio_nvram_init(0x2000, 1);
 378     pmac_format_nvram_partition(nvr, 0x2000);
 379     macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
 380     /* No PCI init: the BIOS will do it */
 381
 382     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 383     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 384     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 385     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 386     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 387     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 388     if (kernel_cmdline) {
 389         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 390         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 391     } else {
 392         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 393     }
 394     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 395     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 396     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 397
 398     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 399     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 400     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 401
 402     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 403     if (kvm_enabled()) {
 404 #ifdef CONFIG_KVM
 405         uint8_t *hypercall;
 406
 407         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 408         hypercall = g_malloc(16);
 409         kvmppc_get_hypercall(env, hypercall, 16);
 410         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 411         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 412 #endif
 413     } else {
 414         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 415     }
 416
 417     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 418 }
 419
 420 static QEMUMachine core99_machine = {
 421     .name = "mac99",
 422     .desc = "Mac99 based PowerMAC",
 423     .init = ppc_core99_init,
 424     .max_cpus = MAX_CPUS,
 425 #ifdef TARGET_PPC64
 426     .is_default = 1,
 427 #endif
 428 };
 429
 430 static void core99_machine_init(void)
 431 {
 432     qemu_register_machine(&core99_machine);
 433 }
 434
 435 machine_init(core99_machine_init);