2 * QEMU 16550A UART emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */
32 typedef struct SerialFIFO
{
33 uint8_t data
[UART_FIFO_LENGTH
];
35 uint8_t itl
; /* Interrupt Trigger Level */
42 uint8_t rbr
; /* receive register */
43 uint8_t thr
; /* transmit holding register */
44 uint8_t tsr
; /* transmit shift register */
46 uint8_t iir
; /* read only */
49 uint8_t lsr
; /* read only */
50 uint8_t msr
; /* read only */
53 uint8_t fcr_vmstate
; /* we can't write directly this value
54 it has side effects */
55 /* NOTE: this hidden state is necessary for tx irq generation as
56 it can be reset while reading iir */
60 int last_break_enable
;
66 /* Time when the last byte was successfully sent out of the tsr */
67 uint64_t last_xmit_ts
;
71 struct QEMUTimer
*fifo_timeout_timer
;
72 int timeout_ipending
; /* timeout interrupt pending state */
73 struct QEMUTimer
*transmit_timer
;
76 uint64_t char_transmit_time
; /* time to transmit a char in ticks */
79 struct QEMUTimer
*modem_status_poll
;
83 extern const VMStateDescription vmstate_serial
;
84 extern const MemoryRegionOps serial_io_ops
;
86 void serial_init_core(SerialState
*s
);
87 void serial_exit_core(SerialState
*s
);
88 void serial_set_frequency(SerialState
*s
, uint32_t frequency
);
91 SerialState
*serial_init(int base
, qemu_irq irq
, int baudbase
,
92 CharDriverState
*chr
);
93 SerialState
*serial_mm_init(MemoryRegion
*address_space
,
94 hwaddr base
, int it_shift
,
95 qemu_irq irq
, int baudbase
,
96 CharDriverState
*chr
, enum device_endian end
);
99 bool serial_isa_init(ISABus
*bus
, int index
, CharDriverState
*chr
);