hw/msi.c

   1 /*
   2  * msi.c
   3  *
   4  * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "msi.h"
  22 #include "range.h"
  23 #include "kvm.h"
  24
  25 /* Eventually those constants should go to Linux pci_regs.h */
  26 #define PCI_MSI_PENDING_32      0x10
  27 #define PCI_MSI_PENDING_64      0x14
  28
  29 /* PCI_MSI_ADDRESS_LO */
  30 #define PCI_MSI_ADDRESS_LO_MASK         (~0x3)
  31
  32 /* If we get rid of cap allocator, we won't need those. */
  33 #define PCI_MSI_32_SIZEOF       0x0a
  34 #define PCI_MSI_64_SIZEOF       0x0e
  35 #define PCI_MSI_32M_SIZEOF      0x14
  36 #define PCI_MSI_64M_SIZEOF      0x18
  37
  38 #define PCI_MSI_VECTORS_MAX     32
  39
  40 /* If we get rid of cap allocator, we won't need this. */
  41 static inline uint8_t msi_cap_sizeof(uint16_t flags)
  42 {
  43     switch (flags & (PCI_MSI_FLAGS_MASKBIT | PCI_MSI_FLAGS_64BIT)) {
  44     case PCI_MSI_FLAGS_MASKBIT | PCI_MSI_FLAGS_64BIT:
  45         return PCI_MSI_64M_SIZEOF;
  46     case PCI_MSI_FLAGS_64BIT:
  47         return PCI_MSI_64_SIZEOF;
  48     case PCI_MSI_FLAGS_MASKBIT:
  49         return PCI_MSI_32M_SIZEOF;
  50     case 0:
  51         return PCI_MSI_32_SIZEOF;
  52     default:
  53         abort();
  54         break;
  55     }
  56     return 0;
  57 }
  58
  59 //#define MSI_DEBUG
  60
  61 #ifdef MSI_DEBUG
  62 # define MSI_DPRINTF(fmt, ...)                                          \
  63     fprintf(stderr, "%s:%d " fmt, __func__, __LINE__, ## __VA_ARGS__)
  64 #else
  65 # define MSI_DPRINTF(fmt, ...)  do { } while (0)
  66 #endif
  67 #define MSI_DEV_PRINTF(dev, fmt, ...)                                   \
  68     MSI_DPRINTF("%s:%x " fmt, (dev)->name, (dev)->devfn, ## __VA_ARGS__)
  69
  70 static inline unsigned int msi_nr_vectors(uint16_t flags)
  71 {
  72     return 1U <<
  73         ((flags & PCI_MSI_FLAGS_QSIZE) >> (ffs(PCI_MSI_FLAGS_QSIZE) - 1));
  74 }
  75
  76 static inline uint8_t msi_flags_off(const PCIDevice* dev)
  77 {
  78     return dev->msi_cap + PCI_MSI_FLAGS;
  79 }
  80
  81 static inline uint8_t msi_address_lo_off(const PCIDevice* dev)
  82 {
  83     return dev->msi_cap + PCI_MSI_ADDRESS_LO;
  84 }
  85
  86 static inline uint8_t msi_address_hi_off(const PCIDevice* dev)
  87 {
  88     return dev->msi_cap + PCI_MSI_ADDRESS_HI;
  89 }
  90
  91 static inline uint8_t msi_data_off(const PCIDevice* dev, bool msi64bit)
  92 {
  93     return dev->msi_cap + (msi64bit ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32);
  94 }
  95
  96 static inline uint8_t msi_mask_off(const PCIDevice* dev, bool msi64bit)
  97 {
  98     return dev->msi_cap + (msi64bit ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32);
  99 }
 100
 101 static inline uint8_t msi_pending_off(const PCIDevice* dev, bool msi64bit)
 102 {
 103     return dev->msi_cap + (msi64bit ? PCI_MSI_PENDING_64 : PCI_MSI_PENDING_32);
 104 }
 105
 106 bool msi_enabled(const PCIDevice *dev)
 107 {
 108     return msi_present(dev) &&
 109         (pci_get_word(dev->config + msi_flags_off(dev)) &
 110          PCI_MSI_FLAGS_ENABLE);
 111 }
 112
 113 static void kvm_msi_message_from_vector(PCIDevice *dev, unsigned vector,
 114                                         KVMMsiMessage *kmm)
 115 {
 116     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 117     bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
 118     unsigned int nr_vectors = msi_nr_vectors(flags);
 119
 120     kmm->addr_lo = pci_get_long(dev->config + msi_address_lo_off(dev));
 121     if (msi64bit) {
 122         kmm->addr_hi = pci_get_long(dev->config + msi_address_hi_off(dev));
 123     } else {
 124         kmm->addr_hi = 0;
 125     }
 126
 127     kmm->data = pci_get_word(dev->config + msi_data_off(dev, msi64bit));
 128     if (nr_vectors > 1) {
 129         kmm->data &= ~(nr_vectors - 1);
 130         kmm->data |= vector;
 131     }
 132 }
 133
 134 static void kvm_msi_update(PCIDevice *dev)
 135 {
 136     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 137     unsigned int max_vectors = 1 <<
 138         ((flags & PCI_MSI_FLAGS_QMASK) >> (ffs(PCI_MSI_FLAGS_QMASK) - 1));
 139     unsigned int nr_vectors = msi_nr_vectors(flags);
 140     KVMMsiMessage new_entry, *entry;
 141     bool changed = false;
 142     unsigned int vector;
 143     int r;
 144
 145     for (vector = 0; vector < max_vectors; vector++) {
 146         entry = dev->msi_irq_entries + vector;
 147
 148         if (vector >= nr_vectors) {
 149             if (vector < dev->msi_entries_nr) {
 150                 kvm_msi_message_del(entry);
 151                 changed = true;
 152             }
 153         } else if (vector >= dev->msi_entries_nr) {
 154             kvm_msi_message_from_vector(dev, vector, entry);
 155             r = kvm_msi_message_add(entry);
 156             if (r) {
 157                 fprintf(stderr, "%s: kvm_msi_add failed: %s\n", __func__,
 158                         strerror(-r));
 159                 exit(1);
 160             }
 161             changed = true;
 162         } else {
 163             kvm_msi_message_from_vector(dev, vector, &new_entry);
 164             r = kvm_msi_message_update(entry, &new_entry);
 165             if (r < 0) {
 166                 fprintf(stderr, "%s: kvm_update_msi failed: %s\n",
 167                         __func__, strerror(-r));
 168                 exit(1);
 169             }
 170             if (r > 0) {
 171                 *entry = new_entry;
 172                 changed = true;
 173             }
 174         }
 175     }
 176     dev->msi_entries_nr = nr_vectors;
 177     if (changed) {
 178         r = kvm_commit_irq_routes();
 179         if (r) {
 180             fprintf(stderr, "%s: kvm_commit_irq_routes failed: %s\n", __func__,
 181                     strerror(-r));
 182             exit(1);
 183         }
 184     }
 185 }
 186
 187 /* KVM specific MSI helpers */
 188 static void kvm_msi_free(PCIDevice *dev)
 189 {
 190     unsigned int vector;
 191
 192     for (vector = 0; vector < dev->msi_entries_nr; ++vector) {
 193         kvm_msi_message_del(&dev->msi_irq_entries[vector]);
 194     }
 195     if (dev->msi_entries_nr > 0) {
 196         kvm_commit_irq_routes();
 197     }
 198     dev->msi_entries_nr = 0;
 199 }
 200
 201 int msi_init(struct PCIDevice *dev, uint8_t offset,
 202              unsigned int nr_vectors, bool msi64bit, bool msi_per_vector_mask)
 203 {
 204     unsigned int vectors_order;
 205     uint16_t flags;
 206     uint8_t cap_size;
 207     int config_offset;
 208     MSI_DEV_PRINTF(dev,
 209                    "init offset: 0x%"PRIx8" vector: %"PRId8
 210                    " 64bit %d mask %d\n",
 211                    offset, nr_vectors, msi64bit, msi_per_vector_mask);
 212
 213     if (kvm_enabled() && kvm_irqchip_in_kernel() && !kvm_has_gsi_routing()) {
 214         return -ENOTSUP;
 215     }
 216
 217     assert(!(nr_vectors & (nr_vectors - 1)));   /* power of 2 */
 218     assert(nr_vectors > 0);
 219     assert(nr_vectors <= PCI_MSI_VECTORS_MAX);
 220     /* the nr of MSI vectors is up to 32 */
 221     vectors_order = ffs(nr_vectors) - 1;
 222
 223     flags = vectors_order << (ffs(PCI_MSI_FLAGS_QMASK) - 1);
 224     if (msi64bit) {
 225         flags |= PCI_MSI_FLAGS_64BIT;
 226     }
 227     if (msi_per_vector_mask) {
 228         flags |= PCI_MSI_FLAGS_MASKBIT;
 229     }
 230
 231     cap_size = msi_cap_sizeof(flags);
 232     config_offset = pci_add_capability(dev, PCI_CAP_ID_MSI, offset, cap_size);
 233     if (config_offset < 0) {
 234         return config_offset;
 235     }
 236
 237     dev->msi_cap = config_offset;
 238     dev->cap_present |= QEMU_PCI_CAP_MSI;
 239
 240     pci_set_word(dev->config + msi_flags_off(dev), flags);
 241     pci_set_word(dev->wmask + msi_flags_off(dev),
 242                  PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE);
 243     pci_set_long(dev->wmask + msi_address_lo_off(dev),
 244                  PCI_MSI_ADDRESS_LO_MASK);
 245     if (msi64bit) {
 246         pci_set_long(dev->wmask + msi_address_hi_off(dev), 0xffffffff);
 247     }
 248     pci_set_word(dev->wmask + msi_data_off(dev, msi64bit), 0xffff);
 249
 250     if (msi_per_vector_mask) {
 251         /* Make mask bits 0 to nr_vectors - 1 writable. */
 252         pci_set_long(dev->wmask + msi_mask_off(dev, msi64bit),
 253                      0xffffffff >> (PCI_MSI_VECTORS_MAX - nr_vectors));
 254     }
 255
 256     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 257         dev->msi_irq_entries = qemu_malloc(nr_vectors *
 258                                            sizeof(*dev->msix_irq_entries));
 259     }
 260
 261     return config_offset;
 262 }
 263
 264 void msi_uninit(struct PCIDevice *dev)
 265 {
 266     uint16_t flags;
 267     uint8_t cap_size;
 268
 269     if (!(dev->cap_present & QEMU_PCI_CAP_MSI)) {
 270         return;
 271     }
 272     flags = pci_get_word(dev->config + msi_flags_off(dev));
 273     cap_size = msi_cap_sizeof(flags);
 274
 275     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 276         kvm_msi_free(dev);
 277         qemu_free(dev->msi_irq_entries);
 278     }
 279
 280     pci_del_capability(dev, PCI_CAP_ID_MSI, cap_size);
 281     dev->cap_present &= ~QEMU_PCI_CAP_MSI;
 282
 283     MSI_DEV_PRINTF(dev, "uninit\n");
 284 }
 285
 286 void msi_reset(PCIDevice *dev)
 287 {
 288     uint16_t flags;
 289     bool msi64bit;
 290
 291     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 292         kvm_msi_free(dev);
 293     }
 294
 295     flags = pci_get_word(dev->config + msi_flags_off(dev));
 296     flags &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE);
 297     msi64bit = flags & PCI_MSI_FLAGS_64BIT;
 298
 299     pci_set_word(dev->config + msi_flags_off(dev), flags);
 300     pci_set_long(dev->config + msi_address_lo_off(dev), 0);
 301     if (msi64bit) {
 302         pci_set_long(dev->config + msi_address_hi_off(dev), 0);
 303     }
 304     pci_set_word(dev->config + msi_data_off(dev, msi64bit), 0);
 305     if (flags & PCI_MSI_FLAGS_MASKBIT) {
 306         pci_set_long(dev->config + msi_mask_off(dev, msi64bit), 0);
 307         pci_set_long(dev->config + msi_pending_off(dev, msi64bit), 0);
 308     }
 309     MSI_DEV_PRINTF(dev, "reset\n");
 310 }
 311
 312 static bool msi_is_masked(const PCIDevice *dev, unsigned int vector)
 313 {
 314     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 315     uint32_t mask;
 316     assert(vector < PCI_MSI_VECTORS_MAX);
 317
 318     if (!(flags & PCI_MSI_FLAGS_MASKBIT)) {
 319         return false;
 320     }
 321
 322     mask = pci_get_long(dev->config +
 323                         msi_mask_off(dev, flags & PCI_MSI_FLAGS_64BIT));
 324     return mask & (1U << vector);
 325 }
 326
 327 void msi_notify(PCIDevice *dev, unsigned int vector)
 328 {
 329     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 330     bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
 331     unsigned int nr_vectors = msi_nr_vectors(flags);
 332     uint64_t address;
 333     uint32_t data;
 334
 335     assert(vector < nr_vectors);
 336     if (msi_is_masked(dev, vector)) {
 337         assert(flags & PCI_MSI_FLAGS_MASKBIT);
 338         pci_long_test_and_set_mask(
 339             dev->config + msi_pending_off(dev, msi64bit), 1U << vector);
 340         MSI_DEV_PRINTF(dev, "pending vector 0x%x\n", vector);
 341         return;
 342     }
 343
 344     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 345         kvm_set_irq(dev->msi_irq_entries[vector].gsi, 1, NULL);
 346         return;
 347     }
 348
 349     if (msi64bit) {
 350         address = pci_get_quad(dev->config + msi_address_lo_off(dev));
 351     } else {
 352         address = pci_get_long(dev->config + msi_address_lo_off(dev));
 353     }
 354
 355     /* upper bit 31:16 is zero */
 356     data = pci_get_word(dev->config + msi_data_off(dev, msi64bit));
 357     if (nr_vectors > 1) {
 358         data &= ~(nr_vectors - 1);
 359         data |= vector;
 360     }
 361
 362     MSI_DEV_PRINTF(dev,
 363                    "notify vector 0x%x"
 364                    " address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
 365                    vector, address, data);
 366     stl_phys(address, data);
 367 }
 368
 369 /* call this function after updating configs by pci_default_write_config(). */
 370 void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len)
 371 {
 372     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 373     bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
 374     bool msi_per_vector_mask = flags & PCI_MSI_FLAGS_MASKBIT;
 375     unsigned int nr_vectors;
 376     uint8_t log_num_vecs;
 377     uint8_t log_max_vecs;
 378     unsigned int vector;
 379     uint32_t pending;
 380
 381     if (!ranges_overlap(addr, len, dev->msi_cap, msi_cap_sizeof(flags))) {
 382         return;
 383     }
 384
 385 #ifdef MSI_DEBUG
 386     MSI_DEV_PRINTF(dev, "addr 0x%"PRIx32" val 0x%"PRIx32" len %d\n",
 387                    addr, val, len);
 388     MSI_DEV_PRINTF(dev, "ctrl: 0x%"PRIx16" address: 0x%"PRIx32,
 389                    flags,
 390                    pci_get_long(dev->config + msi_address_lo_off(dev)));
 391     if (msi64bit) {
 392         fprintf(stderr, " address-hi: 0x%"PRIx32,
 393                 pci_get_long(dev->config + msi_address_hi_off(dev)));
 394     }
 395     fprintf(stderr, " data: 0x%"PRIx16,
 396             pci_get_word(dev->config + msi_data_off(dev, msi64bit)));
 397     if (flags & PCI_MSI_FLAGS_MASKBIT) {
 398         fprintf(stderr, " mask 0x%"PRIx32" pending 0x%"PRIx32,
 399                 pci_get_long(dev->config + msi_mask_off(dev, msi64bit)),
 400                 pci_get_long(dev->config + msi_pending_off(dev, msi64bit)));
 401     }
 402     fprintf(stderr, "\n");
 403 #endif
 404
 405     if (!(flags & PCI_MSI_FLAGS_ENABLE)) {
 406         return;
 407     }
 408
 409     /*
 410      * Now MSI is enabled, clear INTx# interrupts.
 411      * the driver is prohibited from writing enable bit to mask
 412      * a service request. But the guest OS could do this.
 413      * So we just discard the interrupts as moderate fallback.
 414      *
 415      * 6.8.3.3. Enabling Operation
 416      *   While enabled for MSI or MSI-X operation, a function is prohibited
 417      *   from using its INTx# pin (if implemented) to request
 418      *   service (MSI, MSI-X, and INTx# are mutually exclusive).
 419      */
 420     pci_device_deassert_intx(dev);
 421
 422     /*
 423      * nr_vectors might be set bigger than capable. So clamp it.
 424      * This is not legal by spec, so we can do anything we like,
 425      * just don't crash the host
 426      */
 427     log_num_vecs =
 428         (flags & PCI_MSI_FLAGS_QSIZE) >> (ffs(PCI_MSI_FLAGS_QSIZE) - 1);
 429     log_max_vecs =
 430         (flags & PCI_MSI_FLAGS_QMASK) >> (ffs(PCI_MSI_FLAGS_QMASK) - 1);
 431     if (log_num_vecs > log_max_vecs) {
 432         flags &= ~PCI_MSI_FLAGS_QSIZE;
 433         flags |= log_max_vecs << (ffs(PCI_MSI_FLAGS_QSIZE) - 1);
 434         pci_set_word(dev->config + msi_flags_off(dev), flags);
 435     }
 436
 437     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 438         kvm_msi_update(dev);
 439     }
 440
 441     if (!msi_per_vector_mask) {
 442         /* if per vector masking isn't supported,
 443            there is no pending interrupt. */
 444         return;
 445     }
 446
 447     nr_vectors = msi_nr_vectors(flags);
 448
 449     /* This will discard pending interrupts, if any. */
 450     pending = pci_get_long(dev->config + msi_pending_off(dev, msi64bit));
 451     pending &= 0xffffffff >> (PCI_MSI_VECTORS_MAX - nr_vectors);
 452     pci_set_long(dev->config + msi_pending_off(dev, msi64bit), pending);
 453
 454     /* deliver pending interrupts which are unmasked */
 455     for (vector = 0; vector < nr_vectors; ++vector) {
 456         if (msi_is_masked(dev, vector) || !(pending & (1U << vector))) {
 457             continue;
 458         }
 459
 460         pci_long_test_and_clear_mask(
 461             dev->config + msi_pending_off(dev, msi64bit), 1U << vector);
 462         msi_notify(dev, vector);
 463     }
 464 }
 465
 466 unsigned int msi_nr_vectors_allocated(const PCIDevice *dev)
 467 {
 468     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 469     return msi_nr_vectors(flags);
 470 }
 471
 472 void msi_post_load(PCIDevice *dev)
 473 {
 474     uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
 475
 476     if (kvm_enabled() && dev->msi_irq_entries) {
 477         kvm_msi_free(dev);
 478
 479         if (flags & PCI_MSI_FLAGS_ENABLE) {
 480             kvm_msi_update(dev);
 481         }
 482     }
 483 }