4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
17 #include "device_tree.h"
19 #define KERNEL_ARGS_ADDR 0x100
20 #define KERNEL_LOAD_ADDR 0x00010000
21 #define INITRD_LOAD_ADDR 0x00d00000
23 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
24 static uint32_t bootloader
[] = {
25 0xe3a00000, /* mov r0, #0 */
26 0xe59f1004, /* ldr r1, [pc, #4] */
27 0xe59f2004, /* ldr r2, [pc, #4] */
28 0xe59ff004, /* ldr pc, [pc, #4] */
30 0, /* Address of kernel args. Set by integratorcp_init. */
31 0 /* Kernel entry point. Set by integratorcp_init. */
34 /* Handling for secondary CPU boot in a multicore system.
35 * Unlike the uniprocessor/primary CPU boot, this is platform
36 * dependent. The default code here is based on the secondary
37 * CPU boot protocol used on realview/vexpress boards, with
38 * some parameterisation to increase its flexibility.
39 * QEMU platform models for which this code is not appropriate
40 * should override write_secondary_boot and secondary_cpu_reset_hook
43 * This code enables the interrupt controllers for the secondary
44 * CPUs and then puts all the secondary CPUs into a loop waiting
45 * for an interprocessor interrupt and polling a configurable
46 * location for the kernel secondary CPU entry point.
48 static uint32_t smpboot
[] = {
49 0xe59f201c, /* ldr r2, gic_cpu_if */
50 0xe59f001c, /* ldr r0, startaddr */
51 0xe3a01001, /* mov r1, #1 */
52 0xe5821000, /* str r1, [r2] */
54 0xe5901000, /* ldr r1, [r0] */
55 0xe1110001, /* tst r1, r1 */
56 0x0afffffb, /* beq <wfi> */
57 0xe12fff11, /* bx r1 */
58 0, /* gic_cpu_if: base address of GIC CPU interface */
59 0 /* bootreg: Boot register address is held here */
62 static void default_write_secondary(ARMCPU
*cpu
,
63 const struct arm_boot_info
*info
)
66 smpboot
[ARRAY_SIZE(smpboot
) - 1] = info
->smp_bootreg_addr
;
67 smpboot
[ARRAY_SIZE(smpboot
) - 2] = info
->gic_cpu_if_addr
;
68 for (n
= 0; n
< ARRAY_SIZE(smpboot
); n
++) {
69 smpboot
[n
] = tswap32(smpboot
[n
]);
71 rom_add_blob_fixed("smpboot", smpboot
, sizeof(smpboot
),
72 info
->smp_loader_start
);
75 static void default_reset_secondary(ARMCPU
*cpu
,
76 const struct arm_boot_info
*info
)
78 CPUARMState
*env
= &cpu
->env
;
80 stl_phys_notdirty(info
->smp_bootreg_addr
, 0);
81 env
->regs
[15] = info
->smp_loader_start
;
84 #define WRITE_WORD(p, value) do { \
85 stl_phys_notdirty(p, value); \
89 static void set_kernel_args(const struct arm_boot_info
*info
)
91 int initrd_size
= info
->initrd_size
;
92 target_phys_addr_t base
= info
->loader_start
;
95 p
= base
+ KERNEL_ARGS_ADDR
;
98 WRITE_WORD(p
, 0x54410001);
100 WRITE_WORD(p
, 0x1000);
103 /* TODO: handle multiple chips on one ATAG list */
105 WRITE_WORD(p
, 0x54410002);
106 WRITE_WORD(p
, info
->ram_size
);
107 WRITE_WORD(p
, info
->loader_start
);
111 WRITE_WORD(p
, 0x54420005);
112 WRITE_WORD(p
, info
->loader_start
+ INITRD_LOAD_ADDR
);
113 WRITE_WORD(p
, initrd_size
);
115 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
119 cmdline_size
= strlen(info
->kernel_cmdline
);
120 cpu_physical_memory_write(p
+ 8, (void *)info
->kernel_cmdline
,
122 cmdline_size
= (cmdline_size
>> 2) + 1;
123 WRITE_WORD(p
, cmdline_size
+ 2);
124 WRITE_WORD(p
, 0x54410009);
125 p
+= cmdline_size
* 4;
127 if (info
->atag_board
) {
130 uint8_t atag_board_buf
[0x1000];
132 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
133 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
134 WRITE_WORD(p
, 0x414f4d50);
135 cpu_physical_memory_write(p
, atag_board_buf
, atag_board_len
);
143 static void set_kernel_args_old(const struct arm_boot_info
*info
)
145 target_phys_addr_t p
;
147 int initrd_size
= info
->initrd_size
;
148 target_phys_addr_t base
= info
->loader_start
;
150 /* see linux/include/asm-arm/setup.h */
151 p
= base
+ KERNEL_ARGS_ADDR
;
155 WRITE_WORD(p
, info
->ram_size
/ 4096);
158 #define FLAG_READONLY 1
159 #define FLAG_RDLOAD 4
160 #define FLAG_RDPROMPT 8
162 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
164 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
173 /* memc_control_reg */
175 /* unsigned char sounddefault */
176 /* unsigned char adfsdrives */
177 /* unsigned char bytes_per_char_h */
178 /* unsigned char bytes_per_char_v */
180 /* pages_in_bank[4] */
189 WRITE_WORD(p
, info
->loader_start
+ INITRD_LOAD_ADDR
);
193 WRITE_WORD(p
, initrd_size
);
198 /* system_serial_low */
200 /* system_serial_high */
204 /* zero unused fields */
205 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
208 s
= info
->kernel_cmdline
;
210 cpu_physical_memory_write(p
, (void *)s
, strlen(s
) + 1);
216 static int load_dtb(target_phys_addr_t addr
, const struct arm_boot_info
*binfo
)
219 uint32_t *mem_reg_property
;
220 uint32_t mem_reg_propsize
;
224 uint32_t acells
, scells
, hival
;
226 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
228 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
232 fdt
= load_device_tree(filename
, &size
);
234 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
240 acells
= qemu_devtree_getprop_cell(fdt
, "/", "#address-cells");
241 scells
= qemu_devtree_getprop_cell(fdt
, "/", "#size-cells");
242 if (acells
== 0 || scells
== 0) {
243 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
247 mem_reg_propsize
= acells
+ scells
;
248 mem_reg_property
= g_new0(uint32_t, mem_reg_propsize
);
249 mem_reg_property
[acells
- 1] = cpu_to_be32(binfo
->loader_start
);
250 hival
= cpu_to_be32(binfo
->loader_start
>> 32);
252 mem_reg_property
[acells
- 2] = hival
;
253 } else if (hival
!= 0) {
254 fprintf(stderr
, "qemu: dtb file not compatible with "
255 "RAM start address > 4GB\n");
258 mem_reg_property
[acells
+ scells
- 1] = cpu_to_be32(binfo
->ram_size
);
259 hival
= cpu_to_be32(binfo
->ram_size
>> 32);
261 mem_reg_property
[acells
+ scells
- 2] = hival
;
262 } else if (hival
!= 0) {
263 fprintf(stderr
, "qemu: dtb file not compatible with "
268 rc
= qemu_devtree_setprop(fdt
, "/memory", "reg", mem_reg_property
,
269 mem_reg_propsize
* sizeof(uint32_t));
271 fprintf(stderr
, "couldn't set /memory/reg\n");
274 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
275 rc
= qemu_devtree_setprop_string(fdt
, "/chosen", "bootargs",
276 binfo
->kernel_cmdline
);
278 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
282 if (binfo
->initrd_size
) {
283 rc
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
284 binfo
->loader_start
+ INITRD_LOAD_ADDR
);
286 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
289 rc
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
290 binfo
->loader_start
+ INITRD_LOAD_ADDR
+
293 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
297 cpu_physical_memory_write(addr
, fdt
, size
);
302 fprintf(stderr
, "Device tree requested, "
303 "but qemu was compiled without fdt support\n");
308 static void do_cpu_reset(void *opaque
)
310 ARMCPU
*cpu
= opaque
;
311 CPUARMState
*env
= &cpu
->env
;
312 const struct arm_boot_info
*info
= env
->boot_info
;
316 if (!info
->is_linux
) {
317 /* Jump to the entry point. */
318 env
->regs
[15] = info
->entry
& 0xfffffffe;
319 env
->thumb
= info
->entry
& 1;
321 if (env
== first_cpu
) {
322 env
->regs
[15] = info
->loader_start
;
323 if (!info
->dtb_filename
) {
325 set_kernel_args_old(info
);
327 set_kernel_args(info
);
331 info
->secondary_cpu_reset_hook(cpu
, info
);
337 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
339 CPUARMState
*env
= &cpu
->env
;
345 target_phys_addr_t entry
;
347 QemuOpts
*machine_opts
;
349 /* Load the kernel. */
350 if (!info
->kernel_filename
) {
351 fprintf(stderr
, "Kernel image must be specified\n");
355 machine_opts
= qemu_opts_find(qemu_find_opts("machine"), 0);
357 info
->dtb_filename
= qemu_opt_get(machine_opts
, "dtb");
359 info
->dtb_filename
= NULL
;
362 if (!info
->secondary_cpu_reset_hook
) {
363 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
365 if (!info
->write_secondary_boot
) {
366 info
->write_secondary_boot
= default_write_secondary
;
369 if (info
->nb_cpus
== 0)
372 #ifdef TARGET_WORDS_BIGENDIAN
378 /* Assume that raw images are linux kernels, and ELF images are not. */
379 kernel_size
= load_elf(info
->kernel_filename
, NULL
, NULL
, &elf_entry
,
380 NULL
, NULL
, big_endian
, ELF_MACHINE
, 1);
382 if (kernel_size
< 0) {
383 kernel_size
= load_uimage(info
->kernel_filename
, &entry
, NULL
,
386 if (kernel_size
< 0) {
387 entry
= info
->loader_start
+ KERNEL_LOAD_ADDR
;
388 kernel_size
= load_image_targphys(info
->kernel_filename
, entry
,
389 info
->ram_size
- KERNEL_LOAD_ADDR
);
392 if (kernel_size
< 0) {
393 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
394 info
->kernel_filename
);
399 if (info
->initrd_filename
) {
400 initrd_size
= load_image_targphys(info
->initrd_filename
,
405 if (initrd_size
< 0) {
406 fprintf(stderr
, "qemu: could not load initrd '%s'\n",
407 info
->initrd_filename
);
413 info
->initrd_size
= initrd_size
;
415 bootloader
[4] = info
->board_id
;
417 /* for device tree boot, we pass the DTB directly in r2. Otherwise
418 * we point to the kernel args.
420 if (info
->dtb_filename
) {
421 /* Place the DTB after the initrd in memory */
422 target_phys_addr_t dtb_start
= TARGET_PAGE_ALIGN(info
->loader_start
425 if (load_dtb(dtb_start
, info
)) {
428 bootloader
[5] = dtb_start
;
430 bootloader
[5] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
431 if (info
->ram_size
>= (1ULL << 32)) {
432 fprintf(stderr
, "qemu: RAM size must be less than 4GB to boot"
433 " Linux kernel using ATAGS (try passing a device tree"
438 bootloader
[6] = entry
;
439 for (n
= 0; n
< sizeof(bootloader
) / 4; n
++) {
440 bootloader
[n
] = tswap32(bootloader
[n
]);
442 rom_add_blob_fixed("bootloader", bootloader
, sizeof(bootloader
),
444 if (info
->nb_cpus
> 1) {
445 info
->write_secondary_boot(cpu
, info
);
448 info
->is_linux
= is_linux
;
450 for (; env
; env
= env
->next_cpu
) {
451 cpu
= arm_env_get_cpu(env
);
452 env
->boot_info
= info
;
453 qemu_register_reset(do_cpu_reset
, cpu
);