target-arm: Add vexpress class and machine types
[qemu-kvm.git] / hw / net / lance.c
bloba1c49f1b972c8156c198c4faff970522e79bbb1a
1 /*
2 * QEMU AMD PC-Net II (Am79C970A) emulation
4 * Copyright (c) 2004 Antony T Curtis
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 /* This software was written to be compatible with the specification:
26 * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
27 * AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000
31 * On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also
32 * produced as NCR89C100. See
33 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
34 * and
35 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt
38 #include "hw/sysbus.h"
39 #include "net/net.h"
40 #include "qemu/timer.h"
41 #include "qemu/sockets.h"
42 #include "hw/sparc/sun4m.h"
43 #include "pcnet.h"
44 #include "trace.h"
45 #include "sysemu/sysemu.h"
47 #define TYPE_LANCE "lance"
48 #define SYSBUS_PCNET(obj) \
49 OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE)
51 typedef struct {
52 SysBusDevice parent_obj;
54 PCNetState state;
55 } SysBusPCNetState;
57 static void parent_lance_reset(void *opaque, int irq, int level)
59 SysBusPCNetState *d = opaque;
60 if (level)
61 pcnet_h_reset(&d->state);
64 static void lance_mem_write(void *opaque, hwaddr addr,
65 uint64_t val, unsigned size)
67 SysBusPCNetState *d = opaque;
69 trace_lance_mem_writew(addr, val & 0xffff);
70 pcnet_ioport_writew(&d->state, addr, val & 0xffff);
73 static uint64_t lance_mem_read(void *opaque, hwaddr addr,
74 unsigned size)
76 SysBusPCNetState *d = opaque;
77 uint32_t val;
79 val = pcnet_ioport_readw(&d->state, addr);
80 trace_lance_mem_readw(addr, val & 0xffff);
81 return val & 0xffff;
84 static const MemoryRegionOps lance_mem_ops = {
85 .read = lance_mem_read,
86 .write = lance_mem_write,
87 .endianness = DEVICE_NATIVE_ENDIAN,
88 .valid = {
89 .min_access_size = 2,
90 .max_access_size = 2,
94 static void lance_cleanup(NetClientState *nc)
96 PCNetState *d = qemu_get_nic_opaque(nc);
98 pcnet_common_cleanup(d);
101 static NetClientInfo net_lance_info = {
102 .type = NET_CLIENT_OPTIONS_KIND_NIC,
103 .size = sizeof(NICState),
104 .can_receive = pcnet_can_receive,
105 .receive = pcnet_receive,
106 .link_status_changed = pcnet_set_link_status,
107 .cleanup = lance_cleanup,
110 static const VMStateDescription vmstate_lance = {
111 .name = "pcnet",
112 .version_id = 3,
113 .minimum_version_id = 2,
114 .fields = (VMStateField[]) {
115 VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState),
116 VMSTATE_END_OF_LIST()
120 static int lance_init(SysBusDevice *sbd)
122 DeviceState *dev = DEVICE(sbd);
123 SysBusPCNetState *d = SYSBUS_PCNET(dev);
124 PCNetState *s = &d->state;
126 memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d,
127 "lance-mmio", 4);
129 qdev_init_gpio_in(dev, parent_lance_reset, 1);
131 sysbus_init_mmio(sbd, &s->mmio);
133 sysbus_init_irq(sbd, &s->irq);
135 s->phys_mem_read = ledma_memory_read;
136 s->phys_mem_write = ledma_memory_write;
137 return pcnet_common_init(dev, s, &net_lance_info);
140 static void lance_reset(DeviceState *dev)
142 SysBusPCNetState *d = SYSBUS_PCNET(dev);
144 pcnet_h_reset(&d->state);
147 static void lance_instance_init(Object *obj)
149 SysBusPCNetState *d = SYSBUS_PCNET(obj);
150 PCNetState *s = &d->state;
152 device_add_bootindex_property(obj, &s->conf.bootindex,
153 "bootindex", "/ethernet-phy@0",
154 DEVICE(obj), NULL);
157 static Property lance_properties[] = {
158 DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
159 DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
160 DEFINE_PROP_END_OF_LIST(),
163 static void lance_class_init(ObjectClass *klass, void *data)
165 DeviceClass *dc = DEVICE_CLASS(klass);
166 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
168 k->init = lance_init;
169 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
170 dc->fw_name = "ethernet";
171 dc->reset = lance_reset;
172 dc->vmsd = &vmstate_lance;
173 dc->props = lance_properties;
174 /* Reason: pointer property "dma" */
175 dc->cannot_instantiate_with_device_add_yet = true;
178 static const TypeInfo lance_info = {
179 .name = TYPE_LANCE,
180 .parent = TYPE_SYS_BUS_DEVICE,
181 .instance_size = sizeof(SysBusPCNetState),
182 .class_init = lance_class_init,
183 .instance_init = lance_instance_init,
186 static void lance_register_types(void)
188 type_register_static(&lance_info);
191 type_init(lance_register_types)