target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "cpu.h"
  22 #include "exec/memory.h"
  23 #include "qemu/host-utils.h"
  24 #include "helper.h"
  25 #include <string.h>
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #ifdef CONFIG_KVM
  29 #include <linux/kvm.h>
  30 #endif
  31
  32 #if !defined(CONFIG_USER_ONLY)
  33 #include "exec/softmmu_exec.h"
  34 #include "sysemu/sysemu.h"
  35 #endif
  36
  37 /* #define DEBUG_HELPER */
  38 #ifdef DEBUG_HELPER
  39 #define HELPER_LOG(x...) qemu_log(x)
  40 #else
  41 #define HELPER_LOG(x...)
  42 #endif
  43
  44 /* Raise an exception dynamically from a helper function.  */
  45 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  46                                      uintptr_t retaddr)
  47 {
  48     int t;
  49
  50     env->exception_index = EXCP_PGM;
  51     env->int_pgm_code = excp;
  52
  53     /* Use the (ultimate) callers address to find the insn that trapped.  */
  54     cpu_restore_state(env, retaddr);
  55
  56     /* Advance past the insn.  */
  57     t = cpu_ldub_code(env, env->psw.addr);
  58     env->int_pgm_ilen = t = get_ilen(t);
  59     env->psw.addr += 2 * t;
  60
  61     cpu_loop_exit(env);
  62 }
  63
  64 /* Raise an exception statically from a TB.  */
  65 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  66 {
  67     HELPER_LOG("%s: exception %d\n", __func__, excp);
  68     env->exception_index = excp;
  69     cpu_loop_exit(env);
  70 }
  71
  72 #ifndef CONFIG_USER_ONLY
  73 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  74 {
  75     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  76                   env->psw.addr);
  77
  78     if (kvm_enabled()) {
  79 #ifdef CONFIG_KVM
  80         kvm_s390_interrupt(s390_env_get_cpu(env), KVM_S390_PROGRAM_INT, code);
  81 #endif
  82     } else {
  83         env->int_pgm_code = code;
  84         env->int_pgm_ilen = ilen;
  85         env->exception_index = EXCP_PGM;
  86         cpu_loop_exit(env);
  87     }
  88 }
  89
  90 /* SCLP service call */
  91 uint32_t HELPER(servc)(CPUS390XState *env, uint32_t r1, uint64_t r2)
  92 {
  93     int r;
  94
  95     r = sclp_service_call(r1, r2);
  96     if (r < 0) {
  97         program_interrupt(env, -r, 4);
  98         return 0;
  99     }
 100     return r;
 101 }
 102
 103 /* DIAG */
 104 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
 105                       uint64_t code)
 106 {
 107     uint64_t r;
 108
 109     switch (num) {
 110     case 0x500:
 111         /* KVM hypercall */
 112         r = s390_virtio_hypercall(env, mem, code);
 113         break;
 114     case 0x44:
 115         /* yield */
 116         r = 0;
 117         break;
 118     case 0x308:
 119         /* ipl */
 120         r = 0;
 121         break;
 122     default:
 123         r = -1;
 124         break;
 125     }
 126
 127     if (r) {
 128         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 129     }
 130
 131     return r;
 132 }
 133
 134 /* Store CPU ID */
 135 void HELPER(stidp)(CPUS390XState *env, uint64_t a1)
 136 {
 137     cpu_stq_data(env, a1, env->cpu_num);
 138 }
 139
 140 /* Set Prefix */
 141 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 142 {
 143     uint32_t prefix;
 144
 145     prefix = cpu_ldl_data(env, a1);
 146     env->psa = prefix & 0xfffff000;
 147     qemu_log("prefix: %#x\n", prefix);
 148     tlb_flush_page(env, 0);
 149     tlb_flush_page(env, TARGET_PAGE_SIZE);
 150 }
 151
 152 /* Set Clock */
 153 uint32_t HELPER(sck)(uint64_t a1)
 154 {
 155     /* XXX not implemented - is it necessary? */
 156
 157     return 0;
 158 }
 159
 160 static inline uint64_t clock_value(CPUS390XState *env)
 161 {
 162     uint64_t time;
 163
 164     time = env->tod_offset +
 165         time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
 166
 167     return time;
 168 }
 169
 170 /* Store Clock */
 171 uint32_t HELPER(stck)(CPUS390XState *env, uint64_t a1)
 172 {
 173     cpu_stq_data(env, a1, clock_value(env));
 174
 175     return 0;
 176 }
 177
 178 /* Store Clock Extended */
 179 uint32_t HELPER(stcke)(CPUS390XState *env, uint64_t a1)
 180 {
 181     cpu_stb_data(env, a1, 0);
 182     /* basically the same value as stck */
 183     cpu_stq_data(env, a1 + 1, clock_value(env) | env->cpu_num);
 184     /* more fine grained than stck */
 185     cpu_stq_data(env, a1 + 9, 0);
 186     /* XXX programmable fields */
 187     cpu_stw_data(env, a1 + 17, 0);
 188
 189     return 0;
 190 }
 191
 192 /* Set Clock Comparator */
 193 void HELPER(sckc)(CPUS390XState *env, uint64_t a1)
 194 {
 195     uint64_t time = cpu_ldq_data(env, a1);
 196
 197     if (time == -1ULL) {
 198         return;
 199     }
 200
 201     /* difference between now and then */
 202     time -= clock_value(env);
 203     /* nanoseconds */
 204     time = (time * 125) >> 9;
 205
 206     qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
 207 }
 208
 209 /* Store Clock Comparator */
 210 void HELPER(stckc)(CPUS390XState *env, uint64_t a1)
 211 {
 212     /* XXX implement */
 213     cpu_stq_data(env, a1, 0);
 214 }
 215
 216 /* Set CPU Timer */
 217 void HELPER(spt)(CPUS390XState *env, uint64_t a1)
 218 {
 219     uint64_t time = cpu_ldq_data(env, a1);
 220
 221     if (time == -1ULL) {
 222         return;
 223     }
 224
 225     /* nanoseconds */
 226     time = (time * 125) >> 9;
 227
 228     qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
 229 }
 230
 231 /* Store CPU Timer */
 232 void HELPER(stpt)(CPUS390XState *env, uint64_t a1)
 233 {
 234     /* XXX implement */
 235     cpu_stq_data(env, a1, 0);
 236 }
 237
 238 /* Store System Information */
 239 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint32_t r0,
 240                       uint32_t r1)
 241 {
 242     int cc = 0;
 243     int sel1, sel2;
 244
 245     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 246         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 247         /* valid function code, invalid reserved bits */
 248         program_interrupt(env, PGM_SPECIFICATION, 2);
 249     }
 250
 251     sel1 = r0 & STSI_R0_SEL1_MASK;
 252     sel2 = r1 & STSI_R1_SEL2_MASK;
 253
 254     /* XXX: spec exception if sysib is not 4k-aligned */
 255
 256     switch (r0 & STSI_LEVEL_MASK) {
 257     case STSI_LEVEL_1:
 258         if ((sel1 == 1) && (sel2 == 1)) {
 259             /* Basic Machine Configuration */
 260             struct sysib_111 sysib;
 261
 262             memset(&sysib, 0, sizeof(sysib));
 263             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 264             /* same as machine type number in STORE CPU ID */
 265             ebcdic_put(sysib.type, "QEMU", 4);
 266             /* same as model number in STORE CPU ID */
 267             ebcdic_put(sysib.model, "QEMU            ", 16);
 268             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 269             ebcdic_put(sysib.plant, "QEMU", 4);
 270             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 271         } else if ((sel1 == 2) && (sel2 == 1)) {
 272             /* Basic Machine CPU */
 273             struct sysib_121 sysib;
 274
 275             memset(&sysib, 0, sizeof(sysib));
 276             /* XXX make different for different CPUs? */
 277             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 278             ebcdic_put(sysib.plant, "QEMU", 4);
 279             stw_p(&sysib.cpu_addr, env->cpu_num);
 280             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 281         } else if ((sel1 == 2) && (sel2 == 2)) {
 282             /* Basic Machine CPUs */
 283             struct sysib_122 sysib;
 284
 285             memset(&sysib, 0, sizeof(sysib));
 286             stl_p(&sysib.capability, 0x443afc29);
 287             /* XXX change when SMP comes */
 288             stw_p(&sysib.total_cpus, 1);
 289             stw_p(&sysib.active_cpus, 1);
 290             stw_p(&sysib.standby_cpus, 0);
 291             stw_p(&sysib.reserved_cpus, 0);
 292             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 293         } else {
 294             cc = 3;
 295         }
 296         break;
 297     case STSI_LEVEL_2:
 298         {
 299             if ((sel1 == 2) && (sel2 == 1)) {
 300                 /* LPAR CPU */
 301                 struct sysib_221 sysib;
 302
 303                 memset(&sysib, 0, sizeof(sysib));
 304                 /* XXX make different for different CPUs? */
 305                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 306                 ebcdic_put(sysib.plant, "QEMU", 4);
 307                 stw_p(&sysib.cpu_addr, env->cpu_num);
 308                 stw_p(&sysib.cpu_id, 0);
 309                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 310             } else if ((sel1 == 2) && (sel2 == 2)) {
 311                 /* LPAR CPUs */
 312                 struct sysib_222 sysib;
 313
 314                 memset(&sysib, 0, sizeof(sysib));
 315                 stw_p(&sysib.lpar_num, 0);
 316                 sysib.lcpuc = 0;
 317                 /* XXX change when SMP comes */
 318                 stw_p(&sysib.total_cpus, 1);
 319                 stw_p(&sysib.conf_cpus, 1);
 320                 stw_p(&sysib.standby_cpus, 0);
 321                 stw_p(&sysib.reserved_cpus, 0);
 322                 ebcdic_put(sysib.name, "QEMU    ", 8);
 323                 stl_p(&sysib.caf, 1000);
 324                 stw_p(&sysib.dedicated_cpus, 0);
 325                 stw_p(&sysib.shared_cpus, 0);
 326                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 327             } else {
 328                 cc = 3;
 329             }
 330             break;
 331         }
 332     case STSI_LEVEL_3:
 333         {
 334             if ((sel1 == 2) && (sel2 == 2)) {
 335                 /* VM CPUs */
 336                 struct sysib_322 sysib;
 337
 338                 memset(&sysib, 0, sizeof(sysib));
 339                 sysib.count = 1;
 340                 /* XXX change when SMP comes */
 341                 stw_p(&sysib.vm[0].total_cpus, 1);
 342                 stw_p(&sysib.vm[0].conf_cpus, 1);
 343                 stw_p(&sysib.vm[0].standby_cpus, 0);
 344                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 345                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 346                 stl_p(&sysib.vm[0].caf, 1000);
 347                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 348                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 349             } else {
 350                 cc = 3;
 351             }
 352             break;
 353         }
 354     case STSI_LEVEL_CURRENT:
 355         env->regs[0] = STSI_LEVEL_3;
 356         break;
 357     default:
 358         cc = 3;
 359         break;
 360     }
 361
 362     return cc;
 363 }
 364
 365 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 366                       uint64_t cpu_addr)
 367 {
 368     int cc = 0;
 369
 370     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 371                __func__, order_code, r1, cpu_addr);
 372
 373     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 374        as parameter (input). Status (output) is always R1. */
 375
 376     switch (order_code) {
 377     case SIGP_SET_ARCH:
 378         /* switch arch */
 379         break;
 380     case SIGP_SENSE:
 381         /* enumerate CPU status */
 382         if (cpu_addr) {
 383             /* XXX implement when SMP comes */
 384             return 3;
 385         }
 386         env->regs[r1] &= 0xffffffff00000000ULL;
 387         cc = 1;
 388         break;
 389 #if !defined(CONFIG_USER_ONLY)
 390     case SIGP_RESTART:
 391         qemu_system_reset_request();
 392         cpu_loop_exit(env);
 393         break;
 394     case SIGP_STOP:
 395         qemu_system_shutdown_request();
 396         cpu_loop_exit(env);
 397         break;
 398 #endif
 399     default:
 400         /* unknown sigp */
 401         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 402         cc = 3;
 403     }
 404
 405     return cc;
 406 }
 407 #endif