2 * QEMU GRLIB GPTimer Emulator
4 * Copyright (c) 2010-2011 AdaCore
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu-timer.h"
30 #define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */
31 #define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */
33 #define GPTIMER_MAX_TIMERS 8
35 /* GPTimer Config register fields */
36 #define GPTIMER_ENABLE (1 << 0)
37 #define GPTIMER_RESTART (1 << 1)
38 #define GPTIMER_LOAD (1 << 2)
39 #define GPTIMER_INT_ENABLE (1 << 3)
40 #define GPTIMER_INT_PENDING (1 << 4)
41 #define GPTIMER_CHAIN (1 << 5) /* Not supported */
42 #define GPTIMER_DEBUG_HALT (1 << 6) /* Not supported */
44 /* Memory mapped register offsets */
45 #define SCALER_OFFSET 0x00
46 #define SCALER_RELOAD_OFFSET 0x04
47 #define CONFIG_OFFSET 0x08
48 #define COUNTER_OFFSET 0x00
49 #define COUNTER_RELOAD_OFFSET 0x04
50 #define TIMER_BASE 0x10
52 typedef struct GPTimer GPTimer
;
53 typedef struct GPTimerUnit GPTimerUnit
;
57 struct ptimer_state
*ptimer
;
73 uint32_t nr_timers
; /* Number of timers available */
74 uint32_t freq_hz
; /* System frequency */
75 uint32_t irq_line
; /* Base irq line */
85 static void grlib_gptimer_enable(GPTimer
*timer
)
87 assert(timer
!= NULL
);
90 ptimer_stop(timer
->ptimer
);
92 if (!(timer
->config
& GPTIMER_ENABLE
)) {
94 trace_grlib_gptimer_disabled(timer
->id
, timer
->config
);
98 /* ptimer is triggered when the counter reach 0 but GPTimer is triggered at
99 underflow. Set count + 1 to simulate the GPTimer behavior. */
101 trace_grlib_gptimer_enable(timer
->id
, timer
->counter
+ 1);
103 ptimer_set_count(timer
->ptimer
, timer
->counter
+ 1);
104 ptimer_run(timer
->ptimer
, 1);
107 static void grlib_gptimer_restart(GPTimer
*timer
)
109 assert(timer
!= NULL
);
111 trace_grlib_gptimer_restart(timer
->id
, timer
->reload
);
113 timer
->counter
= timer
->reload
;
114 grlib_gptimer_enable(timer
);
117 static void grlib_gptimer_set_scaler(GPTimerUnit
*unit
, uint32_t scaler
)
122 assert(unit
!= NULL
);
125 value
= unit
->freq_hz
/ (scaler
+ 1);
127 value
= unit
->freq_hz
;
130 trace_grlib_gptimer_set_scaler(scaler
, value
);
132 for (i
= 0; i
< unit
->nr_timers
; i
++) {
133 ptimer_set_freq(unit
->timers
[i
].ptimer
, value
);
137 static void grlib_gptimer_hit(void *opaque
)
139 GPTimer
*timer
= opaque
;
140 assert(timer
!= NULL
);
142 trace_grlib_gptimer_hit(timer
->id
);
146 if (timer
->config
& GPTIMER_INT_ENABLE
) {
147 /* Set the pending bit (only unset by write in the config register) */
148 timer
->config
|= GPTIMER_INT_PENDING
;
149 qemu_irq_pulse(timer
->irq
);
152 if (timer
->config
& GPTIMER_RESTART
) {
153 grlib_gptimer_restart(timer
);
157 static uint64_t grlib_gptimer_read(void *opaque
, target_phys_addr_t addr
,
160 GPTimerUnit
*unit
= opaque
;
161 target_phys_addr_t timer_addr
;
170 trace_grlib_gptimer_readl(-1, addr
, unit
->scaler
);
173 case SCALER_RELOAD_OFFSET
:
174 trace_grlib_gptimer_readl(-1, addr
, unit
->reload
);
178 trace_grlib_gptimer_readl(-1, addr
, unit
->config
);
185 timer_addr
= (addr
% TIMER_BASE
);
186 id
= (addr
- TIMER_BASE
) / TIMER_BASE
;
188 if (id
>= 0 && id
< unit
->nr_timers
) {
190 /* GPTimer registers */
191 switch (timer_addr
) {
193 value
= ptimer_get_count(unit
->timers
[id
].ptimer
);
194 trace_grlib_gptimer_readl(id
, addr
, value
);
197 case COUNTER_RELOAD_OFFSET
:
198 value
= unit
->timers
[id
].reload
;
199 trace_grlib_gptimer_readl(id
, addr
, value
);
203 trace_grlib_gptimer_readl(id
, addr
, unit
->timers
[id
].config
);
204 return unit
->timers
[id
].config
;
212 trace_grlib_gptimer_readl(-1, addr
, 0);
216 static void grlib_gptimer_write(void *opaque
, target_phys_addr_t addr
,
217 uint64_t value
, unsigned size
)
219 GPTimerUnit
*unit
= opaque
;
220 target_phys_addr_t timer_addr
;
228 value
&= 0xFFFF; /* clean up the value */
229 unit
->scaler
= value
;
230 trace_grlib_gptimer_writel(-1, addr
, unit
->scaler
);
233 case SCALER_RELOAD_OFFSET
:
234 value
&= 0xFFFF; /* clean up the value */
235 unit
->reload
= value
;
236 trace_grlib_gptimer_writel(-1, addr
, unit
->reload
);
237 grlib_gptimer_set_scaler(unit
, value
);
241 /* Read Only (disable timer freeze not supported) */
242 trace_grlib_gptimer_writel(-1, addr
, 0);
249 timer_addr
= (addr
% TIMER_BASE
);
250 id
= (addr
- TIMER_BASE
) / TIMER_BASE
;
252 if (id
>= 0 && id
< unit
->nr_timers
) {
254 /* GPTimer registers */
255 switch (timer_addr
) {
257 trace_grlib_gptimer_writel(id
, addr
, value
);
258 unit
->timers
[id
].counter
= value
;
259 grlib_gptimer_enable(&unit
->timers
[id
]);
262 case COUNTER_RELOAD_OFFSET
:
263 trace_grlib_gptimer_writel(id
, addr
, value
);
264 unit
->timers
[id
].reload
= value
;
268 trace_grlib_gptimer_writel(id
, addr
, value
);
270 if (value
& GPTIMER_INT_PENDING
) {
271 /* clear pending bit */
272 value
&= ~GPTIMER_INT_PENDING
;
274 /* keep pending bit */
275 value
|= unit
->timers
[id
].config
& GPTIMER_INT_PENDING
;
278 unit
->timers
[id
].config
= value
;
280 /* gptimer_restart calls gptimer_enable, so if "enable" and "load"
281 bits are present, we just have to call restart. */
283 if (value
& GPTIMER_LOAD
) {
284 grlib_gptimer_restart(&unit
->timers
[id
]);
285 } else if (value
& GPTIMER_ENABLE
) {
286 grlib_gptimer_enable(&unit
->timers
[id
]);
289 /* These fields must always be read as 0 */
290 value
&= ~(GPTIMER_LOAD
& GPTIMER_DEBUG_HALT
);
292 unit
->timers
[id
].config
= value
;
301 trace_grlib_gptimer_writel(-1, addr
, value
);
304 static const MemoryRegionOps grlib_gptimer_ops
= {
305 .read
= grlib_gptimer_read
,
306 .write
= grlib_gptimer_write
,
307 .endianness
= DEVICE_NATIVE_ENDIAN
,
309 .min_access_size
= 4,
310 .max_access_size
= 4,
314 static void grlib_gptimer_reset(DeviceState
*d
)
316 GPTimerUnit
*unit
= container_of(d
, GPTimerUnit
, busdev
.qdev
);
319 assert(unit
!= NULL
);
325 unit
->config
= unit
->nr_timers
;
326 unit
->config
|= unit
->irq_line
<< 3;
327 unit
->config
|= 1 << 8; /* separate interrupt */
328 unit
->config
|= 1 << 9; /* Disable timer freeze */
331 for (i
= 0; i
< unit
->nr_timers
; i
++) {
332 GPTimer
*timer
= &unit
->timers
[i
];
337 ptimer_stop(timer
->ptimer
);
338 ptimer_set_count(timer
->ptimer
, 0);
339 ptimer_set_freq(timer
->ptimer
, unit
->freq_hz
);
343 static int grlib_gptimer_init(SysBusDevice
*dev
)
345 GPTimerUnit
*unit
= FROM_SYSBUS(typeof(*unit
), dev
);
348 assert(unit
->nr_timers
> 0);
349 assert(unit
->nr_timers
<= GPTIMER_MAX_TIMERS
);
351 unit
->timers
= g_malloc0(sizeof unit
->timers
[0] * unit
->nr_timers
);
353 for (i
= 0; i
< unit
->nr_timers
; i
++) {
354 GPTimer
*timer
= &unit
->timers
[i
];
357 timer
->bh
= qemu_bh_new(grlib_gptimer_hit
, timer
);
358 timer
->ptimer
= ptimer_init(timer
->bh
);
361 /* One IRQ line for each timer */
362 sysbus_init_irq(dev
, &timer
->irq
);
364 ptimer_set_freq(timer
->ptimer
, unit
->freq_hz
);
367 memory_region_init_io(&unit
->iomem
, &grlib_gptimer_ops
, unit
, "gptimer",
368 UNIT_REG_SIZE
+ GPTIMER_REG_SIZE
* unit
->nr_timers
);
370 sysbus_init_mmio(dev
, &unit
->iomem
);
374 static SysBusDeviceInfo grlib_gptimer_info
= {
375 .init
= grlib_gptimer_init
,
376 .qdev
.name
= "grlib,gptimer",
377 .qdev
.reset
= grlib_gptimer_reset
,
378 .qdev
.size
= sizeof(GPTimerUnit
),
379 .qdev
.props
= (Property
[]) {
380 DEFINE_PROP_UINT32("frequency", GPTimerUnit
, freq_hz
, 40000000),
381 DEFINE_PROP_UINT32("irq-line", GPTimerUnit
, irq_line
, 8),
382 DEFINE_PROP_UINT32("nr-timers", GPTimerUnit
, nr_timers
, 2),
383 DEFINE_PROP_END_OF_LIST()
387 static void grlib_gptimer_register(void)
389 sysbus_register_withprop(&grlib_gptimer_info
);
392 device_init(grlib_gptimer_register
)