hw/mips_fulong2e.c

   1 /*
   2  * QEMU fulong 2e mini pc support
   3  *
   4  * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
   5  * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
   6  * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 /*
  14  * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  15  * http://www.linux-mips.org/wiki/Fulong
  16  *
  17  * Loongson 2e user manual:
  18  * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
  19  */
  20
  21 #include "hw.h"
  22 #include "pc.h"
  23 #include "fdc.h"
  24 #include "net.h"
  25 #include "boards.h"
  26 #include "smbus.h"
  27 #include "block.h"
  28 #include "flash.h"
  29 #include "mips.h"
  30 #include "mips_cpudevs.h"
  31 #include "pci.h"
  32 #include "qemu-char.h"
  33 #include "sysemu.h"
  34 #include "audio/audio.h"
  35 #include "qemu-log.h"
  36 #include "loader.h"
  37 #include "mips-bios.h"
  38 #include "ide.h"
  39 #include "elf.h"
  40 #include "vt82c686.h"
  41 #include "mc146818rtc.h"
  42 #include "i8254.h"
  43 #include "blockdev.h"
  44 #include "exec-memory.h"
  45
  46 #define DEBUG_FULONG2E_INIT
  47
  48 #define ENVP_ADDR       0x80002000l
  49 #define ENVP_NB_ENTRIES         16
  50 #define ENVP_ENTRY_SIZE         256
  51
  52 #define MAX_IDE_BUS 2
  53
  54 /*
  55  * PMON is not part of qemu and released with BSD license, anyone
  56  * who want to build a pmon binary please first git-clone the source
  57  * from the git repository at:
  58  * http://www.loongson.cn/support/git/pmon
  59  * Then follow the "Compile Guide" available at:
  60  * http://dev.lemote.com/code/pmon
  61  *
  62  * Notes:
  63  * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
  64  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  65  * in the "Compile Guide".
  66  */
  67 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
  68
  69 /* PCI SLOT in fulong 2e */
  70 #define FULONG2E_VIA_SLOT        5
  71 #define FULONG2E_ATI_SLOT        6
  72 #define FULONG2E_RTL8139_SLOT    7
  73
  74 static ISADevice *pit;
  75
  76 static struct _loaderparams {
  77     int ram_size;
  78     const char *kernel_filename;
  79     const char *kernel_cmdline;
  80     const char *initrd_filename;
  81 } loaderparams;
  82
  83 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
  84                                         const char *string, ...)
  85 {
  86     va_list ap;
  87     int32_t table_addr;
  88
  89     if (index >= ENVP_NB_ENTRIES)
  90         return;
  91
  92     if (string == NULL) {
  93         prom_buf[index] = 0;
  94         return;
  95     }
  96
  97     table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
  98     prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
  99
 100     va_start(ap, string);
 101     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
 102     va_end(ap);
 103 }
 104
 105 static int64_t load_kernel (CPUMIPSState *env)
 106 {
 107     int64_t kernel_entry, kernel_low, kernel_high;
 108     int index = 0;
 109     long initrd_size;
 110     ram_addr_t initrd_offset;
 111     uint32_t *prom_buf;
 112     long prom_size;
 113
 114     if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
 115                  (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
 116                  (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
 117         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 118                 loaderparams.kernel_filename);
 119         exit(1);
 120     }
 121
 122     /* load initrd */
 123     initrd_size = 0;
 124     initrd_offset = 0;
 125     if (loaderparams.initrd_filename) {
 126         initrd_size = get_image_size (loaderparams.initrd_filename);
 127         if (initrd_size > 0) {
 128             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 129             if (initrd_offset + initrd_size > ram_size) {
 130                 fprintf(stderr,
 131                         "qemu: memory too small for initial ram disk '%s'\n",
 132                         loaderparams.initrd_filename);
 133                 exit(1);
 134             }
 135             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 136                                      initrd_offset, ram_size - initrd_offset);
 137         }
 138         if (initrd_size == (target_ulong) -1) {
 139             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 140                     loaderparams.initrd_filename);
 141             exit(1);
 142         }
 143     }
 144
 145     /* Setup prom parameters. */
 146     prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
 147     prom_buf = g_malloc(prom_size);
 148
 149     prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
 150     if (initrd_size > 0) {
 151         prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 152                  cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
 153                  loaderparams.kernel_cmdline);
 154     } else {
 155         prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
 156     }
 157
 158     /* Setup minimum environment variables */
 159     prom_set(prom_buf, index++, "busclock=33000000");
 160     prom_set(prom_buf, index++, "cpuclock=100000000");
 161     prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
 162     prom_set(prom_buf, index++, "modetty0=38400n8r");
 163     prom_set(prom_buf, index++, NULL);
 164
 165     rom_add_blob_fixed("prom", prom_buf, prom_size,
 166                        cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
 167
 168     return kernel_entry;
 169 }
 170
 171 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
 172 {
 173     uint32_t *p;
 174
 175     /* Small bootloader */
 176     p = (uint32_t *) base;
 177
 178     stl_raw(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
 179     stl_raw(p++, 0x00000000);                                      /* nop */
 180
 181     /* Second part of the bootloader */
 182     p = (uint32_t *) (base + 0x040);
 183
 184     stl_raw(p++, 0x3c040000);                                      /* lui a0, 0 */
 185     stl_raw(p++, 0x34840002);                                      /* ori a0, a0, 2 */
 186     stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
 187     stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
 188     stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
 189     stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
 190     stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
 191     stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
 192     stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
 193     stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
 194     stl_raw(p++, 0x03e00008);                                      /* jr ra */
 195     stl_raw(p++, 0x00000000);                                      /* nop */
 196 }
 197
 198
 199 static void main_cpu_reset(void *opaque)
 200 {
 201     MIPSCPU *cpu = opaque;
 202     CPUMIPSState *env = &cpu->env;
 203
 204     cpu_reset(CPU(cpu));
 205     /* TODO: 2E reset stuff */
 206     if (loaderparams.kernel_filename) {
 207         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
 208     }
 209 }
 210
 211 uint8_t eeprom_spd[0x80] = {
 212     0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
 213     0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
 214     0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
 215     0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
 216     0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
 217     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 218     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 219     0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
 220     0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
 221     0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
 222     0x20,0x30,0x20
 223 };
 224
 225 /* Audio support */
 226 static void audio_init (PCIBus *pci_bus)
 227 {
 228     vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
 229     vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
 230 }
 231
 232 /* Network support */
 233 static void network_init (void)
 234 {
 235     int i;
 236
 237     for(i = 0; i < nb_nics; i++) {
 238         NICInfo *nd = &nd_table[i];
 239         const char *default_devaddr = NULL;
 240
 241         if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
 242             /* The fulong board has a RTL8139 card using PCI SLOT 7 */
 243             default_devaddr = "07";
 244         }
 245
 246         pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
 247     }
 248 }
 249
 250 static void cpu_request_exit(void *opaque, int irq, int level)
 251 {
 252     CPUMIPSState *env = cpu_single_env;
 253
 254     if (env && level) {
 255         cpu_exit(env);
 256     }
 257 }
 258
 259 static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
 260                         const char *kernel_filename, const char *kernel_cmdline,
 261                         const char *initrd_filename, const char *cpu_model)
 262 {
 263     char *filename;
 264     MemoryRegion *address_space_mem = get_system_memory();
 265     MemoryRegion *ram = g_new(MemoryRegion, 1);
 266     MemoryRegion *bios = g_new(MemoryRegion, 1);
 267     long bios_size;
 268     int64_t kernel_entry;
 269     qemu_irq *i8259;
 270     qemu_irq *cpu_exit_irq;
 271     PCIBus *pci_bus;
 272     ISABus *isa_bus;
 273     i2c_bus *smbus;
 274     int i;
 275     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 276     MIPSCPU *cpu;
 277     CPUMIPSState *env;
 278
 279     /* init CPUs */
 280     if (cpu_model == NULL) {
 281         cpu_model = "Loongson-2E";
 282     }
 283     cpu = cpu_mips_init(cpu_model);
 284     if (cpu == NULL) {
 285         fprintf(stderr, "Unable to find CPU definition\n");
 286         exit(1);
 287     }
 288     env = &cpu->env;
 289
 290     qemu_register_reset(main_cpu_reset, cpu);
 291
 292     /* fulong 2e has 256M ram. */
 293     ram_size = 256 * 1024 * 1024;
 294
 295     /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
 296     bios_size = 1024 * 1024;
 297
 298     /* allocate RAM */
 299     memory_region_init_ram(ram, "fulong2e.ram", ram_size);
 300     vmstate_register_ram_global(ram);
 301     memory_region_init_ram(bios, "fulong2e.bios", bios_size);
 302     vmstate_register_ram_global(bios);
 303     memory_region_set_readonly(bios, true);
 304
 305     memory_region_add_subregion(address_space_mem, 0, ram);
 306     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
 307
 308     /* We do not support flash operation, just loading pmon.bin as raw BIOS.
 309      * Please use -L to set the BIOS path and -bios to set bios name. */
 310
 311     if (kernel_filename) {
 312         loaderparams.ram_size = ram_size;
 313         loaderparams.kernel_filename = kernel_filename;
 314         loaderparams.kernel_cmdline = kernel_cmdline;
 315         loaderparams.initrd_filename = initrd_filename;
 316         kernel_entry = load_kernel (env);
 317         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
 318     } else {
 319         if (bios_name == NULL) {
 320                 bios_name = FULONG_BIOSNAME;
 321         }
 322         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 323         if (filename) {
 324             bios_size = load_image_targphys(filename, 0x1fc00000LL,
 325                                             BIOS_SIZE);
 326             g_free(filename);
 327         } else {
 328             bios_size = -1;
 329         }
 330
 331         if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
 332             fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
 333             exit(1);
 334         }
 335     }
 336
 337     /* Init internal devices */
 338     cpu_mips_irq_init_cpu(env);
 339     cpu_mips_clock_init(env);
 340
 341     /* North bridge, Bonito --> IP2 */
 342     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 343
 344     /* South bridge */
 345     ide_drive_get(hd, MAX_IDE_BUS);
 346
 347     isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
 348     if (!isa_bus) {
 349         fprintf(stderr, "vt82c686b_init error\n");
 350         exit(1);
 351     }
 352
 353     /* Interrupt controller */
 354     /* The 8259 -> IP5  */
 355     i8259 = i8259_init(isa_bus, env->irq[5]);
 356     isa_bus_irqs(isa_bus, i8259);
 357
 358     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
 359     pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
 360                       "vt82c686b-usb-uhci");
 361     pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
 362                       "vt82c686b-usb-uhci");
 363
 364     smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
 365                               0xeee1, NULL);
 366     /* TODO: Populate SPD eeprom data.  */
 367     smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
 368
 369     /* init other devices */
 370     pit = pit_init(isa_bus, 0x40, 0, NULL);
 371     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 372     DMA_init(0, cpu_exit_irq);
 373
 374     /* Super I/O */
 375     isa_create_simple(isa_bus, "i8042");
 376
 377     rtc_init(isa_bus, 2000, NULL);
 378
 379     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 380         if (serial_hds[i]) {
 381             serial_isa_init(isa_bus, i, serial_hds[i]);
 382         }
 383     }
 384
 385     if (parallel_hds[0]) {
 386         parallel_init(isa_bus, 0, parallel_hds[0]);
 387     }
 388
 389     /* Sound card */
 390     audio_init(pci_bus);
 391     /* Network card */
 392     network_init();
 393 }
 394
 395 QEMUMachine mips_fulong2e_machine = {
 396     .name = "fulong2e",
 397     .desc = "Fulong 2e mini pc",
 398     .init = mips_fulong2e_init,
 399 };
 400
 401 static void mips_fulong2e_machine_init(void)
 402 {
 403     qemu_register_machine(&mips_fulong2e_machine);
 404 }
 405
 406 machine_init(mips_fulong2e_machine_init);