2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012 Ecole Normale Superieure
5 * Use of this software is governed by the GNU LGPLv2.1 license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
16 #include <isl/polynomial.h>
17 #include <isl/union_set.h>
22 #include <isl/schedule.h>
23 #include <isl/options.h>
24 #include <isl/ast_build.h>
28 #include "ppcg_options.h"
30 /* The fields stride, shift and shift_map only contain valid information
32 * If so, they express that current index is such that if you add shift,
33 * then the result is always a multiple of stride.
34 * shift_map contains the mapping
36 * i -> (i + shift)/stride
38 * Let D represent the initial shared_len dimensions of the computed schedule.
39 * The spaces of "lb" and "shift" are of the form
43 * "shift_map" is of the form
45 * [D -> i] -> [D -> (i + shift(D))/stride]
47 struct gpu_array_bound
{
53 isl_basic_map
*shift_map
;
56 struct gpu_array_info
;
58 /* A group of array references in a kernel that should be handled together.
59 * If private_bound is not NULL, then it is mapped to registers.
60 * Otherwise, if shared_bound is not NULL, it is mapped to shared memory.
61 * Otherwise, it is accessed from global memory.
63 struct gpu_array_ref_group
{
64 /* The references in this group access this array. */
65 struct gpu_array_info
*array
;
66 /* Position of this group in the list of reference groups of array. */
69 /* The following fields are use during the construction of the groups.
70 * access is the combined access relation relative to the shared
71 * memory tiling. In particular, the domain of the map corresponds
72 * to the first shared_len dimensions of the computed schedule.
73 * write is set if any access in the group is a write.
78 /* For each index, size and offset of piece in shared memory. */
79 struct gpu_array_bound
*shared_bound
;
81 /* For each index, size and offset of piece in private memory. */
82 struct gpu_array_bound
*private_bound
;
84 /* References in this group; point to elements of a linked list. */
86 struct gpu_stmt_access
**refs
;
88 /* Last shared memory tile dimension that affects tile of this group. */
94 struct ppcg_options
*options
;
96 struct gpu_prog
*prog
;
98 /* tile, grid and block sizes for each kernel */
101 /* Identifier of current kernel. */
103 /* Pointer to the current kernel. */
104 struct ppcg_kernel
*kernel
;
106 /* First tile dimension. */
108 /* Number of tile dimensions. */
110 /* Number of initial parallel loops among tile dimensions. */
113 /* Number of dimensions determining shared memory. */
116 /* Number of rows in the untiled schedule. */
118 /* Number of rows in the tiled schedule. */
120 /* Number of rows in schedule after tiling/wrapping over threads. */
121 int thread_tiled_len
;
123 /* Global untiled schedule. */
124 isl_union_map
*sched
;
125 /* Local (per kernel launch) tiled schedule. */
126 isl_union_map
*tiled_sched
;
127 /* Local schedule per shared memory tile loop iteration. */
128 isl_union_map
*local_sched
;
130 /* Local tiled schedule projected onto the shared tile loops and
131 * the loops that will be wrapped over the threads,
132 * with all shared tile loops parametrized.
134 isl_union_map
*shared_sched
;
135 /* Projects out the loops that will be wrapped over the threads
138 isl_union_map
*shared_proj
;
140 /* A map that takes the range of shared_sched as input,
141 * wraps the appropriate loops over the threads and then projects
144 isl_map
*privatization
;
146 /* A map from the shared memory tile loops and the thread indices
147 * (as parameters) to the set of accessed memory elements that
148 * will be accessed through private copies.
150 isl_union_map
*private_access
;
152 /* The schedule for the current private/shared access
153 * (within print_private_access or print_shared_access).
156 /* The array reference group corresponding to copy_sched. */
157 struct gpu_array_ref_group
*copy_group
;
158 /* copy_group->private_bound or copy_group->shared_bound */
159 struct gpu_array_bound
*copy_bound
;
161 /* First loop to unroll (or -1 if none) in the current part of the
168 /* Note: in the input file, the sizes of the grid and the blocks
169 * are specified in the order x, y, z, but internally, the sizes
170 * are stored in reverse order, so that the last element always
171 * refers to the x dimension.
178 /* Print the name of the local copy of a given group of array references.
180 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
181 struct gpu_array_ref_group
*group
)
185 if (group
->private_bound
)
186 p
= isl_printer_print_str(p
, "private_");
187 else if (group
->shared_bound
)
188 p
= isl_printer_print_str(p
, "shared_");
191 p
= isl_printer_print_str(p
, group
->array
->name
);
192 if (!global
&& group
->array
->n_group
> 1) {
193 p
= isl_printer_print_str(p
, "_");
194 p
= isl_printer_print_int(p
, group
->nr
);
200 /* Collect all references to the given array and store pointers to them
203 static void collect_references(struct gpu_prog
*prog
,
204 struct gpu_array_info
*array
)
210 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
211 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
212 struct gpu_stmt_access
*access
;
214 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
216 name
= isl_map_get_tuple_name(access
->access
,
218 if (name
&& !strcmp(array
->name
, name
))
224 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
228 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
229 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
230 struct gpu_stmt_access
*access
;
232 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
234 name
= isl_map_get_tuple_name(access
->access
,
236 if (!name
|| strcmp(array
->name
, name
))
239 array
->refs
[n
++] = access
;
244 static struct gpu_array_bound
*create_bound_list(isl_ctx
*ctx
, int n_index
)
247 struct gpu_array_bound
*bound
;
249 bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
252 for (i
= 0; i
< n_index
; ++i
) {
253 isl_int_init(bound
[i
].size
);
255 isl_int_init(bound
[i
].stride
);
256 bound
[i
].shift
= NULL
;
257 bound
[i
].shift_map
= NULL
;
263 static void free_bound_list(struct gpu_array_bound
*bound
, int n_index
)
270 for (j
= 0; j
< n_index
; ++j
) {
271 isl_int_clear(bound
[j
].size
);
272 isl_int_clear(bound
[j
].stride
);
273 isl_aff_free(bound
[j
].lb
);
274 isl_aff_free(bound
[j
].shift
);
275 isl_basic_map_free(bound
[j
].shift_map
);
280 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
281 __isl_keep isl_set
*accessed
)
286 id
= isl_set_get_tuple_id(accessed
);
288 for (i
= 0; i
< scop
->n_array
; ++i
) {
291 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
298 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
301 /* Compute bounds on the host arrays based on the accessed elements
302 * and collect all references to the array.
304 * If the array is zero-dimensional, i.e., a scalar, we check
305 * whether it is read-only.
307 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
310 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
314 struct pet_array
*pa
;
316 n_index
= isl_set_dim(array
, isl_dim_set
);
317 name
= isl_set_get_tuple_name(array
);
318 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
319 isl_pw_aff
*, n_index
);
321 prog
->array
[prog
->n_array
].dim
= isl_set_get_space(array
);
322 prog
->array
[prog
->n_array
].name
= strdup(name
);
323 prog
->array
[prog
->n_array
].n_index
= n_index
;
324 prog
->array
[prog
->n_array
].bound
= bounds
;
326 pa
= find_array(prog
->scop
, array
);
329 prog
->array
[prog
->n_array
].type
= strdup(pa
->element_type
);
330 prog
->array
[prog
->n_array
].size
= pa
->element_size
;
334 isl_union_map
*write
;
337 write
= isl_union_map_copy(prog
->write
);
338 space
= isl_set_universe(isl_set_get_space(array
));
339 write
= isl_union_map_intersect_range(write
,
340 isl_union_set_from_set(space
));
341 empty
= isl_union_map_is_empty(write
);
342 isl_union_map_free(write
);
344 prog
->array
[prog
->n_array
].read_only
= empty
;
347 for (i
= 0; i
< n_index
; ++i
) {
352 isl_set
*size
= i
== 0 ? array
: pa
->extent
;
354 bound
= isl_set_dim_max(isl_set_copy(size
), i
);
356 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
357 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
358 one
= isl_aff_zero_on_domain(ls
);
359 one
= isl_aff_add_constant_si(one
, 1);
360 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
361 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
366 collect_references(prog
, &prog
->array
[prog
->n_array
]);
374 void collect_array_info(struct gpu_prog
*prog
)
376 isl_union_set
*arrays
;
378 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
379 arrays
= isl_union_set_union(arrays
,
380 isl_union_map_range(isl_union_map_copy(prog
->write
)));
381 arrays
= isl_union_set_coalesce(arrays
);
383 prog
->n_array
= isl_union_set_n_set(arrays
);
384 prog
->array
= isl_alloc_array(prog
->ctx
,
385 struct gpu_array_info
, prog
->n_array
);
388 isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
389 isl_union_set_free(arrays
);
392 static void free_array_info(struct gpu_prog
*prog
)
396 for (i
= 0; i
< prog
->n_array
; ++i
) {
397 int n_index
= prog
->array
[i
].n_index
;
398 free(prog
->array
[i
].type
);
399 free(prog
->array
[i
].name
);
400 for (j
= 0; j
< n_index
; ++j
)
401 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
402 isl_space_free(prog
->array
[i
].dim
);
403 free(prog
->array
[i
].bound
);
404 free(prog
->array
[i
].refs
);
409 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
410 * as an array or through a pointer reference, but as single data element. At
411 * the moment, scalars are represented as zero dimensional arrays.
413 int gpu_array_is_scalar(struct gpu_array_info
*array
)
415 return (array
->n_index
== 0);
418 /* Is "array" a read-only scalar?
420 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
422 return gpu_array_is_scalar(array
) && array
->read_only
;
425 /* Internal data structure for extract_size_of_type.
426 * "type" specifies the name of the space that we want to extract.
427 * "res" is used to store the subset of that space.
429 struct ppcg_extract_size_data
{
434 /* This function is called for each set in a union_set.
435 * If the name of the set matches data->type, we store the
438 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
440 struct ppcg_extract_size_data
*data
= user
;
443 name
= isl_set_get_tuple_name(size
);
444 if (name
&& !strcmp(name
, data
->type
)) {
453 /* Given a union map { kernel[i] -> *[...] },
454 * return the range in the space called "type" for the kernel with
455 * sequence number "id".
457 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
458 const char *type
, int id
)
462 isl_union_set
*local_sizes
;
463 struct ppcg_extract_size_data data
= { type
, NULL
};
468 space
= isl_union_map_get_space(sizes
);
469 space
= isl_space_set_from_params(space
);
470 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
471 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
472 dom
= isl_set_universe(space
);
473 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
475 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
476 isl_union_map_copy(sizes
));
477 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
478 isl_union_set_free(local_sizes
);
482 /* Given a singleton set, extract the first (at most *len) elements
483 * of the single integer tuple into *sizes and update *len if needed.
485 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
494 dim
= isl_set_dim(set
, isl_dim_set
);
500 for (i
= 0; i
< *len
; ++i
) {
503 ok
= isl_set_plain_is_fixed(set
, isl_dim_set
, i
, &v
);
506 sizes
[i
] = isl_int_get_si(v
);
514 /* Extract user specified "tile" sizes from the "sizes" command line option,
515 * defaulting to option->tile_size in each dimension.
517 static void read_tile_sizes(struct gpu_gen
*gen
)
522 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
523 assert(gen
->tile_size
);
524 for (n
= 0; n
< gen
->tile_len
; ++n
)
525 gen
->tile_size
[n
] = gen
->options
->tile_size
;
527 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
528 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
530 if (gen
->n_parallel
> gen
->tile_len
)
531 gen
->n_parallel
= gen
->tile_len
;
534 /* Extract user specified "block" sizes from the "sizes" command line option,
535 * after filling in some potentially useful defaults.
537 static void read_block_sizes(struct gpu_gen
*gen
)
543 gen
->n_block
= (n
<= 3) ? n
: 3;
544 switch (gen
->n_block
) {
546 gen
->block_dim
[0] = 512;
549 gen
->block_dim
[0] = 32;
550 gen
->block_dim
[1] = 16;
553 gen
->block_dim
[0] = 32;
554 gen
->block_dim
[1] = 4;
555 gen
->block_dim
[2] = 4;
559 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
560 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
563 /* Extract user specified "grid" sizes from the "sizes" command line option,
564 * after filling in some potentially useful defaults.
566 static void read_grid_sizes(struct gpu_gen
*gen
)
568 int n
= gen
->n_parallel
;
571 gen
->n_grid
= (n
<= 2) ? n
: 2;
572 switch (gen
->n_grid
) {
574 gen
->grid_dim
[0] = 32768;
577 gen
->grid_dim
[0] = 256;
578 gen
->grid_dim
[1] = 256;
582 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
583 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
586 /* Extract user specified sizes from the "sizes" command line option
587 * after filling in some potentially useful defaults.
589 static void read_sizes(struct gpu_gen
*gen
)
591 read_tile_sizes(gen
);
592 read_block_sizes(gen
);
593 read_grid_sizes(gen
);
596 static void free_stmts(struct gpu_stmt
*stmts
, int n
)
600 for (i
= 0; i
< n
; ++i
) {
601 struct gpu_stmt_access
*access
, *next
;
603 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
605 isl_map_free(access
->access
);
609 isl_id_free(stmts
[i
].id
);
614 void clear_gpu_gen(struct gpu_gen
*gen
)
616 isl_union_map_free(gen
->sizes
);
617 isl_union_map_free(gen
->sched
);
620 /* Construct a map from a domain of dimensionality "len"
621 * to a domain of dimensionality "len" + "tile_len" that tiles
622 * the "tile_len" coordinates starting at "first".
623 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
624 * "dim" prescribes the parameters.
626 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
627 int first
, int tile_len
, int *tile_size
)
637 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
638 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
639 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
640 ls
= isl_local_space_from_space(dim
);
642 for (i
= 0; i
< len
- tile_len
; ++i
) {
643 int j
= i
< first
? i
: i
+ tile_len
;
644 int k
= i
< first
? i
: i
+ 2 * tile_len
;
646 c
= isl_equality_alloc(isl_local_space_copy(ls
));
647 isl_int_set_si(v
, -1);
648 isl_constraint_set_coefficient(c
, isl_dim_in
, j
, v
);
649 isl_int_set_si(v
, 1);
650 isl_constraint_set_coefficient(c
, isl_dim_out
, k
, v
);
651 bmap
= isl_basic_map_add_constraint(bmap
, c
);
654 for (i
= 0; i
< tile_len
; ++i
) {
655 c
= isl_equality_alloc(isl_local_space_copy(ls
));
656 isl_int_set_si(v
, -1);
657 isl_constraint_set_coefficient(c
, isl_dim_in
, first
+ i
, v
);
658 isl_int_set_si(v
, tile_size
[i
]);
659 isl_constraint_set_coefficient(c
, isl_dim_out
, first
+ i
, v
);
660 isl_int_set_si(v
, 1);
661 isl_constraint_set_coefficient(c
, isl_dim_out
,
662 first
+ i
+ tile_len
, v
);
663 bmap
= isl_basic_map_add_constraint(bmap
, c
);
665 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
666 isl_int_set_si(v
, 1);
667 isl_constraint_set_coefficient(c
, isl_dim_out
,
668 first
+ i
+ tile_len
, v
);
669 bmap
= isl_basic_map_add_constraint(bmap
, c
);
671 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
672 isl_int_set_si(v
, -1);
673 isl_constraint_set_coefficient(c
, isl_dim_out
,
674 first
+ i
+ tile_len
, v
);
675 isl_int_set_si(v
, tile_size
[i
] - 1);
676 isl_constraint_set_constant(c
, v
);
677 bmap
= isl_basic_map_add_constraint(bmap
, c
);
680 isl_local_space_free(ls
);
683 return isl_map_from_basic_map(bmap
);
686 /* Construct a map from a domain of dimensionality "len"
687 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
688 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
689 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
690 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
691 * that are projected out at the end.
692 * "dim" prescribes the parameters.
694 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
695 int first
, int wrap_len
, int *wrap_size
)
702 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
703 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
704 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
705 ls
= isl_local_space_from_space(dim
);
707 for (i
= 0; i
< len
; ++i
) {
708 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
710 c
= isl_equality_alloc(isl_local_space_copy(ls
));
711 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
712 isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
713 bmap
= isl_basic_map_add_constraint(bmap
, c
);
716 for (i
= 0; i
< wrap_len
; ++i
) {
717 c
= isl_equality_alloc(isl_local_space_copy(ls
));
718 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
720 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
721 first
+ wrap_len
+ i
, 1);
722 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
723 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
724 bmap
= isl_basic_map_add_constraint(bmap
, c
);
726 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
727 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
728 first
+ wrap_len
+ i
, 1);
729 bmap
= isl_basic_map_add_constraint(bmap
, c
);
731 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
732 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
733 first
+ wrap_len
+ i
, -1);
734 isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
735 bmap
= isl_basic_map_add_constraint(bmap
, c
);
738 isl_local_space_free(ls
);
740 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
741 first
+ 2 * wrap_len
, wrap_len
);
743 return isl_map_from_basic_map(bmap
);
746 /* Add "n" parameters named prefix%d.
748 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
749 int n
, const char *prefix
)
755 nparam
= isl_set_dim(set
, isl_dim_param
);
756 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
758 for (i
= 0; i
< n
; ++i
) {
759 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
760 set
= isl_set_set_dim_name(set
, isl_dim_param
,
767 /* Equate the "n" dimensions of "set" starting at "first" to
768 * freshly created parameters named prefix%d.
770 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
771 int first
, int n
, const char *prefix
)
781 nparam
= isl_set_dim(set
, isl_dim_param
);
783 set
= add_params(set
, n
, prefix
);
785 dim
= isl_set_get_space(set
);
786 bset
= isl_basic_set_universe(isl_space_copy(dim
));
787 ls
= isl_local_space_from_space(dim
);
791 for (i
= 0; i
< n
; ++i
) {
792 c
= isl_equality_alloc(isl_local_space_copy(ls
));
793 isl_int_set_si(v
, -1);
794 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
795 isl_int_set_si(v
, 1);
796 isl_constraint_set_coefficient(c
, isl_dim_set
, first
+ i
, v
);
797 bset
= isl_basic_set_add_constraint(bset
, c
);
801 isl_local_space_free(ls
);
803 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
806 /* Given a parameter space "space", create a set of dimension "len"
807 * of which the "n" dimensions starting at "first" are equated to
808 * freshly created parameters named prefix%d.
810 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
811 int len
, int first
, int n
, const char *prefix
)
815 space
= isl_space_set_from_params(space
);
816 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
817 set
= isl_set_universe(space
);
819 return parametrize(set
, first
, n
, prefix
);
822 /* Tile the B loops over the tile sizes and then tile/wrap
823 * the T1 loops over the blocks.
825 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
826 __isl_take isl_union_map
*sched
)
829 isl_map
*tiling
, *block_tiling
;
831 dim
= isl_union_map_get_space(sched
);
832 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
833 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
835 if (gen
->options
->wrap
)
836 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
837 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
839 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
840 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
842 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
844 tiling
= isl_map_apply_range(tiling
, block_tiling
);
846 sched
= isl_union_map_apply_range(sched
,
847 isl_union_map_from_map(tiling
));
849 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
854 /* Equate the "T1P" iterators in the tiled schedule "sched"
855 * to the block dimensions.
857 static __isl_give isl_union_map
*parametrize_tiled_schedule(
858 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
863 dim
= isl_union_map_get_space(sched
);
864 par
= parametrization(dim
, gen
->tiled_len
,
865 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
866 sched
= isl_union_map_intersect_range(sched
,
867 isl_union_set_from_set(par
));
872 /* Tile/wrap the P1 loops over the threads.
874 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
875 __isl_take isl_union_map
*sched
)
881 dim
= isl_union_map_get_space(sched
);
883 if (gen
->options
->wrap
)
884 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
885 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
887 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
888 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
889 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
891 sched
= isl_union_map_apply_range(sched
,
892 isl_union_map_from_map(tiling
));
894 par
= parametrization(dim
, gen
->thread_tiled_len
,
895 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
897 sched
= isl_union_map_intersect_range(sched
,
898 isl_union_set_from_set(par
));
900 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
905 /* If the user asked for it, scale the shared memory tile loops
906 * (T1T and T2) of "sched" by gen->tile_size[i].
907 * If we are not performing "wrapping", then additionally scale the T1P
908 * loops by gen->grid_dim[i].
910 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
911 __isl_take isl_union_map
*sched
)
915 isl_basic_map
*scale
;
919 if (!gen
->options
->scale_tile_loops
)
922 dim
= isl_union_map_get_space(sched
);
923 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
924 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
925 scale
= isl_basic_map_universe(isl_space_copy(dim
));
926 ls
= isl_local_space_from_space(dim
);
928 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
931 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
932 f
= gen
->tile_size
[i
- gen
->tile_first
];
933 if (!gen
->options
->wrap
)
934 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
935 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
936 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
937 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
940 c
= isl_equality_alloc(isl_local_space_copy(ls
));
941 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
942 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
943 scale
= isl_basic_map_add_constraint(scale
, c
);
946 isl_local_space_free(ls
);
948 sched
= isl_union_map_apply_range(sched
,
949 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
954 /* If we are not performing "wrapping" and if the user asked for it,
955 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
957 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
958 __isl_take isl_union_map
*sched
)
962 isl_basic_map
*scale
;
966 if (gen
->options
->wrap
)
968 if (!gen
->options
->scale_tile_loops
)
971 dim
= isl_union_map_get_space(sched
);
972 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
973 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
974 scale
= isl_basic_map_universe(isl_space_copy(dim
));
975 ls
= isl_local_space_from_space(dim
);
977 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
980 if (i
>= gen
->shared_len
&&
981 i
< gen
->shared_len
+ gen
->n_block
)
982 f
= gen
->block_dim
[i
- gen
->shared_len
];
984 c
= isl_equality_alloc(isl_local_space_copy(ls
));
985 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
986 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
987 scale
= isl_basic_map_add_constraint(scale
, c
);
990 isl_local_space_free(ls
);
992 sched
= isl_union_map_apply_range(sched
,
993 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
998 /* If we are not performing "wrapping" and if the user asked for it,
999 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1001 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1002 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1006 isl_basic_map
*scale
;
1008 isl_local_space
*ls
;
1010 if (gen
->options
->wrap
)
1012 if (!gen
->options
->scale_tile_loops
)
1015 dim
= isl_union_map_get_space(sched
);
1016 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1017 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1018 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1019 ls
= isl_local_space_from_space(dim
);
1021 for (i
= 0; i
< len
; ++i
) {
1024 if (i
>= first
&& i
< first
+ n_tile
)
1025 f
= gen
->block_dim
[i
- first
];
1027 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1028 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1029 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1030 scale
= isl_basic_map_add_constraint(scale
, c
);
1033 isl_local_space_free(ls
);
1035 sched
= isl_union_map_apply_range(sched
,
1036 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1041 /* Add "len" parameters p[i] called prefix%d,
1042 * with bounds to 0 <= p[i] < size[i].
1044 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1045 int len
, int *size
, const char *prefix
)
1051 isl_basic_set
*bset
;
1053 isl_local_space
*ls
;
1056 nparam
= isl_set_dim(set
, isl_dim_param
);
1057 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1059 for (i
= 0; i
< len
; ++i
) {
1060 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1061 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1065 dim
= isl_set_get_space(set
);
1066 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1067 ls
= isl_local_space_from_space(dim
);
1071 for (i
= 0; i
< len
; ++i
) {
1072 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1073 isl_int_set_si(v
, 1);
1074 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1075 bset
= isl_basic_set_add_constraint(bset
, c
);
1077 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1078 isl_int_set_si(v
, -1);
1079 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1080 isl_int_set_si(v
, size
[i
] - 1);
1081 isl_constraint_set_constant(c
, v
);
1082 bset
= isl_basic_set_add_constraint(bset
, c
);
1086 isl_local_space_free(ls
);
1088 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1091 /* Add "len" parameters p[i] called prefix%d,
1092 * with bounds to 0 <= p[i] < size[i].
1094 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1095 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1101 isl_local_space
*ls
;
1104 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1105 nparam
= isl_set_dim(set
, isl_dim_param
);
1106 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1108 for (i
= 0; i
< len
; ++i
) {
1109 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1110 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1114 space
= isl_space_params(isl_set_get_space(set
));
1115 ls
= isl_local_space_from_space(space
);
1116 for (i
= 0; i
< len
; ++i
) {
1117 isl_pw_aff
*param
, *size_i
, *zero
;
1120 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1121 isl_dim_param
, nparam
+ i
);
1123 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1124 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1125 set
= isl_set_intersect_params(set
, bound
);
1127 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1128 bound
= isl_pw_aff_ge_set(param
, zero
);
1129 set
= isl_set_intersect_params(set
, bound
);
1131 isl_local_space_free(ls
);
1136 /* Given a mapping "sched" of the form
1138 * [D -> A] -> [D -> T(A)]
1140 * apply the mapping encoded in bounds[i].shift_map to the range of "sched".
1141 * The mappings in bounds[i].shift_map are of the form
1143 * [D -> a] -> [D -> s(D,a)]
1145 * We first compose them with a mapping
1149 * (If bounds[i].shift_map is not set, then it is assumed to be
1150 * an identity mapping and then we use this second mapping instead.)
1153 * [D -> a] -> s(D,a)
1155 * We precompose them with a projection on the i th dimension to obtain
1157 * [D -> T] -> s(D,T)
1159 * and collect these into
1161 * [D -> T] -> S(D,T)
1163 * Introducing D in the range yields
1165 * [D -> T] -> [D -> S(D,T)]
1167 * and application to "sched" yields
1169 * [D -> A] -> [D -> S(D,T(A))]
1171 static __isl_give isl_map
*pre_shift(__isl_take isl_map
*sched
,
1172 int n_index
, struct gpu_array_bound
*bounds
)
1175 isl_ctx
*ctx
= isl_map_get_ctx(sched
);
1176 isl_space
*space
, *space2
;
1178 isl_map
*map
, *id
, *pre_shift
;
1180 space
= isl_space_range(isl_map_get_space(sched
));
1181 space2
= isl_space_from_domain(isl_space_copy(space
));
1182 pre_shift
= isl_map_universe(space2
);
1183 space
= isl_space_domain(isl_space_unwrap(space
));
1184 id
= isl_map_identity(isl_space_map_from_set(isl_space_copy(space
)));
1185 space
= isl_space_from_domain(space
);
1186 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
1187 def
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1189 for (i
= 0; i
< n_index
; ++i
) {
1190 isl_basic_map
*bmap
, *drop
;
1193 space
= isl_space_alloc(ctx
, 0, n_index
, n_index
);
1194 proj
= isl_map_identity(space
);
1195 proj
= isl_map_project_out(proj
, isl_dim_out
,
1196 i
+ 1, n_index
- (i
+ 1));
1197 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, i
);
1198 proj
= isl_map_product(isl_map_copy(id
), proj
);
1200 if (!bounds
[i
].shift_map
)
1201 bmap
= isl_basic_map_copy(def
);
1203 bmap
= isl_basic_map_copy(bounds
[i
].shift_map
);
1204 bmap
= isl_basic_map_apply_range(bmap
,
1205 isl_basic_map_copy(def
));
1208 map
= isl_map_from_basic_map(bmap
);
1209 map
= isl_map_apply_range(proj
, map
);
1210 pre_shift
= isl_map_flat_range_product(pre_shift
, map
);
1214 isl_basic_map_free(def
);
1216 space
= isl_space_domain(isl_map_get_space(pre_shift
));
1217 map
= isl_map_domain_map(isl_map_universe(isl_space_unwrap(space
)));
1218 pre_shift
= isl_map_range_product(map
, pre_shift
);
1220 sched
= isl_map_apply_range(sched
, pre_shift
);
1225 /* Given an access relation to a tile of an array, construct a map that
1226 * maps each element in the space of the access relation
1227 * to a copy of the tile shifted to the origin
1228 * (based on the lower bounds in group->private_bound or group->shared_bound).
1229 * If any of the indices is strided, then {private,shared}_bound[i].shift_map
1230 * is applied to the index first.
1231 * The domain space of the resulting map is that of access "access",
1232 * while the range space is anonymous.
1233 * The resulting map only encodes the mapping to the shift tile and
1234 * not the constraints of "access".
1236 * Let the space of the access relation be
1240 * We first construct an identity relation on a wrapped copy of this space,
1241 * except that it strips off the name of array
1243 * [D -> A] -> [D -> T(A)] (1)
1245 * The bounds in bounds[i].lb are of the form
1249 * We collect them into
1253 * and then transform them into
1255 * [D -> T] -> T - B(D) (2)
1257 * Combining those two mappings (1) and (2) yields
1259 * [D -> A] -> T(A) - B(D)
1261 * If there are any strides, then (1) is first transformed into (1')
1263 * [D -> A] -> [D -> T'(A)] (1')
1265 * by a call to pre_shift.
1267 static __isl_give isl_map
*shift_access(__isl_take isl_map
*access
,
1268 struct gpu_array_ref_group
*group
)
1276 struct gpu_array_bound
*bounds
;
1277 int n_index
= group
->array
->n_index
;
1279 bounds
= group
->private_bound
;
1281 bounds
= group
->shared_bound
;
1283 space
= isl_space_domain(isl_map_get_space(access
));
1284 space
= isl_space_map_from_set(space
);
1285 id1
= isl_map_identity(space
);
1286 space
= isl_space_range(isl_map_get_space(access
));
1287 space
= isl_space_map_from_set(space
);
1288 space
= isl_space_set_tuple_name(space
, isl_dim_out
, NULL
);
1289 id2
= isl_map_identity(space
);
1290 sched
= isl_map_product(id1
, id2
);
1292 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1293 space
= isl_space_from_domain(isl_space_domain(space
));
1294 shift
= isl_map_universe(space
);
1295 for (i
= 0; i
< n_index
; ++i
) {
1296 map
= isl_map_from_aff(isl_aff_copy(bounds
[i
].lb
));
1297 shift
= isl_map_flat_range_product(shift
, map
);
1300 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1301 map
= isl_map_universe(space
);
1302 id1
= isl_map_range_map(isl_map_copy(map
));
1303 map
= isl_map_domain_map(map
);
1304 shift
= isl_map_neg(shift
);
1305 shift
= isl_map_apply_range(map
, shift
);
1306 shift
= isl_map_sum(id1
, shift
);
1308 for (i
= 0; i
< n_index
; ++i
)
1309 if (bounds
[i
].shift_map
)
1313 sched
= pre_shift(sched
, n_index
, bounds
);
1315 sched
= isl_map_apply_range(sched
, shift
);
1317 isl_map_free(access
);
1322 /* Given a schedule that iterates over all elements in a piece of an array,
1323 * perform tiling/wrapping over the threads.
1325 * In particular, we tile the final iterators so that the final thread
1326 * dimension runs over the final array dimension.
1327 * However, if those final iterators have only a single iteration,
1328 * we try to tile earlier iterators instead.
1330 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1331 __isl_take isl_map
*sched
)
1334 isl_union_map
*usched
;
1337 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1341 n_tile
= gen
->n_block
;
1342 if (n_tile
> nvar
) {
1344 sched
= isl_map_insert_dims(sched
,
1345 isl_dim_out
, 0, n_tile
- nvar
);
1346 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1347 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1351 first
= nvar
- n_tile
;
1353 for (; first
> 0; first
--)
1354 if (!isl_map_plain_is_fixed(sched
, isl_dim_out
,
1355 first
+ n_tile
- 1, NULL
))
1358 dim
= isl_map_get_space(sched
);
1359 dim
= isl_space_params(dim
);
1360 if (gen
->options
->wrap
)
1361 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1362 n_tile
, gen
->block_dim
);
1364 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1365 n_tile
, gen
->block_dim
);
1366 sched
= isl_map_apply_range(sched
, tiling
);
1368 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1369 sched
= isl_map_intersect_range(sched
, par
);
1371 usched
= isl_union_map_from_map(sched
);
1372 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1374 sched
= isl_map_from_union_map(usched
);
1379 /* Given an index expression "pa" into a tile of an array, adjust the expression
1380 * to a shift of the tile to the origin
1381 * (based on the lower bounds in "bound".
1382 * If the index is strided, then we first add
1383 * bound->shift and divide by bound->stride.
1384 * In the end, we compute the gist with respect to "domain".
1386 * All of the input expression "pa", the set "domain" and
1387 * the output are expressed in terms of the AST schedule domain.
1388 * The expressions in "bound" are expressed
1389 * in terms of the first shared_len dimensions of the schedule computed by PPCG.
1390 * The mapping "sched2shared" maps the former domain to the latter domain.
1392 static __isl_give isl_pw_aff
*shift_index(__isl_take isl_pw_aff
*pa
,
1393 struct gpu_array_info
*array
,
1394 struct gpu_array_bound
*bound
, __isl_take isl_set
*domain
,
1395 __isl_take isl_map
*sched2shared
)
1399 isl_pw_multi_aff
*pma
;
1402 map
= isl_map_from_aff(isl_aff_copy(bound
->shift
));
1403 map
= isl_map_apply_range(isl_map_copy(sched2shared
), map
);
1404 pma
= isl_pw_multi_aff_from_map(map
);
1405 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1406 isl_pw_multi_aff_free(pma
);
1407 pa
= isl_pw_aff_add(pa
, tmp
);
1408 pa
= isl_pw_aff_scale_down(pa
, bound
->stride
);
1412 map
= isl_map_from_aff(isl_aff_copy(bound
->lb
));
1413 map
= isl_map_apply_range(sched2shared
, map
);
1414 pma
= isl_pw_multi_aff_from_map(map
);
1415 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1416 isl_pw_multi_aff_free(pma
);
1417 pa
= isl_pw_aff_sub(pa
, tmp
);
1418 pa
= isl_pw_aff_coalesce(pa
);
1419 pa
= isl_pw_aff_gist(pa
, domain
);
1424 /* Return the union of all read (read = 1) and/or write (write = 1)
1425 * access relations in the group.
1427 static __isl_give isl_union_map
*group_access_relation(
1428 struct gpu_array_ref_group
*group
, int read
, int write
)
1431 isl_union_map
*access
;
1433 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1434 for (i
= 0; i
< group
->n_ref
; ++i
) {
1437 if (!((read
&& group
->refs
[i
]->read
) ||
1438 (write
&& group
->refs
[i
]->write
)))
1440 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1441 access
= isl_union_map_union(access
,
1442 isl_union_map_from_map(map_i
));
1448 /* Return a map from the first shared_len dimensions of the computed
1449 * schedule to the values of the given index "i"
1450 * of the elements in the array tile in global memory that corresponds
1451 * to the shared memory copy.
1452 * In particular, if a is the index, then the range of the map
1456 * is constrained as follows
1458 * tile_offset(D) <= a <= tile_offset(D) + tile_size - 1 (1)
1462 * 0 <= a <= array_size - 1 (2)
1465 * Note that if some stride has been detected (i.e., when
1466 * group->shared_bound[i].shift is set), then offset and size (i.e.,
1467 * constraints (1)) apply to the shifted and scaled down copy of the tile.
1468 * These constraints therefore have to be mapped back to the original
1469 * array space using the inverse of the shift_map.
1471 static __isl_give isl_map
*group_tile_dim(struct gpu_array_ref_group
*group
,
1476 isl_map
*map
, *tile
, *gt
;
1479 map
= isl_map_from_aff(isl_aff_copy(group
->shared_bound
[i
].lb
));
1480 space
= isl_space_range(isl_map_get_space(map
));
1481 map
= isl_map_apply_range(map
, isl_map_lex_le(isl_space_copy(space
)));
1484 aff
= isl_aff_copy(group
->shared_bound
[i
].lb
);
1485 aff
= isl_aff_add_constant(aff
, group
->shared_bound
[i
].size
);
1486 map
= isl_map_from_aff(aff
);
1487 gt
= isl_map_lex_gt(space
);
1488 map
= isl_map_apply_range(map
, isl_map_copy(gt
));
1489 tile
= isl_map_intersect(tile
, map
);
1491 if (group
->shared_bound
[i
].shift
) {
1492 isl_basic_map
*shift
;
1493 shift
= isl_basic_map_copy(group
->shared_bound
[i
].shift_map
);
1494 shift
= isl_basic_map_reverse(shift
);
1495 tile
= isl_set_unwrap(isl_set_apply(isl_map_wrap(tile
),
1496 isl_map_from_basic_map(shift
)));
1499 tile
= isl_map_lower_bound_si(tile
, isl_dim_out
, 0, 0);
1501 bound
= isl_set_from_pw_aff(isl_pw_aff_copy(group
->array
->bound
[i
]));
1502 bound
= isl_set_apply(bound
, gt
);
1503 tile
= isl_map_intersect_range(tile
, bound
);
1508 /* Return a map from the first shared_len dimensions of the computed
1509 * schedule to the array tile in
1510 * global memory that corresponds to the shared memory copy.
1512 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1515 int n_index
= group
->array
->n_index
;
1518 tile
= group_tile_dim(group
, 0);
1519 for (i
= 1; i
< n_index
; ++i
) {
1522 tile_i
= group_tile_dim(group
, i
);
1523 tile
= isl_map_flat_range_product(tile
, tile_i
);
1526 tile
= isl_map_set_tuple_name(tile
, isl_dim_out
, group
->array
->name
);
1531 /* Given a mapping "sched" from the AST schedule to a domain,
1532 * return the corresponding mapping from the AST schedule to
1533 * to the first shared_len dimensions of the schedule computed by PPCG.
1535 static __isl_give isl_map
*compute_sched_to_shared(struct gpu_gen
*gen
,
1536 __isl_take isl_map
*sched
)
1538 isl_union_map
*umap
;
1542 space
= isl_space_range(isl_map_get_space(sched
));
1543 space
= isl_space_from_domain(space
);
1544 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1546 umap
= isl_union_map_copy(gen
->shared_sched
);
1547 umap
= isl_union_map_apply_range(umap
,
1548 isl_union_map_copy(gen
->shared_proj
));
1549 map
= isl_union_map_extract_map(umap
, space
);
1550 isl_union_map_free(umap
);
1552 sched
= isl_map_apply_range(sched
, map
);
1553 sched
= isl_map_detect_equalities(sched
);
1558 /* Set unroll[j] if the input dimension j is involved in
1559 * the index expression represented by bmap.
1561 static int check_unroll(__isl_take isl_basic_map
*bmap
, void *user
)
1564 int n_in
= isl_basic_map_dim(bmap
, isl_dim_in
);
1565 int n_out
= isl_basic_map_dim(bmap
, isl_dim_out
);
1568 for (i
= 0; i
< n_out
; ++i
) {
1572 ok
= isl_basic_map_has_defining_equality(bmap
,
1573 isl_dim_out
, i
, &c
);
1575 for (j
= 0; j
< n_in
; ++j
)
1576 if (isl_constraint_involves_dims(c
, isl_dim_in
, j
, 1))
1578 isl_constraint_free(c
);
1581 isl_basic_map_free(bmap
);
1585 /* Given an array pos mapping input dimensions to the corresponding
1586 * output dimension, construct the corresponding map.
1588 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1593 isl_basic_map
*bmap
;
1594 isl_local_space
*ls
;
1596 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1597 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1598 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1599 ls
= isl_local_space_from_space(dim
);
1601 for (i
= 0; i
< len
; ++i
) {
1602 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1603 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
1604 isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
], 1);
1605 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1607 isl_local_space_free(ls
);
1609 return isl_map_from_basic_map(bmap
);
1612 /* Find all loops involved in any of the index expressions for any of
1613 * the private accesses, move them innermost and then mark them as
1614 * requiring unrolling by setting gen->first_unroll.
1615 * The loops involved should all be parallel because of the checks
1616 * we performed in check_private_group_access. Moving them innermost
1617 * is therefore a valid transformation.
1619 * Loops up to gen->shared_len are generated before the mapping to
1620 * threads is applied. They should therefore be ignored.
1622 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1623 __isl_take isl_union_map
*sched
)
1626 int unroll
[gen
->thread_tiled_len
];
1627 int perm
[gen
->thread_tiled_len
];
1630 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1632 gen
->first_unroll
= -1;
1634 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1636 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1637 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1639 for (j
= 0; j
< array
->n_group
; ++j
) {
1640 isl_union_map
*access
;
1643 if (!array
->groups
[j
]->private_bound
)
1646 access
= group_access_relation(array
->groups
[j
], 1, 1);
1647 access
= isl_union_map_apply_domain(access
,
1648 isl_union_map_copy(sched
));
1650 acc
= isl_map_from_union_map(access
);
1651 isl_map_foreach_basic_map(acc
, &check_unroll
, unroll
);
1657 for (i
= gen
->shared_len
; i
< len
; ++i
)
1664 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1669 for (i
= 0; i
< gen
->shared_len
; ++i
)
1671 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1674 gen
->first_unroll
= j
- gen
->shared_len
;
1675 for (i
= gen
->shared_len
; i
< len
; ++i
)
1679 dim
= isl_union_map_get_space(sched
);
1680 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1681 sched
= isl_union_map_apply_range(sched
,
1682 isl_union_map_from_map(permute
));
1687 /* Given a constraint
1689 * a(p,i) + j = g f(e)
1691 * or -a(p,i) - j = g f(e) if sign < 0,
1692 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1693 * a(p,i) is assumed to be an expression in only the parameters
1694 * and the input dimensions.
1696 static void extract_stride(__isl_keep isl_constraint
*c
,
1697 struct gpu_array_bound
*bound
, isl_int stride
, int sign
)
1706 isl_int_set(bound
->stride
, stride
);
1708 space
= isl_constraint_get_space(c
);
1709 space
= isl_space_domain(space
);
1711 nparam
= isl_space_dim(space
, isl_dim_param
);
1712 nvar
= isl_space_dim(space
, isl_dim_set
);
1716 isl_constraint_get_constant(c
, &v
);
1719 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1720 aff
= isl_aff_set_constant(aff
, v
);
1722 for (i
= 0; i
< nparam
; ++i
) {
1723 isl_constraint_get_coefficient(c
, isl_dim_param
, i
, &v
);
1724 if (isl_int_is_zero(v
))
1728 aff
= isl_aff_add_coefficient(aff
, isl_dim_param
, i
, v
);
1731 for (i
= 0; i
< nvar
; ++i
) {
1732 isl_constraint_get_coefficient(c
, isl_dim_in
, i
, &v
);
1733 if (isl_int_is_zero(v
))
1737 aff
= isl_aff_add_coefficient(aff
, isl_dim_in
, i
, v
);
1745 /* Given an equality constraint of a map with a single output dimension j,
1746 * check if the constraint is of the form
1748 * a(p,i) + j = g f(e)
1750 * with a(p,i) an expression in the parameters and input dimensions
1751 * and f(e) an expression in the existentially quantified variables.
1752 * If so, and if g is larger than any such g from a previously considered
1753 * constraint, then call extract_stride to record the stride information
1756 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1761 struct gpu_array_bound
*bound
= user
;
1764 isl_int_init(stride
);
1766 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1767 isl_constraint_get_coefficient(c
, isl_dim_out
, 0, &v
);
1769 if (n_div
&& (isl_int_is_one(v
) || isl_int_is_negone(v
))) {
1770 int s
= isl_int_sgn(v
);
1771 isl_int_set_si(stride
, 0);
1772 for (i
= 0; i
< n_div
; ++i
) {
1773 isl_constraint_get_coefficient(c
, isl_dim_div
, i
, &v
);
1774 isl_int_gcd(stride
, stride
, v
);
1776 if (!isl_int_is_zero(stride
) &&
1777 isl_int_gt(stride
, bound
->stride
))
1778 extract_stride(c
, bound
, stride
, s
);
1781 isl_int_clear(stride
);
1784 isl_constraint_free(c
);
1788 /* Given contraints on an array index i, check if we can find
1789 * a shift a(p) and a stride g such that
1791 * a(p) + i = 0 mod g
1793 * If so, record the information in bound and apply the mapping
1794 * i -> (i + a(p))/g to the array index in bounds and return
1795 * the new constraints.
1796 * If not, simply return the original constraints.
1798 * If bounds is a subset of the space
1802 * then the bound recorded in bound->shift is of the form
1806 * with s(D) equal to a(p) above.
1807 * The mapping recorded in bound->shift_map is of the form
1809 * [D -> i] -> [D -> (i + S(D))/g]
1811 * This mapping is computed as follows.
1812 * We first introduce "i" in the domain through precomposition
1813 * with [D -> i] -> D obtaining
1817 * Adding [D -> i] -> i produces
1819 * [D -> i] -> i + s(D)
1821 * and the domain product with [D -> i] -> D yields
1823 * [D -> i] -> [D -> i + s(D)]
1825 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1827 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1828 __isl_take isl_basic_map
*bounds
)
1831 isl_basic_map
*hull
;
1832 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1833 isl_basic_set
*bset
;
1836 isl_int_set_si(bound
->stride
, -1);
1838 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1840 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1842 isl_basic_map_free(hull
);
1844 if (isl_int_is_neg(bound
->stride
))
1847 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1848 space
= isl_basic_map_get_space(bounds
);
1849 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1850 shift
= isl_basic_map_apply_range(bmap
, shift
);
1851 space
= isl_basic_map_get_space(bounds
);
1852 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1853 shift
= isl_basic_map_sum(id
, shift
);
1854 space
= isl_basic_map_get_space(bounds
);
1855 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1856 shift
= isl_basic_map_range_product(id
, shift
);
1858 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1859 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1860 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1861 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1862 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1863 aff
= isl_aff_scale_down(aff
, bound
->stride
);
1864 scale
= isl_basic_map_from_aff(aff
);
1865 scale
= isl_basic_map_product(id
, scale
);
1867 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1868 bmap
= isl_basic_map_copy(bound
->shift_map
);
1869 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1870 bounds
= isl_basic_set_unwrap(bset
);
1875 /* Data used in compute_array_dim_size and compute_size_in_direction.
1877 * pos is the position of the variable representing the array index,
1878 * i.e., the variable for which want to compute the size. This variable
1879 * is also the last variable in the set.
1881 struct gpu_size_info
{
1882 isl_basic_set
*bset
;
1883 struct gpu_array_bound
*bound
;
1887 /* Given a constraint from the basic set describing the bounds on
1888 * an array index, check if it is a lower bound, say m i >= b(x), and,
1889 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1890 * upper bound. If so, and if this bound is smaller than any bound
1891 * derived from earlier constraints, set the size to this bound on
1892 * the expression and the lower bound to ceil(b(x)/m).
1894 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1896 struct gpu_size_info
*size
= user
;
1901 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1902 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1904 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
)) {
1905 isl_constraint_free(c
);
1911 isl_constraint_get_coefficient(c
, isl_dim_set
, size
->pos
, &v
);
1913 if (isl_int_is_pos(v
)) {
1916 enum isl_lp_result res
;
1918 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
1919 aff
= isl_aff_ceil(aff
);
1921 lb
= isl_aff_copy(aff
);
1923 aff
= isl_aff_neg(aff
);
1924 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
1926 res
= isl_basic_set_max(size
->bset
, aff
, &v
);
1929 if (res
== isl_lp_ok
) {
1930 isl_int_add_ui(v
, v
, 1);
1931 if (isl_int_is_neg(size
->bound
->size
) ||
1932 isl_int_lt(v
, size
->bound
->size
)) {
1933 isl_int_set(size
->bound
->size
, v
);
1934 lb
= isl_aff_drop_dims(lb
, isl_dim_in
,
1936 isl_aff_free(size
->bound
->lb
);
1937 size
->bound
->lb
= isl_aff_copy(lb
);
1944 isl_constraint_free(c
);
1949 /* Given a basic map "bounds" that maps parameters and input dimensions
1950 * to a single output dimension, look for an expression in the parameters
1951 * and input dimensions such that the range of the output dimension shifted
1952 * by this expression is a constant.
1954 * In particular, we currently only consider lower bounds on the output
1955 * dimension as candidate expressions.
1957 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
1958 __isl_take isl_basic_map
*bounds
)
1960 struct gpu_size_info size
;
1962 bounds
= isl_basic_map_detect_equalities(bounds
);
1963 bounds
= check_stride(bound
, bounds
);
1965 isl_int_set_si(bound
->size
, -1);
1969 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
1970 size
.bset
= isl_basic_map_wrap(bounds
);
1971 size
.bset
= isl_basic_set_flatten(size
.bset
);
1972 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
1973 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
1975 isl_basic_set_free(size
.bset
);
1977 return isl_int_is_nonneg(bound
->size
) ? 0 : -1;
1980 /* Check if we can find a shared memory tile for the given array
1981 * based on the given accesses, and if so, put the results
1982 * in array->shared_bound.
1984 * We project the accesses on each index in turn and look for a parametric
1985 * offset such that the size is constant.
1987 static int can_tile_for_shared_memory(struct gpu_array_info
*array
,
1988 __isl_keep isl_map
*access
, struct gpu_array_bound
*bounds
)
1992 for (i
= 0; i
< array
->n_index
; ++i
) {
1994 isl_basic_map
*hull
;
1996 access_i
= isl_map_copy(access
);
1997 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
1998 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
1999 1, array
->n_index
- (i
+ 1));
2000 access_i
= isl_map_compute_divs(access_i
);
2001 hull
= isl_map_simple_hull(access_i
);
2002 if (compute_array_dim_size(&bounds
[i
], hull
) < 0)
2009 /* Construct a map with input the shared tile loops and the loops that
2010 * will be wrapped around the threads that relates these later loops
2011 * to the thread indices and then projects them out.
2013 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2021 dim
= isl_union_map_get_space(gen
->shared_sched
);
2023 if (gen
->options
->wrap
)
2024 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2025 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2027 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2028 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2032 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2033 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2036 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2037 priv
= isl_map_intersect_range(priv
, par
);
2039 dim
= isl_map_get_space(priv
);
2040 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2041 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2042 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2045 priv
= isl_map_apply_range(priv
, proj
);
2050 /* Construct a map from domain_dim to domain_dim that increments
2051 * the dimension at position "pos" and leaves all other dimensions
2054 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2057 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2059 isl_basic_map
*next
;
2060 isl_local_space
*ls
;
2062 dim
= isl_space_map_from_set(domain_dim
);
2063 next
= isl_basic_map_universe(isl_space_copy(dim
));
2064 ls
= isl_local_space_from_space(dim
);
2066 for (i
= 0; i
< len
; ++i
) {
2069 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2070 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2071 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2073 isl_constraint_set_constant_si(c
, 1);
2074 next
= isl_basic_map_add_constraint(next
, c
);
2077 isl_local_space_free(ls
);
2079 return isl_map_from_basic_map(next
);
2082 /* Check if the given access is coalesced.
2083 * That is, check whether incrementing the dimension that will get
2084 * wrapped over the last thread index results in incrementing
2085 * the last array index.
2087 * This function is only called for access relations without reuse.
2089 static int access_is_coalesced(struct gpu_gen
*gen
,
2090 __isl_keep isl_union_map
*access
)
2093 isl_map
*access_map
;
2094 isl_map
*next_thread_x
;
2095 isl_map
*next_element
;
2099 access
= isl_union_map_copy(access
);
2100 access
= isl_union_map_apply_domain(access
,
2101 isl_union_map_copy(gen
->tiled_sched
));
2102 access_map
= isl_map_from_union_map(access
);
2104 dim
= isl_map_get_space(access_map
);
2105 dim
= isl_space_domain(dim
);
2106 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2108 dim
= isl_map_get_space(access_map
);
2109 dim
= isl_space_range(dim
);
2110 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2112 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2113 map
= isl_map_apply_range(map
, access_map
);
2115 coalesced
= isl_map_is_subset(map
, next_element
);
2117 isl_map_free(next_element
);
2123 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2124 * dimensions of the computed schedule, check if it is bijective for
2125 * fixed values of the first gen->shared_len dimensions.
2126 * We perform this check by equating these dimensions to parameters.
2128 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2134 access
= isl_map_copy(access
);
2135 space
= isl_space_params(isl_map_get_space(access
));
2136 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2137 0, gen
->shared_len
, "s");
2138 access
= isl_map_intersect_domain(access
, par
);
2139 res
= isl_map_is_bijective(access
);
2140 isl_map_free(access
);
2145 /* For the given array reference group, check whether the access is private
2146 * to the thread. That is, check that any given array element
2147 * is only accessed by a single thread.
2148 * We compute an access relation that maps the shared tile loop iterators
2149 * and the shared point loop iterators that will be wrapped over the
2150 * threads to the array elements.
2151 * We actually check that those iterators that will be wrapped
2152 * partition the array space. This check is stricter than necessary
2153 * since several iterations may be mapped onto the same thread
2154 * and then they could be allowed to access the same memory elements,
2155 * but our check does not allow this situation.
2157 * We also check that the index expression only depends on parallel
2158 * loops. That way, we can move those loops innermost and unroll them.
2159 * Again, we use a test that is stricter than necessary.
2160 * We actually check whether the index expression only depends
2161 * on the iterators that are wrapped over the threads.
2162 * These are necessarily parallel, but there may be more parallel loops.
2164 * Combining the injectivity of the first test with the single-valuedness
2165 * of the second test, we simply test for bijectivity.
2167 * If it turns out we can use registers, we compute the private memory
2168 * tile size using can_tile_for_shared_memory, after introducing a dependence
2169 * on the thread indices.
2171 * Before performing any of the above computations, we first check
2172 * if there is any reuse on the reference group. If not, we simply
2173 * return. If, moreover, the access is coalesced then we also remove
2174 * the shared memory tiling since we should just use global memory instead.
2176 static void check_private_group_access(struct gpu_gen
*gen
,
2177 struct gpu_array_ref_group
*group
)
2180 isl_union_map
*access
;
2181 int n_index
= group
->array
->n_index
;
2183 access
= group_access_relation(group
, 1, 1);
2184 if (isl_union_map_is_injective(access
)) {
2185 if (group
->shared_bound
&& access_is_coalesced(gen
, access
)) {
2186 free_bound_list(group
->shared_bound
, n_index
);
2187 group
->shared_bound
= NULL
;
2189 isl_union_map_free(access
);
2192 access
= isl_union_map_apply_domain(access
,
2193 isl_union_map_copy(gen
->shared_sched
));
2195 acc
= isl_map_from_union_map(access
);
2197 if (!access_is_bijective(gen
, acc
)) {
2202 group
->private_bound
= create_bound_list(gen
->ctx
, n_index
);
2203 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2204 if (!can_tile_for_shared_memory(group
->array
, acc
,
2205 group
->private_bound
)) {
2206 free_bound_list(group
->private_bound
, n_index
);
2207 group
->private_bound
= NULL
;
2213 /* Look for the last shared tile loop that affects the offset of the
2214 * shared or private tile and store the result in array->last_shared.
2215 * If there is no such loop, then array->last_shared is set to a value
2216 * before the first shared tile loop, in particular gen->tile_first - 1.
2218 static void set_last_shared(struct gpu_gen
*gen
,
2219 struct gpu_array_ref_group
*group
)
2222 struct gpu_array_bound
*bounds
;
2223 int n_index
= group
->array
->n_index
;
2225 bounds
= group
->private_bound
;
2227 bounds
= group
->shared_bound
;
2231 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2232 for (i
= 0; i
< n_index
; ++i
) {
2237 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2240 shift
= bounds
[i
].shift
;
2243 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2249 group
->last_shared
= j
;
2252 /* Compute the sizes of all private arrays for the current kernel,
2253 * as well as the offsets of the private pieces in the original arrays.
2254 * If we cannot or don't want to privatize a given array group,
2255 * we use the shared memory tile sizes computed in
2256 * compute_group_shared_bound instead.
2258 * If we have been able to find a private or shared tile,
2259 * we also look for the last shared tile loop that affects the offset
2260 * (and therefore the group tile) and store the result in group->last_shared.
2262 * A privatized copy of all access relations from reference groups that
2263 * are mapped to private memory is stored in gen->privatization.
2265 static void compute_private_size(struct gpu_gen
*gen
)
2268 isl_union_map
*private;
2270 if (!gen
->options
->use_private_memory
)
2273 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2275 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2276 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2278 if (gpu_array_is_read_only_scalar(array
))
2281 for (j
= 0; j
< array
->n_group
; ++j
) {
2282 check_private_group_access(gen
, array
->groups
[j
]);
2284 if (!array
->groups
[j
]->private_bound
)
2287 private = isl_union_map_union(private,
2288 group_access_relation(array
->groups
[j
], 1, 1));
2291 for (j
= 0; j
< array
->n_group
; ++j
) {
2292 array
->groups
[j
]->last_shared
= gen
->shared_len
- 1;
2293 set_last_shared(gen
, array
->groups
[j
]);
2297 if (isl_union_map_is_empty(private))
2298 isl_union_map_free(private);
2300 isl_union_map
*priv
;
2302 private = isl_union_map_apply_domain(private,
2303 isl_union_map_copy(gen
->shared_sched
));
2304 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2305 private = isl_union_map_apply_domain(private, priv
);
2306 gen
->private_access
= private;
2310 /* Compute the size of the tile specified by the list "bound" of n_index
2311 * gpu_array_bounds in number of elements and put the result in *size.
2313 static void tile_size(unsigned n_index
, struct gpu_array_bound
*bound
,
2318 isl_int_set_si(*size
, 1);
2320 for (i
= 0; i
< n_index
; ++i
)
2321 isl_int_mul(*size
, *size
, bound
[i
].size
);
2324 /* If max_shared_memory is not set to infinity (-1), then make
2325 * sure that the total amount of shared memory required by the
2326 * array reference groups mapped to shared memory is no larger
2327 * than this maximum.
2329 * We apply a greedy approach and discard (keep in global memory)
2330 * those groups that would result in a total memory size that
2331 * is larger than the maximum.
2333 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2338 if (gen
->options
->max_shared_memory
< 0)
2343 isl_int_set_si(left
, gen
->options
->max_shared_memory
);
2345 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2346 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2348 for (j
= 0; j
< array
->n_group
; ++j
) {
2349 struct gpu_array_ref_group
*group
;
2351 group
= array
->groups
[j
];
2352 if (!group
->shared_bound
)
2355 tile_size(array
->n_index
, group
->shared_bound
, &size
);
2356 isl_int_mul_ui(size
, size
, array
->size
);
2358 if (isl_int_le(size
, left
)) {
2359 isl_int_sub(left
, left
, size
);
2363 free_bound_list(group
->shared_bound
, array
->n_index
);
2364 group
->shared_bound
= NULL
;
2368 isl_int_clear(size
);
2369 isl_int_clear(left
);
2372 /* Fill up the groups array with singleton groups, i.e., one group
2373 * per reference, initializing the array, access, write and refs fields.
2374 * In particular the access field is initialized to the scheduled
2375 * access relation of the array reference.
2377 * Return the number of elements initialized, i.e., the number of
2378 * active references in the current kernel.
2380 static int populate_array_references(struct gpu_array_info
*array
,
2381 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2385 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2388 for (i
= 0; i
< array
->n_ref
; ++i
) {
2389 isl_union_map
*umap
;
2391 struct gpu_array_ref_group
*group
;
2392 struct gpu_stmt_access
*access
= array
->refs
[i
];
2394 map
= isl_map_copy(access
->access
);
2395 umap
= isl_union_map_from_map(map
);
2396 umap
= isl_union_map_apply_domain(umap
,
2397 isl_union_map_copy(sched
));
2399 if (isl_union_map_is_empty(umap
)) {
2400 isl_union_map_free(umap
);
2404 map
= isl_map_from_union_map(umap
);
2405 map
= isl_map_detect_equalities(map
);
2407 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2409 group
->array
= array
;
2410 group
->access
= map
;
2411 group
->write
= access
->write
;
2412 group
->refs
= &array
->refs
[i
];
2414 groups
[n
++] = group
;
2420 static void free_array_ref_group(struct gpu_array_ref_group
*group
,
2425 free_bound_list(group
->shared_bound
, n_index
);
2426 free_bound_list(group
->private_bound
, n_index
);
2427 isl_map_free(group
->access
);
2432 /* Given a map where the input dimensions represent the tile loops,
2433 * eliminate the innermost of those that have a fixed value
2434 * until we reach one that does not (obviously) have a fixed value.
2436 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2437 __isl_take isl_map
*access
)
2441 n
= isl_map_dim(access
, isl_dim_in
);
2443 for (i
= n
- 1; i
>= 0; --i
) {
2444 if (!isl_map_plain_is_fixed(access
, isl_dim_in
, i
, NULL
))
2446 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2451 /* Check if the access relations of group1 and group2 overlap within
2452 * the innermost loop. In particular, ignore any inner dimension
2453 * with a fixed value.
2454 * The copying to and from shared memory will be performed within
2455 * the innermost actual loop so we are only allowed to consider
2456 * the dimensions up to that innermost loop while checking whether
2457 * two access relations overlap.
2459 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2460 struct gpu_array_ref_group
*group2
)
2463 isl_map
*access1
, *access2
;
2465 access1
= isl_map_copy(group1
->access
);
2466 access1
= eliminate_fixed_inner_loops(access1
);
2467 access2
= isl_map_copy(group2
->access
);
2468 access2
= eliminate_fixed_inner_loops(access2
);
2469 access1
= isl_map_intersect(access1
, access2
);
2470 empty
= isl_map_is_empty(access1
);
2471 isl_map_free(access1
);
2476 /* If two groups have overlapping access relations (within the innermost
2477 * loop) and if one of them involves a write, then merge the two groups
2480 * We keep track of the grouping in "leader". leader[j] points to
2481 * an earlier group array element that belongs to the same group,
2482 * or the array element j itself if this element is the first in the group.
2484 * Return the number of group leaders.
2486 static int group_overlapping_writes(int n
,
2487 struct gpu_array_ref_group
**groups
, int *leader
)
2492 for (i
= 0; i
< n
; ++i
) {
2494 groups
[l
]->n_ref
= 1;
2495 for (j
= i
- 1; j
>= 0; --j
) {
2498 if (!groups
[l
]->write
&& !groups
[j
]->write
)
2501 if (!accesses_overlap(groups
[l
], groups
[j
]))
2504 groups
[j
]->access
= isl_map_union(groups
[j
]->access
,
2506 groups
[j
]->write
= 1;
2507 groups
[l
]->access
= NULL
;
2508 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
2518 /* Compute the size of the shared array corresponding to the given
2519 * array reference group, based on the accesses from the current kernel,
2520 * as well as the offset of the shared piece in the original array.
2522 static void compute_group_shared_bound(struct gpu_gen
*gen
,
2523 struct gpu_array_info
*array
, struct gpu_array_ref_group
*group
)
2525 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
2527 if (!gen
->options
->use_shared_memory
)
2529 if (gpu_array_is_read_only_scalar(array
))
2532 group
->shared_bound
= create_bound_list(ctx
, array
->n_index
);
2533 if (!can_tile_for_shared_memory(array
, group
->access
,
2534 group
->shared_bound
)) {
2535 free_bound_list(group
->shared_bound
, array
->n_index
);
2536 group
->shared_bound
= NULL
;
2540 /* Is the size of the tile specified by "bound" smaller than the sum of
2541 * the sizes of the tiles specified by "bound1" and "bound2"?
2543 static int smaller_tile(unsigned n_index
, struct gpu_array_bound
*bound
,
2544 struct gpu_array_bound
*bound1
, struct gpu_array_bound
*bound2
)
2547 isl_int size
, size1
, size2
;
2550 isl_int_init(size1
);
2551 isl_int_init(size2
);
2553 tile_size(n_index
, bound
, &size
);
2554 tile_size(n_index
, bound1
, &size1
);
2555 tile_size(n_index
, bound2
, &size2
);
2557 isl_int_sub(size
, size
, size1
);
2558 isl_int_sub(size
, size
, size2
);
2559 smaller
= isl_int_is_neg(size
);
2561 isl_int_clear(size2
);
2562 isl_int_clear(size1
);
2563 isl_int_clear(size
);
2568 /* Given an initial grouping of array references and shared memory tiles
2569 * for each group that allows for a shared memory tile, merge two groups
2570 * if both have a shared memory tile, the merged group also has
2571 * a shared memory tile and the size of the tile for the merge group
2572 * is smaller than the sum of the tile sizes of the individual groups.
2574 * Return the number of group leaders after merging.
2576 static int group_common_shared_memory_tile(struct gpu_array_info
*array
, int n
,
2577 struct gpu_array_ref_group
**groups
, int *leader
, int n_group
)
2580 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
2582 for (i
= 0; n_group
> 1 && i
< n
; ++i
) {
2586 if (!groups
[i
]->shared_bound
)
2588 for (j
= i
- 1; j
>= 0; --j
) {
2591 struct gpu_array_bound
*shared_bound
;
2595 if (!groups
[j
]->shared_bound
)
2598 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
2599 isl_map_copy(groups
[j
]->access
));
2600 empty
= isl_map_is_empty(map
);
2606 map
= isl_map_union(isl_map_copy(groups
[l
]->access
),
2607 isl_map_copy(groups
[j
]->access
));
2608 shared_bound
= create_bound_list(ctx
, array
->n_index
);
2609 if (!can_tile_for_shared_memory(array
, map
,
2611 !smaller_tile(array
->n_index
, shared_bound
,
2612 groups
[l
]->shared_bound
,
2613 groups
[j
]->shared_bound
)) {
2615 free_bound_list(shared_bound
, array
->n_index
);
2619 free_bound_list(groups
[j
]->shared_bound
,
2621 groups
[j
]->shared_bound
= shared_bound
;
2622 isl_map_free(groups
[j
]->access
);
2623 groups
[j
]->access
= map
;
2624 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
2633 /* Extract an array of array reference groups from the array of references
2634 * and the grouping information in "leader".
2636 * Store the results in array->n_group and array->groups.
2638 static void extract_array_groups(isl_ctx
*ctx
, struct gpu_array_info
*array
,
2639 int n
, struct gpu_array_ref_group
**groups
, int *leader
, int n_group
)
2643 for (i
= 2; i
< n
; ++i
)
2644 leader
[i
] = leader
[leader
[i
]];
2646 array
->n_group
= n_group
;
2647 array
->groups
= isl_alloc_array(ctx
, struct gpu_array_ref_group
*,
2649 assert(array
->groups
);
2652 for (i
= 0; i
< n
; ++i
) {
2654 struct gpu_stmt_access
**refs
;
2656 if (leader
[i
] != i
) {
2657 groups
[i
]->refs
= NULL
;
2658 free_array_ref_group(groups
[i
], array
->n_index
);
2662 refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2666 for (k
= i
; k
< n
; ++k
)
2667 if (leader
[k
] == i
) {
2668 refs
[l
++] = *groups
[k
]->refs
;
2669 (*groups
[k
]->refs
)->group
= j
;
2672 groups
[i
]->refs
= refs
;
2674 array
->groups
[j
++] = groups
[i
];
2678 /* Group array references that should be considered together when
2679 * deciding whether to access them from private, shared or global memory.
2681 * In particular, if two array references overlap and if one of them
2682 * is a write, then the two references are grouped together.
2683 * Furthermore, if two groups admit a shared memory tile and if the
2684 * combination of the two also admits a shared memory tile, we merge
2687 * During the construction the group->refs field points to a single
2688 * array reference inside the array of array references, while
2689 * group->n_ref contains the number of element in leader that
2690 * (directly or indirectly) point to this group, provided the group
2693 static void group_array_references(struct gpu_gen
*gen
,
2694 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
2698 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2699 struct gpu_array_ref_group
**groups
;
2702 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
2706 n
= populate_array_references(array
, sched
, groups
);
2708 leader
= isl_alloc_array(ctx
, int, n
);
2711 n_group
= group_overlapping_writes(n
, groups
, leader
);
2713 for (i
= 0; i
< n
; ++i
)
2715 compute_group_shared_bound(gen
, array
, groups
[i
]);
2717 n_group
= group_common_shared_memory_tile(array
, n
, groups
,
2720 extract_array_groups(ctx
, array
, n
, groups
, leader
, n_group
);
2726 /* Take tiled_sched, project it onto the shared tile loops and
2727 * the loops that will be wrapped over the threads and
2728 * store the result in gen->shared_sched.
2729 * Also compute a projection that projects out the loops that will be
2730 * wrapped over the threads and store this projection in gen->shared_proj.
2732 static void compute_shared_sched(struct gpu_gen
*gen
)
2737 isl_union_map
*sched
;
2739 sched
= isl_union_map_copy(gen
->tiled_sched
);
2741 dim
= isl_union_map_get_space(sched
);
2742 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
2743 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2745 dim
= isl_union_map_get_space(sched
);
2746 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
2748 gen
->shared_sched
= sched
;
2749 gen
->shared_proj
= isl_union_map_from_map(proj
);
2752 /* Group references of all arrays in the program.
2754 static void group_references(struct gpu_gen
*gen
)
2757 isl_union_map
*sched
;
2759 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2760 isl_union_map_copy(gen
->shared_proj
));
2762 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2763 group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
2765 isl_union_map_free(sched
);
2768 /* Free all array information that is local to the current kernel.
2770 static void free_local_array_info(struct gpu_gen
*gen
)
2774 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2775 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2777 for (j
= 0; j
< array
->n_group
; ++j
)
2778 free_array_ref_group(array
->groups
[j
], array
->n_index
);
2779 free(array
->groups
);
2783 /* Compute the effective grid size as a list of the sizes in each dimension.
2785 * The grid size specified by the user or set by default
2786 * in read_grid_sizes() and applied in tile_schedule(),
2787 * may be too large for the given code in the sense that
2788 * it may contain blocks that don't need to execute anything.
2789 * We therefore don't return this grid size, but instead the
2790 * smallest grid size that ensures that all blocks that actually
2791 * execute code are included in the grid.
2793 * We first extract a description of the grid, i.e., the possible values
2794 * of the block ids, from gen->tiled_sched.
2795 * The block ids are parameters in gen->tiled_sched.
2796 * We simply need to change them into set dimensions.
2798 * Then, for each block dimension, we compute the maximal value of the block id
2801 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
2802 struct ppcg_kernel
*kernel
)
2806 isl_multi_pw_aff
*mpa
;
2808 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
2809 grid
= isl_set_from_params(grid
);
2810 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
2811 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2815 snprintf(name
, sizeof(name
), "b%d", i
);
2816 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
2818 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
2819 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
2822 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(grid
));
2823 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2828 bound
= isl_set_dim_max(isl_set_copy(grid
), i
);
2829 bound
= isl_pw_aff_coalesce(bound
);
2830 bound
= isl_pw_aff_gist(bound
, isl_set_copy(kernel
->context
));
2832 space
= isl_pw_aff_get_domain_space(bound
);
2833 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2834 one
= isl_aff_add_constant_si(one
, 1);
2835 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
2836 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
2843 void ppcg_kernel_free(void *user
)
2845 struct ppcg_kernel
*kernel
= user
;
2851 isl_multi_pw_aff_free(kernel
->grid_size
);
2852 isl_set_free(kernel
->context
);
2853 isl_union_set_free(kernel
->arrays
);
2854 isl_space_free(kernel
->space
);
2855 isl_ast_node_free(kernel
->tree
);
2857 for (i
= 0; i
< kernel
->n_array
; ++i
)
2858 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
2859 free(kernel
->array
);
2861 for (i
= 0; i
< kernel
->n_var
; ++i
) {
2862 free(kernel
->var
[i
].name
);
2863 isl_vec_free(kernel
->var
[i
].size
);
2870 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
2871 struct ppcg_kernel_var
*var
)
2874 struct gpu_array_bound
*bounds
;
2878 var
->array
= group
->array
;
2880 bounds
= group
->private_bound
;
2881 var
->type
= ppcg_access_private
;
2883 bounds
= group
->shared_bound
;
2884 var
->type
= ppcg_access_shared
;
2887 p
= isl_printer_to_str(ctx
);
2888 p
= print_array_name(p
, group
);
2889 var
->name
= isl_printer_get_str(p
);
2890 isl_printer_free(p
);
2892 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
2894 for (j
= 0; j
< group
->array
->n_index
; ++j
)
2895 var
->size
= isl_vec_set_element(var
->size
, j
, bounds
[j
].size
);
2898 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
2903 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2904 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2906 for (j
= 0; j
< array
->n_group
; ++j
) {
2907 struct gpu_array_ref_group
*group
= array
->groups
[j
];
2908 if (group
->private_bound
|| group
->shared_bound
)
2914 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
2915 assert(kernel
->var
);
2918 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2919 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2921 for (j
= 0; j
< array
->n_group
; ++j
) {
2922 struct gpu_array_ref_group
*group
= array
->groups
[j
];
2923 if (!group
->private_bound
&& !group
->shared_bound
)
2925 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
2931 /* The sizes of the arrays on the host that have been computed by
2932 * extract_array_info may depend on the parameters. Use the extra
2933 * constraints on the parameters that are valid at "host_domain"
2934 * to simplify these expressions and store the results in kernel->array.
2936 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
2937 __isl_keep isl_set
*host_domain
)
2942 kernel
->array
= isl_calloc_array(gen
->ctx
,
2943 struct gpu_local_array_info
, gen
->prog
->n_array
);
2944 assert(kernel
->array
);
2945 kernel
->n_array
= gen
->prog
->n_array
;
2947 context
= isl_set_copy(host_domain
);
2948 context
= isl_set_params(context
);
2950 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2951 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2952 isl_pw_aff_list
*local
;
2954 if (array
->n_group
== 0)
2957 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
2959 for (j
= 0; j
< array
->n_index
; ++j
) {
2962 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
2963 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
2964 local
= isl_pw_aff_list_add(local
, pwaff
);
2967 kernel
->array
[i
].bound
= local
;
2969 isl_set_free(context
);
2972 /* Find the element in gen->stmt that has the given "id".
2973 * Return NULL if no such gpu_stmt can be found.
2975 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
2979 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
2980 if (id
== prog
->stmts
[i
].id
)
2984 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
2987 /* Set gen->tile_len and gen->n_parallel to those of the statement
2988 * affected by the first map (part of the schedule)
2989 * on which this function is called.
2990 * Because of the way the schedule is constructed, the other statements
2991 * in the list, if any, should have the same values for these properties.
2993 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
2995 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2997 struct gpu_stmt
*stmt
;
2999 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3000 stmt
= find_stmt(gen
->prog
, id
);
3006 isl_die(gen
->ctx
, isl_error_unknown
,
3007 "statement not found", return -1);
3009 gen
->tile_len
= stmt
->tile_len
;
3010 gen
->n_parallel
= stmt
->n_parallel
;
3015 void ppcg_kernel_stmt_free(void *user
)
3018 struct ppcg_kernel_stmt
*stmt
= user
;
3023 switch (stmt
->type
) {
3024 case ppcg_kernel_copy
:
3025 isl_ast_expr_free(stmt
->u
.c
.index
);
3026 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3028 case ppcg_kernel_domain
:
3029 for (i
= 0; i
< stmt
->u
.d
.n_access
; ++i
) {
3030 isl_ast_expr_list_free(stmt
->u
.d
.access
[i
].index
);
3031 free(stmt
->u
.d
.access
[i
].local_name
);
3033 free(stmt
->u
.d
.access
);
3035 case ppcg_kernel_sync
:
3042 /* Set the options of "context" to
3044 * { space -> [x] : x >= first }
3046 static __isl_give isl_ast_build
*set_unroll(
3047 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3054 ctx
= isl_ast_build_get_ctx(build
);
3056 space
= isl_space_from_domain(space
);
3057 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3058 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3059 unroll
= isl_map_universe(space
);
3060 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3061 opt
= isl_union_map_from_map(unroll
);
3063 build
= isl_ast_build_set_options(build
, opt
);
3068 /* Return a list of isl_ids of the form "prefix%d".
3070 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3071 int n
, const char *prefix
)
3077 names
= isl_id_list_alloc(ctx
, n
);
3078 for (i
= 0; i
< n
; ++i
) {
3081 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3082 id
= isl_id_alloc(ctx
, name
, NULL
);
3083 names
= isl_id_list_add(names
, id
);
3089 /* Extend the schedule "schedule" with the part of "extension"
3090 * starting at "first" up to "len".
3092 static __isl_give isl_union_map
*extend_schedule(
3093 __isl_take isl_union_map
*schedule
,
3094 __isl_take isl_union_map
*extension
, int first
, int len
)
3098 isl_union_map
*umap
;
3101 space
= isl_union_map_get_space(schedule
);
3102 space
= isl_space_set_from_params(space
);
3103 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3104 proj
= isl_set_identity(isl_set_universe(space
));
3105 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3106 extension
= isl_union_map_apply_range(extension
,
3107 isl_union_map_from_map(proj
));
3109 schedule
= isl_union_map_range_product(schedule
, extension
);
3114 /* This function is called for each access to an array in each instance
3115 * in the kernel of some statement in the original code.
3116 * Replace that access by an access to global, shared or private memory
3117 * and store the results in *kernel_access.
3119 * Since the array in shared or private memory is just
3120 * a shifted copy of part of the original array, we simply need
3121 * to subtract the lower bound, which was computed
3122 * in can_tile_for_shared_memory.
3123 * If any of the indices is strided, then we first add
3124 * shared_bound[i].shift and divide by shared_bound[i].stride.
3126 * If the given array is accessed directly from global memory,
3127 * we don't need to perform any shifting and simply simplify
3128 * the expression in the context of the domain instead.
3130 * If the array space (range of access) has no name, then we are
3131 * accessing an iterator in the original program.
3133 * The input stmt_access->access relation maps the iteration domain
3134 * of the current statement to an array element.
3135 * The first step is to reformulate
3136 * this access relation in terms of the loop iterators of the generated
3137 * code through precomposition with gen->stmt_it.
3139 * The expressions in "bounds" are formulated in terms of the first
3140 * gen->shared_len dimensions of the computed schedule using the mapping
3141 * sched2shared which maps the loop iterators to these dimensions.
3143 static void compute_index_expression(struct gpu_gen
*gen
,
3144 struct ppcg_kernel_access
*kernel_access
,
3145 struct gpu_stmt_access
*stmt_access
, __isl_keep isl_map
*stmt_it
,
3146 __isl_keep isl_map
*sched2shared
, __isl_keep isl_ast_build
*build
)
3149 isl_pw_multi_aff
*pma
;
3152 struct gpu_array_bound
*bounds
= NULL
;
3154 if (isl_map_has_tuple_name(stmt_access
->access
, isl_dim_out
)) {
3157 struct gpu_array_ref_group
*group
;
3160 name
= isl_map_get_tuple_name(stmt_access
->access
, isl_dim_out
);
3162 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3163 if (strcmp(name
, gen
->prog
->array
[i
].name
))
3165 kernel_access
->array
= &gen
->prog
->array
[i
];
3166 kernel_access
->local_array
= &gen
->kernel
->array
[i
];
3168 assert(kernel_access
->array
);
3169 group
= kernel_access
->array
->groups
[stmt_access
->group
];
3170 p
= isl_printer_to_str(gen
->ctx
);
3171 p
= print_array_name(p
, group
);
3172 kernel_access
->local_name
= isl_printer_get_str(p
);
3173 isl_printer_free(p
);
3174 bounds
= group
->private_bound
;
3175 kernel_access
->type
= ppcg_access_private
;
3177 bounds
= group
->shared_bound
;
3178 kernel_access
->type
= ppcg_access_shared
;
3182 kernel_access
->type
= ppcg_access_global
;
3184 n_index
= isl_map_dim(stmt_access
->access
, isl_dim_out
);
3185 kernel_access
->index
= isl_ast_expr_list_alloc(gen
->ctx
, n_index
);
3190 access
= isl_map_copy(stmt_access
->access
);
3191 access
= isl_map_apply_range(isl_map_copy(stmt_it
), access
);
3192 pma
= isl_pw_multi_aff_from_map(access
);
3193 pma
= isl_pw_multi_aff_coalesce(pma
);
3195 for (i
= 0; i
< n_index
; ++i
) {
3200 index
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
3202 if (!kernel_access
->array
) {
3203 } else if (!bounds
) {
3204 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3205 index
= isl_pw_aff_coalesce(index
);
3206 index
= isl_pw_aff_gist(index
, domain
);
3208 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3209 index
= shift_index(index
, kernel_access
->array
,
3210 &bounds
[i
], domain
, isl_map_copy(sched2shared
));
3213 expr
= isl_ast_build_expr_from_pw_aff(build
, index
);
3215 kernel_access
->index
= isl_ast_expr_list_add(
3216 kernel_access
->index
, expr
);
3219 isl_pw_multi_aff_free(pma
);
3222 /* This function is called for each instance of a user statement
3225 * We attach a struct ppcg_kernel_stmt to the "node", containing
3226 * local information about the accesses.
3227 * This information is computed from stmt_it, which expresses the domain
3228 * elements in terms of the generated loops, and sched2shared,
3229 * which expresses the first shared_len dimensions of the schedule
3230 * computed by PPCG in terms of the generated loops.
3232 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3233 __isl_keep isl_ast_build
*build
, void *user
)
3235 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3236 struct ppcg_kernel_stmt
*stmt
;
3238 isl_map
*stmt_it
, *sched2shared
;
3239 isl_ast_expr
*expr
, *arg
;
3240 isl_union_map
*schedule
;
3242 struct gpu_stmt_access
*access
;
3244 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3246 return isl_ast_node_free(node
);
3248 expr
= isl_ast_node_user_get_expr(node
);
3249 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3250 id
= isl_ast_expr_get_id(arg
);
3252 schedule
= isl_ast_build_get_schedule(build
);
3253 stmt_it
= isl_map_reverse(isl_map_from_union_map(schedule
));
3254 sched2shared
= compute_sched_to_shared(gen
, isl_map_copy(stmt_it
));
3256 stmt
->type
= ppcg_kernel_domain
;
3257 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3258 if (!stmt
->u
.d
.stmt
)
3262 for (access
= stmt
->u
.d
.stmt
->accesses
; access
; access
= access
->next
)
3265 stmt
->u
.d
.access
= isl_calloc_array(gen
->ctx
,
3266 struct ppcg_kernel_access
, n
);
3267 if (!stmt
->u
.d
.access
)
3270 stmt
->u
.d
.n_access
= n
;
3272 access
= stmt
->u
.d
.stmt
->accesses
;
3273 for (i
= 0; i
< n
; ++i
, access
= access
->next
) {
3274 compute_index_expression(gen
, &stmt
->u
.d
.access
[i
], access
,
3275 stmt_it
, sched2shared
, build
);
3279 isl_map_free(stmt_it
);
3280 isl_map_free(sched2shared
);
3281 isl_ast_expr_free(arg
);
3282 isl_ast_expr_free(expr
);
3284 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3285 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3286 return isl_ast_node_set_annotation(node
, id
);
3289 isl_map_free(stmt_it
);
3290 ppcg_kernel_stmt_free(stmt
);
3291 isl_map_free(sched2shared
);
3292 return isl_ast_node_free(node
);
3295 /* This function is called when code has been generated for the shared
3296 * tile loops. The "schedule" refers only to the original statements.
3298 * We extend the schedule with that part of gen->local_sched that hasn't
3299 * been taken into account yet. This introduces parameters referring
3300 * to thread ids in the schedule, so we add them (with the appropriate
3301 * bounds to the context as well).
3302 * Finally, we set the appropriate unrolling options
3303 * if gen->first_unroll is set.
3305 static __isl_give isl_ast_node
*create_domain_leaf(
3306 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
3309 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3311 isl_union_map
*sched
;
3314 isl_id_list
*iterators
;
3317 schedule
= extend_schedule(schedule
,
3318 isl_union_map_copy(gen
->local_sched
),
3319 gen
->shared_len
, gen
->thread_tiled_len
);
3321 space
= isl_ast_build_get_schedule_space(build
);
3322 set
= isl_set_universe(space
);
3323 set
= add_bounded_parameters(set
, gen
->n_block
, gen
->block_dim
, "t");
3324 build
= isl_ast_build_restrict(build
, set
);
3326 n
= gen
->thread_tiled_len
- gen
->shared_len
;
3328 if (gen
->first_unroll
>= 0) {
3329 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
3330 build
= set_unroll(build
, space
, gen
->first_unroll
);
3332 iterators
= generate_names(gen
->ctx
, n
, "c");
3333 build
= isl_ast_build_set_iterators(build
, iterators
);
3334 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
3335 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
3336 isl_ast_build_free(build
);
3341 /* This function is called for each leaf in the AST of the code
3342 * for copying to or from shared/private memory.
3343 * The statement name is {read,write}_{shared,private}_<array>.
3345 * The schedule is of the form
3349 * where A refers to a piece of an array and T to the corresponding
3350 * shifted tile. We split this schedule into mappings L -> A and L -> T
3351 * and store the corresponding expressions in stmt->index and stmt->local_index,
3352 * where stmt represents the copy statement.
3354 static __isl_give isl_ast_node
*create_copy_leaf(
3355 __isl_take isl_ast_build
*build
, void *user
)
3357 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3358 struct ppcg_kernel_stmt
*stmt
;
3363 isl_map
*access
, *local_access
, *map
;
3364 isl_pw_multi_aff
*pma
;
3368 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3370 return isl_ast_build_free(build
);
3372 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
3373 name
= isl_map_get_tuple_name(access
, isl_dim_in
);
3374 stmt
->u
.c
.read
= !strncmp(name
, "read", 4);
3375 access
= isl_map_reverse(access
);
3376 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
3377 local_access
= isl_map_copy(access
);
3379 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
3380 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
3381 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3382 access
= isl_map_apply_range(access
, map
);
3383 pma
= isl_pw_multi_aff_from_map(access
);
3384 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3385 stmt
->u
.c
.index
= expr
;
3387 map
= isl_map_range_map(isl_map_universe(space
));
3388 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
3389 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3390 local_access
= isl_map_apply_range(local_access
, map
);
3391 pma
= isl_pw_multi_aff_from_map(local_access
);
3392 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3393 stmt
->u
.c
.local_index
= expr
;
3395 stmt
->u
.c
.array
= gen
->copy_group
->array
;
3396 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
3397 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
3398 stmt
->type
= ppcg_kernel_copy
;
3400 space
= isl_ast_build_get_schedule_space(build
);
3401 space
= isl_space_from_domain(space
);
3402 space
= isl_space_set_tuple_name(space
, isl_dim_out
, name
);
3403 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
3404 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
3405 node
= isl_ast_node_alloc_user(expr
);
3406 isl_ast_build_free(build
);
3408 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3409 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3410 return isl_ast_node_set_annotation(node
, id
);
3413 /* Given a schedule of the form
3417 * (with S the first shared_len dimensions of the computed schedule,
3418 * A the array and L the schedule correponding to the generated loops),
3419 * indicating where the copying the array elements that need to be copied,
3420 * construct code for performing the copying.
3422 * "group" is the array reference group that is being copied
3423 * "type" is either "read" or "write"
3424 * private is set if copying needs to be performed to/from registers
3426 * We first construct a mapping to a shifted tile of the array,
3428 * [S -> A] -> T(S,A) (1)
3430 * If private is set, then we also use this mapping as a schedule
3431 * (which is already thread-specific and will be completely unrolled).
3432 * Otherwise, we wrap/tile the range over the threads.
3435 * [S -> A] -> T'(S,A)
3437 * Combined with the given schedule, we have
3439 * [S -> A] -> [L -> T'(S,A)] (2)
3441 * From the shifted tile mapping, we construct a mapping
3443 * [S -> A] -> [A -> T(S,A)]
3445 * and apply it to the schedule (2), obtaining
3447 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
3449 * Note that we can project out S because it is uniquely defined by L.
3451 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
3452 __isl_take isl_map
*sched
,
3453 const char *type
, struct gpu_array_ref_group
*group
,
3454 __isl_take isl_ast_build
*build
, int private)
3456 const char *array_name
;
3457 const char *mem
= private ? "private" : "shared";
3461 isl_map
*schedule
, *shift
, *map
;
3463 isl_id_list
*iterators
;
3466 shift
= isl_set_unwrap(isl_map_domain(isl_map_copy(sched
)));
3467 array_name
= isl_map_get_tuple_name(shift
, isl_dim_out
);
3468 shift
= shift_access(shift
, group
);
3470 schedule
= isl_map_copy(shift
);
3472 schedule
= tile_access_schedule(gen
, schedule
);
3474 n
= isl_map_dim(schedule
, isl_dim_out
);
3475 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
3476 set
= add_bounded_parameters(set
, gen
->n_block
, gen
->block_dim
, "t");
3478 schedule
= isl_map_range_product(sched
, schedule
);
3481 name
= isl_alloc_array(gen
->ctx
, char,
3482 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
3483 if (group
->array
->n_group
> 1)
3484 sprintf(name
, "%s_%s_%s_%d", type
, mem
, array_name
, group
->nr
);
3486 sprintf(name
, "%s_%s_%s", type
, mem
, array_name
);
3487 shift
= isl_map_set_tuple_name(shift
,
3488 isl_dim_out
, name
+ strlen(type
) + 1);
3490 space
= isl_space_domain(isl_map_get_space(shift
));
3491 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
3492 map
= isl_map_range_product(map
, shift
);
3494 schedule
= isl_map_apply_domain(schedule
, map
);
3496 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, name
);
3499 build
= isl_ast_build_restrict(build
, set
);
3501 gen
->copy_group
= group
;
3502 gen
->copy_bound
= group
->shared_bound
;
3505 space
= isl_space_range(isl_map_get_space(schedule
));
3506 space
= isl_space_range(isl_space_unwrap(space
));
3507 build
= set_unroll(build
, space
, 0);
3509 iterators
= generate_names(gen
->ctx
, n
, "c");
3510 build
= isl_ast_build_set_iterators(build
, iterators
);
3511 build
= isl_ast_build_set_create_leaf(build
, &create_copy_leaf
, gen
);
3512 tree
= isl_ast_build_ast_from_schedule(build
,
3513 isl_union_map_from_map(schedule
));
3514 isl_ast_build_free(build
);
3519 /* Return code for reading into or writing from shared memory
3520 * the given array reference group.
3522 * If we are performing a read from global memory to shared memory and
3523 * if the array involved is not a scalar, then we copy
3524 * the entire tile to shared memory. This may result in some extra
3525 * elements getting copied, but it should lead to simpler code
3526 * (which means that fewer registers may be needed) and less divergence.
3528 * Otherwise, we only copy the elements that will be read or have been written
3532 * The input "sched" is of the form.
3536 * with S the first shared_len dimensions of the computed schedule,
3537 * A the array and L the schedule correponding to the generated loops.
3539 * We first drop "type",
3543 * If the above conditions are satisfied, we project out A,
3548 * and then introduce the group tile [S -> T], resulting in
3552 static __isl_give isl_ast_node
*copy_group_shared_accesses(
3553 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3554 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3558 isl_union_map
*access
;
3560 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3561 read
= !strcmp(type
, "read");
3563 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3565 if (read
&& group
->array
->n_index
> 0) {
3569 space
= isl_space_domain(isl_map_get_space(sched
));
3570 space
= isl_space_unwrap(space
);
3571 map
= isl_map_domain_map(isl_map_universe(space
));
3572 sched
= isl_map_apply_domain(sched
, map
);
3574 map
= group_tile(group
);
3575 map
= isl_map_reverse(isl_map_domain_map(map
));
3576 sched
= isl_map_apply_domain(sched
, map
);
3579 return copy_access(gen
, sched
, type
, group
, build
, 0);
3582 /* Return code for reading into or writing from private memory
3583 * the given array reference group.
3585 * Let S be the first shared_len dimensions of the computed schedule,
3586 * D the iteration domains, A the array and L the schedule correponding
3587 * to the generated loops.
3588 * "sched" is of the form
3592 * where type is either "read" or "write".
3593 * We apply the privatization D -> S(t), with t the thread ids,
3594 * to the access relation D -> A to obtain the privatized access relation
3598 * We drop the type from "sched" and intersect with the privatized access
3599 * relation to obtain
3603 static __isl_give isl_ast_node
*copy_group_private_accesses(
3604 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3605 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3609 isl_union_map
*priv
;
3610 isl_union_map
*access
;
3611 isl_map
*access_map
;
3613 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3614 read
= !strcmp(type
, "read");
3616 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3617 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3620 access
= group_access_relation(group
, read
, !read
);
3621 access
= isl_union_map_apply_domain(access
, priv
);
3622 access_map
= isl_map_from_union_map(access
);
3624 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3625 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
3627 return copy_access(gen
, sched
, type
, group
, build
, 1);
3630 /* Return code for reading into or writing from shared or private memory.
3632 * "schedule" is of the form
3636 * with S be the first shared_len dimensions of the computed schedule,
3637 * A the array and L the schedule correponding to the generated loops.
3638 * The array reference group is attached to "type".
3640 static __isl_give isl_ast_node
*create_access_leaf(
3641 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3642 __isl_take isl_ast_build
*build
)
3644 struct gpu_array_ref_group
*group
;
3647 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
3648 group
= isl_id_get_user(id
);
3651 if (group
->private_bound
)
3652 return copy_group_private_accesses(gen
, group
, schedule
,
3655 return copy_group_shared_accesses(gen
, group
, schedule
,
3659 /* Create a domain node representing a synchronization.
3661 static __isl_give isl_ast_node
*create_sync_leaf(
3662 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3663 __isl_take isl_ast_build
*build
)
3665 struct ppcg_kernel_stmt
*stmt
;
3671 isl_map_free(schedule
);
3673 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3677 stmt
->type
= ppcg_kernel_sync
;
3679 space
= isl_ast_build_get_schedule_space(build
);
3680 space
= isl_space_from_domain(space
);
3681 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
3682 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
3683 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
3684 node
= isl_ast_node_alloc_user(expr
);
3685 isl_ast_build_free(build
);
3687 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3688 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3689 return isl_ast_node_set_annotation(node
, id
);
3692 /* This function is called during the code generation at the point
3693 * where the schedule domain element is completely determined by
3694 * the generated code. The input schedule contains the original
3695 * statements as well as synchronization and copy "statements".
3696 * The latter are scheduled at different points than any of the original
3697 * statements, so they will only arrive here in isolation.
3699 * If the current schedule only refers to a single statement,
3700 * we check if it is a copy or synchronization statement and
3701 * call the appropriate functions.
3702 * Otherwise, we assume we are dealing with the original statements
3703 * and we call create_domain_leaf.
3705 static __isl_give isl_ast_node
*create_kernel_leaf(
3706 __isl_take isl_ast_build
*build
, void *user
)
3708 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3710 isl_union_map
*schedule
;
3713 schedule
= isl_ast_build_get_schedule(build
);
3715 if (isl_union_map_n_map(schedule
) != 1)
3716 return create_domain_leaf(schedule
, build
, user
);
3718 map
= isl_map_from_union_map(schedule
);
3719 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
3720 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
3721 return create_access_leaf(gen
, map
, build
);
3722 if (!strcmp(name
, "sync"))
3723 return create_sync_leaf(gen
, map
, build
);
3725 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
3728 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
3729 * have value 0) and all even schedule dimensions as "unroll".
3731 * That is, the options look as follows
3733 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
3734 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
3736 * The even positions are used to be able to schedule copying blocks
3737 * and synchronization before or after each level of the shared memory
3738 * tile loops and we want to make sure that code for these is generated
3739 * separately (within each level).
3741 static __isl_give isl_ast_build
*set_atomic_and_unroll(
3742 __isl_take isl_ast_build
*build
,
3743 __isl_take isl_space
*space
, int sched_len
)
3749 isl_local_space
*ls
;
3752 ctx
= isl_ast_build_get_ctx(build
);
3754 space
= isl_space_params(space
);
3755 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
3756 space
= isl_space_from_domain(space
);
3757 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
3758 map
= isl_map_universe(isl_space_copy(space
));
3759 for (i
= 0; i
< sched_len
; i
+= 2)
3760 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
3761 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3762 c
= isl_equality_alloc(ls
);
3763 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3764 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3765 c
= isl_constraint_set_constant_si(c
, 1);
3766 map
= isl_map_add_constraint(map
, c
);
3767 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3768 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
3769 opt
= isl_union_map_from_map(map
);
3771 map
= isl_map_universe(space
);
3772 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3773 c
= isl_equality_alloc(ls
);
3774 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3775 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3776 map
= isl_map_add_constraint(map
, c
);
3777 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3778 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
3779 opt
= isl_union_map_add_map(opt
, map
);
3781 build
= isl_ast_build_set_options(build
, opt
);
3786 /* Return a map that maps a space of dimension gen->shared_len
3787 * to its last dimensions starting at gen->tile_first.
3788 * The range is of dimension
3790 * 2 * (gen->shared_len - gen->tile_first) + 1
3792 * The input dimensions are mapped to the odd dimensions in the output,
3793 * while the even dimensions (except 2*pos) are fixed to 0.
3794 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
3795 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
3796 * are mapped to the output. The remaining input dimensions are projected
3797 * out and the corresponding output dimensions are fixed to 0.
3799 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
3800 __isl_take isl_space
*space
, int pos
, int val
)
3805 space
= isl_space_set_from_params(space
);
3806 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
3807 space
= isl_space_map_from_set(space
);
3808 proj
= isl_map_identity(space
);
3809 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
3810 n
= gen
->shared_len
- gen
->tile_first
;
3811 for (i
= 0; i
<= n
; ++i
) {
3812 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
3814 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
3816 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
3822 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
3823 gen
->shared_len
- (gen
->tile_first
+ pos
));
3824 for (i
= pos
; i
< n
; ++i
)
3825 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
3830 /* Given the AST context schedule "schedule" and the mapping from
3831 * domains to the shared tile loops "shared_sched", add a schedule
3832 * for a synchronization operation at position "val" of loop level "pos".
3834 * schedule is of the form
3838 * (with D the iteration domains and L the already generated loops),
3839 * while shared_sched is of the form
3843 * We combine them into
3849 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3851 * and use the result as a schedule for "sync".
3853 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
3854 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3855 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
3858 isl_map
*proj
, *map
;
3860 shared_sched
= isl_union_map_copy(shared_sched
);
3861 schedule
= isl_union_map_copy(schedule
);
3863 space
= isl_union_map_get_space(shared_sched
);
3864 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
3865 map
= isl_map_from_union_map(schedule
);
3867 proj
= insert_even(gen
, space
, pos
, val
);
3868 map
= isl_map_apply_range(map
, proj
);
3869 map
= isl_map_from_range(isl_map_wrap(map
));
3870 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
3872 res
= isl_union_map_add_map(res
, map
);
3877 /* Given the AST context schedule "schedule" and the mapping from
3878 * domains to the shared tile loops "shared_sched", add a schedule
3879 * for copying an array reference group to/from shared/private memory.
3880 * "read" is set if data should be copied from global memory
3881 * to shared/private memory.
3882 * "k" represents the current group
3883 * "s" is the total number of groups
3885 * We schedule an operation before or after the innermost loop
3886 * of "shared_sched" that affects the tile of the array reference group.
3888 * schedule is of the form
3892 * (with D the iteration domains and L the already generated loops),
3893 * while shared_sched is of the form
3897 * We first compute the access relation for the reference group
3901 * and combine it with shared_sched into
3905 * If this results in an empty relation, no copying needs to be performed
3907 * Otherwise, we invert the relation and combine it with "schedule" into
3911 * The actual additional piece of the schedule is obtained from combining
3917 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3919 * The position of "val" corresponds to the innermost loop that affects
3920 * the tile and the value indicates where the copying is scheduled
3921 * with respect to the actual kernel code (at value 0).
3922 * Reads are schedule before the code, writes to global memory from
3923 * private memory are scheduled at values 1 to s, writes to global
3924 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
3926 * If we are scheduling a read from global memory to shared memory,
3927 * we insert a synchronization before the kernel code (at the innermost
3929 * If we are scheduling a write to global memory, then we add
3930 * a synchronization after all writes (at value 2 *s + 2).
3931 * However, there is no need for a synchronization after the outermost loop.
3932 * A write to global memory from private memory at the innermost level
3933 * does not require a synchronization, because it is covered by
3934 * the synchronization after the kernel inserted by body_schedule.
3936 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
3937 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3938 __isl_keep isl_union_map
*shared_sched
,
3939 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
3944 isl_union_map
*access
;
3945 isl_map
*map
, *proj
, *access_map
;
3948 access
= group_access_relation(group
, read
, !read
);
3949 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
3952 if (isl_union_map_is_empty(access
)) {
3953 isl_union_map_free(access
);
3957 access
= isl_union_map_reverse(access
);
3958 access
= isl_union_map_apply_range(access
,
3959 isl_union_map_copy(schedule
));
3960 access_map
= isl_map_from_union_map(access
);
3962 space
= isl_space_copy(group
->array
->dim
);
3963 space
= isl_space_from_range(space
);
3964 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
3965 map
= isl_map_domain_map(isl_map_universe(space
));
3967 space
= isl_union_map_get_space(schedule
);
3968 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
3971 else if (group
->private_bound
)
3974 val
= 1 + s
+ 1 + k
;
3975 proj
= insert_even(gen
, space
, pos
, val
);
3976 map
= isl_map_apply_range(map
, proj
);
3978 access_map
= isl_map_range_product(access_map
, map
);
3980 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
3981 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
3983 res
= isl_union_map_add_map(res
, access_map
);
3985 n
= gen
->shared_len
- gen
->tile_first
;
3987 if (!group
->private_bound
)
3988 res
= add_sync_schedule(gen
, res
, schedule
,
3989 shared_sched
, n
, -1);
3993 if (pos
== n
&& group
->private_bound
)
3995 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4002 /* Return a schedule for the shared tile loops based on the current
4003 * AST context schedule.
4005 * We create a "shared_sched" that maps the domains to the first
4006 * shared_len dimensions of the computed schedule, project out the
4007 * first tile_first dimensions (as these are already covered by
4008 * the host code) and insert "statement-level" dimensions at even
4009 * positions so that we can schedule copy blocks and synchronization
4010 * before/after each level.
4012 * In particular, copy blocks are inserted inside the innermost
4013 * level that affect the tile. For the copying to global memory,
4014 * those from private memory are scheduled before those from shared
4015 * memory such that synchronization can be inserted between the two
4016 * at the innermost level.
4017 * Synchronization is inserted at the innermost level before the
4018 * actual kernel code if there is any copying from global memory
4019 * to shared memory. It is inserted unconditionally at the innermost
4020 * level after the actual kernel code and the copying to global memory
4021 * from private memory (if any). Finally, it is inserted after
4022 * any copying to global memory, except at the outermost level
4023 * and at the innermost level if there is no copying from shared
4024 * memory. The copying from private memory is covered by the unconditional
4025 * synchronization at the innermost level.
4027 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4028 __isl_take isl_union_map
*schedule
)
4032 isl_union_map
*shared_sched
;
4033 isl_union_map
*sched
;
4034 isl_map
*proj
, *map
;
4037 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4038 proj
= projection(isl_union_map_get_space(shared_sched
),
4039 gen
->tiled_len
, gen
->shared_len
);
4040 shared_sched
= isl_union_map_apply_range(shared_sched
,
4041 isl_union_map_from_map(proj
));
4042 space
= isl_union_map_get_space(shared_sched
);
4043 proj
= insert_even(gen
, space
, -1, 0);
4044 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4045 isl_union_map_from_map(proj
));
4047 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4050 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4051 s
+= gen
->prog
->array
[i
].n_group
;
4054 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4055 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4057 for (j
= 0; j
< array
->n_group
; ++j
) {
4058 struct gpu_array_ref_group
*group
;
4060 group
= array
->groups
[j
];
4061 if (!group
->private_bound
&& !group
->shared_bound
)
4063 res
= add_group_schedule(gen
, res
, schedule
,
4064 shared_sched
, group
, 0, k
, s
);
4065 res
= add_group_schedule(gen
, res
, schedule
,
4066 shared_sched
, group
, 1, k
, s
);
4071 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4072 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4074 isl_union_map_free(shared_sched
);
4075 isl_union_map_free(schedule
);
4080 /* Generate code for "kernel" in the given "context".
4082 * We first generate code for the shared tile loops (T1T, T1P and T2)
4083 * in a context that includes the block ids.
4084 * Within each iteration of these loops an additional code generation
4085 * is performed (within create_kernel_leaf) for the rest of the schedule
4086 * in a context that includes the thread ids.
4088 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4089 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4090 __isl_keep isl_multi_pw_aff
*grid_size
)
4094 isl_id_list
*iterators
;
4095 isl_union_map
*schedule
;
4099 schedule
= isl_ast_build_get_schedule(build
);
4101 build
= isl_ast_build_copy(build
);
4102 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4103 space
= isl_ast_build_get_schedule_space(build
);
4104 set
= isl_set_universe(isl_space_copy(space
));
4105 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4106 build
= isl_ast_build_restrict(build
, set
);
4108 schedule
= body_schedule(gen
, schedule
);
4110 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4112 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4113 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4114 build
= isl_ast_build_set_iterators(build
, iterators
);
4115 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4116 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4117 isl_ast_build_free(build
);
4122 /* Attach "id" to the given node.
4124 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4125 __isl_keep isl_ast_build
*build
, void *user
)
4129 node
= isl_ast_node_set_annotation(node
, id
);
4134 /* Construct an AST node for performing a kernel launch and attach
4135 * the information about the kernel to that node.
4137 * The kernel AST has been constructed in the context of the range
4138 * of "schedule". In particular, the grid size has been computed
4139 * in the context. We therefore still need to make sure that these
4140 * constraints are expressed in the code. We do this by creating a schedule
4142 * kernel[] -> [S -> []]
4144 * where S is the schedule domain, i.e., the range of "schedule".
4145 * The AST generation will then create a single call surrounded by
4146 * all the condition in "S" that have not been expressed yet.
4148 * The kernel information is attached to this node in attach_id.
4150 static __isl_give isl_ast_node
*construct_launch(
4151 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4152 __isl_take
struct ppcg_kernel
*kernel
)
4156 isl_union_set
*domain
;
4161 ctx
= isl_ast_build_get_ctx(build
);
4163 id
= isl_id_alloc(ctx
, NULL
, kernel
);
4164 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
4166 domain
= isl_union_map_range(schedule
);
4167 set
= isl_set_from_union_set(domain
);
4168 map
= isl_map_from_domain(set
);
4169 map
= isl_map_from_range(isl_map_wrap(map
));
4170 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
4171 schedule
= isl_union_map_from_map(map
);
4173 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
4174 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
4175 isl_ast_build_free(build
);
4180 /* This function is called for each leaf in the AST of the host code.
4181 * We first specialize the schedule to the site of the leaf, compute
4182 * the size of shared memory and then construct the body of host code
4183 * and the associated kernel.
4185 * The necessary information for printing the kernel launch is
4186 * stored in a struct ppcg_kernel and attached to the leaf node
4187 * created to represent the launch.
4189 static __isl_give isl_ast_node
*create_host_leaf(
4190 __isl_take isl_ast_build
*build
, void *user
)
4192 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4195 struct ppcg_kernel
*kernel
;
4196 isl_set
*host_domain
;
4197 isl_union_map
*schedule
;
4198 isl_union_map
*local_sched
;
4199 isl_union_map
*access
;
4200 isl_union_set
*domain
;
4203 schedule
= isl_ast_build_get_schedule(build
);
4205 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
4208 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
4210 local_sched
= isl_union_map_copy(gen
->sched
);
4211 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
4212 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
4213 isl_union_map_copy(gen
->prog
->write
));
4214 access
= isl_union_map_apply_domain(access
,
4215 isl_union_map_copy(local_sched
));
4217 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
4218 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
4219 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
4221 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4225 kernel
->id
= gen
->kernel_id
++;
4226 kernel
->n_block
= gen
->n_block
;
4227 for (i
= 0; i
< gen
->n_block
; ++i
)
4228 kernel
->block_dim
[i
] = gen
->block_dim
[i
];
4229 kernel
->n_grid
= gen
->n_grid
;
4230 for (i
= 0; i
< gen
->n_grid
; ++i
)
4231 kernel
->grid_dim
[i
] = gen
->grid_dim
[i
];
4232 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
4233 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
4234 kernel
->arrays
= isl_union_map_range(access
);
4235 kernel
->space
= isl_ast_build_get_schedule_space(build
);
4237 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
4239 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
4240 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
4242 gen
->private_access
= NULL
;
4243 compute_shared_sched(gen
);
4244 gen
->privatization
= compute_privatization(gen
);
4245 group_references(gen
);
4246 compute_private_size(gen
);
4247 check_shared_memory_bound(gen
);
4248 host_domain
= isl_set_from_union_set(isl_union_map_range(
4249 isl_union_map_copy(schedule
)));
4250 localize_bounds(gen
, kernel
, host_domain
);
4252 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
4254 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
4256 create_kernel_vars(gen
, kernel
);
4258 free_local_array_info(gen
);
4259 isl_map_free(gen
->privatization
);
4260 isl_union_map_free(gen
->private_access
);
4261 isl_union_map_free(gen
->local_sched
);
4262 isl_union_map_free(gen
->tiled_sched
);
4263 isl_union_map_free(gen
->shared_sched
);
4264 isl_union_map_free(gen
->shared_proj
);
4265 isl_set_free(host_domain
);
4266 free(gen
->tile_size
);
4268 node
= construct_launch(build
, schedule
, kernel
);
4272 isl_union_map_free(schedule
);
4276 /* Use isl to generate code for the outer gen->tile_first loops
4277 * of the global schedule in gen->sched, resulting in the host code.
4278 * Within each iteration of this partial schedule, i.e., for each kernel
4279 * launch, create_host_leaf takes care of generating the kernel code.
4281 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
4283 isl_ast_build
*build
;
4285 isl_union_map
*sched
;
4287 isl_id_list
*iterators
;
4289 sched
= isl_union_map_copy(gen
->sched
);
4290 proj
= projection(isl_union_map_get_space(sched
),
4291 gen
->untiled_len
, gen
->tile_first
);
4292 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4294 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
4295 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
4296 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
4297 build
= isl_ast_build_set_iterators(build
, iterators
);
4298 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
4299 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
4300 isl_ast_build_free(build
);
4305 __isl_give isl_set
*add_context_from_str(__isl_take isl_set
*set
,
4314 ctx
= isl_set_get_ctx(set
);
4315 context
= isl_set_read_from_str(ctx
, str
);
4316 context
= isl_set_align_params(context
, isl_set_get_space(set
));
4317 set
= isl_set_intersect(set
, context
);
4322 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
4326 return isl_union_map_read_from_str(ctx
, str
);
4329 /* Information about the outermost tilable bands in the forest of bands.
4331 * tile_len and n_parallel are only sets on band_info structures
4332 * that correspond to outermost bands. For other bands (in particular,
4333 * ancestors of the outermost bands), n_parallal is set to 0.
4335 * prefix is the (padded) schedule leading up to the outermost tilable bands.
4337 * tile_first is the number of schedule dimensions in prefix.
4339 * suffix is the schedule of the outermost tilable bands and their descendants.
4342 struct gpu_gen
*gen
;
4346 isl_union_map
*prefix
;
4347 isl_union_map
*suffix
;
4350 /* Set tile_len and n_parallel of the statement to that of
4351 * their outermost band, recorded in the band_info.
4353 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
4355 struct band_info
*info
= user
;
4356 struct gpu_stmt
*stmt
;
4359 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
4360 stmt
= find_stmt(info
->gen
->prog
, id
);
4363 stmt
->tile_len
= info
->tile_len
;
4364 stmt
->n_parallel
= info
->n_parallel
;
4371 static void list_select_outer_band(struct gpu_gen
*gen
,
4372 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
4374 /* Check if this band has any parallel loops. If so, take it as
4375 * the outermost tilable band. If not, continue looking for the
4376 * outermost tilable band in the children of the current band.
4378 static void band_select_outer_band(struct gpu_gen
*gen
,
4379 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
4381 int n
= isl_band_n_member(band
);
4384 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
4385 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
4388 info
->n_parallel
= n_parallel
;
4391 info
->tile_first
= pos
;
4393 info
->prefix
= isl_band_get_prefix_schedule(band
);
4394 info
->suffix
= isl_union_map_flat_range_product(
4395 isl_band_get_partial_schedule(band
),
4396 isl_band_get_suffix_schedule(band
));
4397 isl_union_map_foreach_map(info
->prefix
,
4398 &set_stmt_tile_len
, info
);
4399 } else if (isl_band_has_children(band
)) {
4400 isl_band_list
*children
;
4401 children
= isl_band_get_children(band
);
4402 list_select_outer_band(gen
, children
, pos
+ n
, info
);
4405 info
->tile_first
= pos
+ n
;
4407 info
->prefix
= isl_union_map_flat_range_product(
4408 isl_band_get_prefix_schedule(band
),
4409 isl_band_get_partial_schedule(band
));
4410 info
->suffix
= isl_band_get_suffix_schedule(band
);
4411 isl_union_map_foreach_map(info
->prefix
,
4412 &set_stmt_tile_len
, info
);
4415 isl_band_free(band
);
4418 /* Comparison function that returns a non-zero value for band_infos
4419 * with different tile_len fields or different n_parallel fields.
4421 static int cmp_band(const void *p1
, const void *p2
)
4423 const struct band_info
*info1
= p1
;
4424 const struct band_info
*info2
= p2
;
4426 if (info1
->tile_len
!= info2
->tile_len
)
4427 return info1
->tile_len
- info2
->tile_len
;
4429 return info1
->n_parallel
- info2
->n_parallel
;
4432 /* Extend "umap" with coordinates with fixed value "val"
4433 * to a total length of "dst_len", assuming the original dimension is "src_len".
4435 static __isl_give isl_union_map
*extend_range(
4436 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4442 dim
= isl_union_map_get_space(umap
);
4443 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4444 for (i
= src_len
; i
< dst_len
; ++i
)
4445 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4447 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4452 /* Group bands with the same values for tile_len and n_parallel.
4453 * The prefix schedule is then extended with a fixed coordinate that
4454 * is different for each such group.
4455 * Note that the actual values for this coordinate are not important.
4456 * The bands have already been effectively separated at a higher level
4457 * or they are independent and may be executed in parallel.
4458 * The list of band_info has been sorted before this functions is called.
4460 static void separate_bands(struct band_info
*info
, int n
)
4465 for (i
= 0; i
< n
; ++i
) {
4466 int l
= info
[i
].tile_first
;
4469 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
4470 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
4473 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4475 info
[i
].tile_first
= l
+ 1;
4479 /* Select the outermost bands in the elements of the list, align
4480 * their prefix schedules, separate bands with different values
4481 * for tile_len and/or n_parallel and then combine the resulting
4482 * prefix and suffix schedules into a single pair of prefix and
4483 * suffix schedules for the entire list.
4485 static void list_select_outer_band(struct gpu_gen
*gen
,
4486 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
4490 int n
= isl_band_list_n_band(list
);
4491 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
4492 struct band_info
*info
;
4494 isl_union_map
*prefix
;
4495 isl_union_map
*suffix
;
4498 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4502 for (i
= 0; i
< n
; ++i
) {
4503 band
= isl_band_list_get_band(list
, i
);
4504 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
4505 if (info
[i
].tile_first
> max_tile_first
)
4506 max_tile_first
= info
[i
].tile_first
;
4509 for (i
= 0; i
< n
; ++i
) {
4510 if (info
[i
].tile_first
== max_tile_first
)
4512 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4513 info
[i
].tile_first
, max_tile_first
, 0);
4514 info
[i
].tile_first
= max_tile_first
;
4517 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
4519 for (i
= 0; i
< n
- 1; ++i
)
4520 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
4521 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
4525 separate_bands(info
, n
);
4527 prefix
= info
[0].prefix
;
4528 suffix
= info
[0].suffix
;
4530 for (i
= 1; i
< n
; ++i
) {
4531 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4532 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4535 list_info
->tile_first
= info
[0].tile_first
;
4536 list_info
->tile_len
= -1;
4537 list_info
->prefix
= prefix
;
4538 list_info
->suffix
= suffix
;
4540 isl_band_list_free(list
);
4544 /* Select the outermost tilable band that (by construction)
4545 * has at least one parallel loop.
4546 * The starting position of the aligned band is stored in the pair
4548 * The sizes and number of parallel loops may be different in different
4549 * parts of the band forest and are therefore stored in the gpu_stmts.
4551 * Return the complete schedule, with the tilable bands aligned
4552 * at gen->tile_first and padded with zero, if needed.
4554 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4555 __isl_keep isl_schedule
*schedule
)
4557 isl_band_list
*list
;
4558 struct band_info info
;
4560 gen
->n_parallel
= 0;
4563 list
= isl_schedule_get_band_forest(schedule
);
4565 list_select_outer_band(gen
, list
, 0, &info
);
4567 gen
->tile_first
= info
.tile_first
;
4568 info
.suffix
= align_range(info
.suffix
);
4570 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4573 /* Set gen->untiled_len to the number of scheduling dimensions
4574 * for the schedule of the first domain.
4575 * We assume here that this number is the same for all domains.
4577 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4579 unsigned *untiled_len
= user
;
4581 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4587 /* Compute an appropriate schedule based on the accesses in
4588 * gen->read and gen->write.
4590 * We first compute dependences and then use those to compute
4591 * a schedule that has a parallel loop in each tilable band.
4592 * Finally, we select the outermost tilable band.
4594 static void compute_schedule(struct gpu_gen
*gen
,
4595 __isl_take isl_union_map
*sched
)
4597 isl_union_set
*domain
;
4598 isl_union_map
*empty
;
4599 isl_union_map
*dep_raw
, *dep2
, *dep3
, *dep
;
4600 isl_union_map
*uninitialized
;
4601 isl_schedule
*schedule
;
4603 empty
= isl_union_map_empty(isl_union_map_get_space(sched
));
4605 isl_union_map_compute_flow(isl_union_map_copy(gen
->prog
->read
),
4606 isl_union_map_copy(gen
->prog
->write
), empty
,
4607 isl_union_map_copy(sched
),
4608 &dep_raw
, NULL
, &uninitialized
, NULL
);
4609 isl_union_map_compute_flow(isl_union_map_copy(gen
->prog
->write
),
4610 isl_union_map_copy(gen
->prog
->write
),
4611 isl_union_map_copy(gen
->prog
->read
),
4612 isl_union_map_copy(sched
),
4613 &dep2
, &dep3
, NULL
, NULL
);
4614 isl_union_map_free(sched
);
4616 gen
->prog
->copy_in
= isl_union_map_range(uninitialized
);
4618 dep
= isl_union_map_union(dep2
, dep3
);
4619 dep
= isl_union_map_union(dep
, dep_raw
);
4620 dep
= isl_union_map_coalesce(dep
);
4622 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4623 domain
= isl_union_set_intersect_params(domain
,
4624 isl_set_copy(gen
->prog
->scop
->context
));
4625 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4626 isl_union_map_copy(dep
), dep
);
4628 sched
= select_outer_tilable_band(gen
, schedule
);
4630 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4631 sched
= isl_union_map_intersect_domain(sched
, domain
);
4634 isl_schedule_free(schedule
);
4637 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4638 struct gpu_stmt_access
**next_access
)
4640 struct gpu_stmt_access
*access
;
4641 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4643 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4645 access
->next
= NULL
;
4646 access
->read
= expr
->acc
.read
;
4647 access
->write
= expr
->acc
.write
;
4648 access
->access
= isl_map_copy(expr
->acc
.access
);
4650 *next_access
= access
;
4651 next_access
= &(*next_access
)->next
;
4655 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4656 struct gpu_stmt_access
**next_access
)
4660 for (i
= 0; i
< expr
->n_arg
; ++i
)
4661 next_access
= expr_extract_accesses(expr
->args
[i
],
4664 if (expr
->type
== pet_expr_access
)
4665 next_access
= expr_extract_access(expr
, next_access
);
4670 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
4672 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
4674 stmt
->accesses
= NULL
;
4675 expr_extract_accesses(stmt
->body
, next_access
);
4678 /* Return an array of gpu_stmt representing the statements in "scop".
4680 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4681 __isl_keep isl_set
*context
)
4684 struct gpu_stmt
*stmts
;
4686 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
4689 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4690 struct gpu_stmt
*s
= &stmts
[i
];
4692 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
4693 s
->body
= scop
->stmts
[i
]->body
;
4694 pet_stmt_extract_accesses(s
);
4700 /* Replace the scop in the "input" file by equivalent code
4701 * that uses the GPU. "scop" is assumed to correspond to this scop.
4703 * We first compute a schedule that respects the dependences
4704 * of the original program and select the outermost band
4705 * of tilable dimensions that has at least one parallel loop.
4706 * We then have three blocks of dimensions
4710 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4715 * For each iteration of the T loop and for each array, we compute
4716 * the array elements accessed by that iteration, construct a rectangular
4717 * box around it and shift it to the origin. The result is used
4718 * as shared memory for the array.
4720 * We then split off at most 2 parallel loops from the T loops and
4721 * at most 3 parallel loops from the P loops
4725 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4726 * according to "grid"/"block" sizes.
4728 * H T1T T1P T2 P1T P1P P2 G
4730 * Finally, the T1P and P1P iterators are equated to the block and
4731 * thread dimensions respectively and so are effectively removed.
4732 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4733 * are run on the GPU.
4735 * Code is generated in three stages. We first generate code for the
4736 * host (the H loops), with iterators h%d. Then, for each leaf node
4737 * of the resulting AST, we generate code for the shared loops (up to
4738 * and including T2), with iterators g%d and after equating the H loops
4739 * to h%d parameters and the T1P loops to the block dimensions.
4740 * Finally, we generate code for the remaining loops in a similar fashion.
4742 __isl_give isl_ast_node
*generate_gpu(isl_ctx
*ctx
, struct gpu_prog
*prog
,
4743 struct ppcg_options
*options
)
4745 isl_union_map
*sched
;
4754 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
4755 gen
.options
= options
;
4757 sched
= isl_union_map_copy(prog
->scop
->schedule
);
4759 compute_schedule(&gen
, sched
);
4762 tree
= generate_host_code(&gen
);
4764 clear_gpu_gen(&gen
);
4769 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
4771 struct gpu_prog
*prog
;
4776 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
4781 prog
->context
= isl_set_copy(scop
->context
);
4782 prog
->n_stmts
= scop
->n_stmt
;
4783 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
4784 prog
->read
= isl_union_map_copy(scop
->reads
);
4785 prog
->write
= isl_union_map_copy(scop
->writes
);
4787 collect_array_info(prog
);
4792 void gpu_prog_free(struct gpu_prog
*prog
)
4796 free_array_info(prog
);
4797 free_stmts(prog
->stmts
, prog
->n_stmts
);
4798 isl_union_set_free(prog
->copy_in
);
4799 isl_union_map_free(prog
->read
);
4800 isl_union_map_free(prog
->write
);
4801 isl_set_free(prog
->context
);